Author: claimsbot

1. A communication device that is operable to generate an LDPC (Low Density Parity Check) coded signal, the communication device comprising:
an LDPC encoder that is operable to encode at least one information bit using a generator matrix, G, that has a corresponding parity check matrix, H, thereby generating an LDPC codeword that comprises at least one LDPC coded bit and at least one uncoded bit, wherein the at least one LDPC coded bit and the at least one uncoded bit of the LDPC codeword are arranged thereby forming a plurality LDPC symbols; and
a symbol mapper that is operable to map the plurality of LDPC symbols according to a substantially evenly distributed 128 2-D (128 2-Dimensional) constellation, wherein the substantially evenly distributed 128 2-D constellation is generated from a 2-D 12-PAM (2-Dimensional 12-Pulse Amplitude Modulation) constellation comprising 144 possible constellation points that is evenly partitioned into 9 regions such that each region comprises 16 possible constellation points therein and such that 8 of the 9 regions comprise 14 constellation points therein and 1 of the 9 regions comprises all 16 possible constellation points therein.
2. The communication device of claim 1, wherein:
the at least one LDPC coded bit comprises 4 coded bits;
the at least one uncoded bit comprises 3 uncoded bits;
the 3 uncoded bits indicate which subset, among 8 subsets each containing 16 constellation points, to which the 4 coded bits correspond and are symbol mapped; and
for 7 of the 8 subsets, the 16 constellation points therein are distributed among at least 2 of the 9 regions.
3. The communication device of claim 1, wherein:
the LDPC coded signal is generated using an (1280, 1024) LDPC code; and
the parity check matrix, H, is provided within Appendix A.
4. The communication device of claim 1, wherein:
the LDPC coded signal is generated using an (1280, 1024) LDPC code; and
the parity check matrix, H, is provided within Appendix B.
5. The communication device of claim 1, wherein:
the at least one uncoded bit comprises 3 uncoded bits; and
the at least one LDPC coded bit comprises 4 LDPC coded bits.
6. The communication device of claim 5, wherein:
the 3 uncoded bits indicate which subset, among 8 subsets each containing 16 constellation points, to which the 4 LDPC coded bits correspond and are symbol mapped; and
the mapping of the 4 LDPC coded bits to the corresponding 16 constellation points within each of the 8 subsets is performed using Gray code mapping.
7. The communication device of claim 1, wherein:
the LDPC coded signal is generated using an (1280, 1024) LDPC code; and
the parity check matrix, H, is a 256\xd71280 matrix;
the (1280, 1024) LDPC code comprises 1 degree 1 bit node;
the (1280, 1024) LDPC code comprises 255 degree 2 bit nodes;
the (1280, 1024) LDPC code comprises 768 degree 3 bit nodes;
the (1280, 1024) LDPC code comprises 256 degree 7 bit nodes;
each check node of the (1280, 1024) LDPC code, except one check node comprising degree 17, comprises degree 18; and
an LDPC bipartite graph corresponding to the (1280, 1024) LDPC code comprises 4607 edges.
8. The communication device of claim 7, wherein:
the parity check matrix, H, is a 256\xd71280 matrix that may be decomposed into:
a first sub-matrix, Hd, that is a 256\xd71280 matrix;
a second sub-matrix, H7, that is a 256\xd7256 matrix that may be decomposed into 2 separate 2-cyclic sub-matrices; and
a third sub-matrix, H3, that is a 256\xd7768 matrix that may be decomposed into 6 separate 2-cyclic sub-matrices.
9. The communication device of claim 1, wherein:
the LDPC coded signal is generated using an (1280, 1024) LDPC code; and
a smallest loop size of an LDPC bipartite graph corresponding to the (1280, 1024) LDPC code is greater than or equal to 6.
10. The communication device of claim 1, wherein:
the communication device is a communication transceiver including a transmitter portion and a receiver portion;
the LDPC encoder and the symbol mapper are implemented in the transmitter portion; and
the receiver portion comprises a decoder that is operable to decode LDPC coded signals received from at least one additional communication device.
11. The communication device of claim 1, wherein:
the communication device is operable to support communication in accordance with recommended practices provided by the IEEE (Institute of Electrical & Electronics Engineers) P802.3an (10GBASE-T) Task Force.
12. A communication device that is operable to generate an LDPC (Low Density Parity Check) coded signal, the communication device comprising:
an LDPC encoder that is operable to encode at least one information bit using a generator matrix, G, that has a corresponding parity check matrix, H, thereby generating an LDPC codeword that comprises at least one LDPC coded bit and at least one uncoded bit, wherein the at least one LDPC coded bit and the at least one uncoded bit of the LDPC codeword are arranged thereby forming a plurality LDPC symbols;
a symbol mapper that is operable to map the plurality of LDPC symbols according to a substantially evenly distributed 128 2-D (128 2-Dimensional) constellation thereby generating a sequence of discrete-valued modulation symbols that comprises a digital format of the LDPC coded signal, wherein each symbol of the sequence of discrete-valued modulation symbols includes a pair of I, Q (In-phase, Quadrature) values, wherein the substantially evenly distributed 128 2-D constellation is generated from a 2-D 12-PAM (2-Dimensional 12-Pulse Amplitude Modulation) constellation comprising 144 possible constellation points that is evenly partitioned into 9 regions such that each region comprises 16 possible constellation points therein and such that 8 of the 9 regions comprise 14 constellation points therein and 1 of the 9 regions comprises all 16 possible constellation points therein;
a DAC (Digital to Analog Converter) that is operable to generate a continuous-time baseband signal using each pair of I, Q values corresponding to each symbol of the sequence of discrete-valued modulation symbols; and
a transmit driver that is operable to transform the continuous-time baseband signal to a continuous-time transmit signal and to launch the continuous-time transmit signal into a communication channel to which the communication device is communicatively coupled.
13. The communication device of claim 12, wherein:
the at least one uncoded bit comprises 3 uncoded bits; and
the at least one LDPC coded bit comprises 4 LDPC coded bits.
14. The communication device of claim 13, wherein:
the 3 uncoded bits indicate which subset, among 8 subsets each containing 16 constellation points, to which the 4 LDPC coded bits correspond and are symbol mapped; and
the mapping of the 4 LDPC coded bits to the corresponding 16 constellation points within each of the 8 subsets is performed using Gray code mapping.
15. The communication device of claim 12, wherein:
the LDPC coded signal is generated using an (1280, 1024) LDPC code; and
a smallest loop size of an LDPC bipartite graph corresponding to the (1280, 1024) LDPC code is greater than or equal to 6.
16. The communication device of claim 12, wherein:
the communication device is a communication transceiver including a transmitter portion and a receiver portion;
the LDPC encoder, the symbol mapper, the DAC, and the transmit driver are implemented in the transmitter portion; and
the receiver portion comprises a decoder that is operable to decode LDPC coded signals received from at least one additional communication device.
17. The communication device of claim 12, wherein:
the communication device is operable to support communication in accordance with recommended practices provided by the IEEE (Institute of Electrical & Electronics Engineers) P802.3an (10GBASE-T) Task Force.
18. A method for generating an LDPC (Low Density Parity Check) coded signal, the method comprising:
encoding at least one information bit using a generator matrix, G, that has a corresponding parity check matrix, H, thereby generating an LDPC codeword that comprises at least one LDPC coded bit and at least one uncoded bit, wherein the at least one LDPC coded bit and the at least one uncoded bit of the LDPC codeword are arranged thereby forming a plurality LDPC symbols;
symbol mapping the plurality of LDPC symbols according to a substantially evenly distributed 128 2-D (128 2-Dimensional) constellation, wherein the substantially evenly distributed 128 2-D constellation is generated from a 2-D 12-PAM (2-Dimensional 12-Pulse Amplitude Modulation) constellation comprising 144 possible constellation points that is evenly partitioned into 9 regions such that each region comprises 16 possible constellation points therein and such that 8 of the 9 regions comprise 14 constellation points therein and 1 of the 9 regions comprises all 16 possible constellation points therein.
19. The method of claim 18, wherein:
the at least one uncoded bit comprises 3 uncoded bits;
the at least one LDPC coded bit comprises 4 LDPC coded bits; and
the 3 uncoded bits indicate which subset, among 8 subsets each containing 16 constellation points, to which the 4 LDPC coded bits correspond and are symbol mapped.
20. The method of claim 18, wherein:
the LDPC coded signal is generated using an (1280, 1024) LDPC code; and
a smallest loop size of an LDPC bipartite graph corresponding to the (1280, 1024) LDPC code is greater than or equal to 6.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A lock system comprising:
a lock adjustable between a locked configuration and an unlocked configuration;
at least one input device configured to at least one of generate user input and receive user input, each user input having a value; and
a controller operatively connected with the lock, coupled with the input device so as to receive user input, having a memory with at least first and second data files, the first file having at least one stored value, the controller being configured to receive first and second user inputs and to compare the first input value with the at least one first file value and to store a particular second input value within the second data file when a particular value of the first input corresponds with at least one value in the first file.
2. The lock system as recited in claim 1 wherein the controller is further configured to adjust the lock to the unlocked configuration when the particular first input value corresponds with at least one first file value.
3. The lock system as recited in claim 2 wherein the controller is configured such that the lock is nonadjusted whenever the controller subsequently receives a first input having the particular value.
4. The lock system as recited in claim 2 wherein the controller is configured to adjust the lock to the unlocked configuration whenever the controller subsequently receives a second input having a value corresponding with the particular second input value stored within the second data file.
5. The lock system as recited in claim 2 wherein the controller is configured to adjust the lock to the unlocked configuration whenever the controller subsequently receives both a first input having a value corresponding with the particular first file value and a second input having a value corresponding to the particular second file value.
6. The lock system as recited in claim 1 wherein the controller memory further has a third data file, the controller being configured to create and store a value in the third data file at least one of when the lock is adjusted to the unlocked configuration, when the lock is adjusted to the locked configuration, and when a door associated with the lock is opened with the lock in the locked configuration.
7. The lock system as recited in claim 1 wherein the controller is further configured to receive at least one other first input and at least one other second input, to compare the value of the other first input with the at least one value stored within the first data file, and to store a particular other second input value in the second data file when a particular other first input value corresponds with at least one value within the first data file.
8. The lock system as recited in claim 7 wherein the controller is configured to adjust the lock to the unlocked configuration whenever the controller subsequently receives a second input having the particular second input value and alternatively whenever the controller subsequently receives a second input having the particular other second input value.
9. The lock system as recited in claim 1 wherein the controller includes a database installed within the memory and including a plurality of user records each having at least first and second fields, the user records being configured to couple the first and second data storage units such that the first field of each record provides a separate one of the first storage unit values and the second field of each record provides a second storage unit value associated with the particular first unit value.
10. The lock system as recited in claim 9 wherein each record further includes a third field and the controller is configured to store a value corresponding to at least one of a time, a date, and an event code within the third field whenever the controller receives at least one of a first user input having a value corresponding the first field value of the record and a second user input having a value corresponding the second field value of the record.
11. The lock system as recited in claim 9 wherein the event code indicates at least one of when the lock is adjusted to the unlocked configuration, when the lock is adjusted to the locked configuration, and when a door associated with the lock is opened with the lock in the locked configuration.
12. The lock system as recited in claim 9 wherein:
each record further includes a third field having one of a first, second and third attribute values; and
the controller is configured to operate the lock such that the controller adjusts the lock to the open configuration when one of:
the controller receives a first input value corresponding with one record first field value and the associated third field has the first attribute value;
the controller receives a second input value corresponding with one record second field value and the associated third field has the second attribute value; and
the controller receives both a first input value corresponding with one record first field value and a second input value corresponding with the one record second field value and the associated third field has the third attribute value.
13. The lock system as recited in claim 12 wherein:
each record third field has one of the first attribute value, the second attribute value, the third attribute value and a fourth attribute value; and
the controller is configured such that the lock is nonadjusted when one of:
the controller receives a first input value corresponding with one record first field value and the third field of the particular record has the fourth attribute value;
the controller receives a second input value corresponding with one record second field value and the third field of the particular record has the fourth attribute value; and
the controller receives both a first input value corresponding with one record first field value and a second input value corresponding with the one record second field value and the associated third field has the fourth attribute value.
14. The lock system as recited in claim 13 wherein the controller is configured to separately adjust each record third field to any one of the first, second, third and fourth attribute values.
15. The lock system as recited in claim 1 wherein:
the input device is a first input device, the first input device being configured to provide the first user input to the controller; and
the lock system further comprises a second input device configured to provide the second user input to the controller.
16. The lock system as recited in claim 15 wherein:
the first input device is one of a keypad having a plurality of keys, each key being actuateable to generate an electrical signal, a card reader the first user input being provided by at least one key electrical signal; and
the second input device includes one of a card reader, an iButton reader, a wireless transceiver, a fingerprint scanner and a retinal scanner, the second input device being configured to generate an electrical signal providing the second user input.
17. The lock system as recited in claim 1 wherein the input device is configured to generate both the first and second user inputs.
18. The lock system as recited in claim 17 wherein the input device includes one of a keypad, a card reader, an iButton reader and a wireless transceiver.
19. The lock system as recited in claim 1 wherein the first input is received by the controller one of prior to receipt of the second input by the controller, subsequent to receipt of the second input by the controller, and generally simultaneously with receipt of the second input by the controller.
20. The lock system as recited in claim 1 further comprising at least one key unit having data corresponding with a second user input and being configured to communicate with the at least one input device.
21. The lock system as recited in claim 20 wherein the key unit includes one of a card with electromagnetic storage and an iButton with a memory.
22. The lock system as recited in claim 1 wherein the lock system further comprises:
a plurality of the locks, each lock being coupled with a separate one of a plurality of doors and adjustable between the locked and unlocked configurations;
a plurality of the input devices each configured to receive user input, each input having a value, at least one input device being associated with each one of the plurality of locks; and
a plurality of the controllers, each controller being operatively connected with a separate one the locks, coupled with the at least one input device associated with the connected lock so as to receive user input, having a memory with at least first and second data files, the first file having at least one value, each controller being configured to receive first and second user inputs and to compare the first input value with the at least one first file value and to store a particular second input value within the second file when a particular first input value corresponds with one first file value.
23. The lock system as recited in claim 22 wherein the first file of each controller has a set of a plurality of values, each controller first file having the same value set as each one of the other controller first files.
24. The lock system as recited in claim 23 further comprising a data transfer device having a memory with a stored data file, the data file including a plurality of values, the data transfer device being configured to transfer a copy of the plurality of values into the first data file of each one of the controllers.
25. A method of managing a plurality of lock assemblies, the method comprising the steps of:
providing a plurality of the lock assemblies, each lock assembly being disposed on a separate door and including a lock adjustable between a locked configuration and an unlocked configuration, and an input device configured to generate user input, and a controller operatively connected with the lock, coupled with the input device so as to receive user input, having a memory with at least first and second data files;
storing at least one first value into each lock first data file;
inputting first and second user values into at least one of the plurality of lock controllers; and
storing the second user value in the controller second data unit when the at least one controller determines that the first user value corresponds with at least one value stored in the controller first data file such that the at least one controller is configured to adjust the lock to the unlocked configuration whenever the second user value is subsequently inputted to the at least one controller.
26. The method as recited in claim 25 wherein the step of storing at least one first data file value includes:
providing a programming device having a memory with a set of values; and
copying the set of values from the programming device memory into the lock controller first storage unit of each one of the locks.
27. The method as recited in claim 26 further comprising the steps of:
adjusting the lock to the unlocked configuration upon an initial receipt by the at least one controller of a particular first user value corresponding with at least one value stored in the controller first data file; and
nonadjusting the lock to the unlocked configuration whenever the controller subsequently receives a first input having the particular first user value.
28. The method as recited in claim 25 wherein the memory of the at least one controller further has a third data file and the method further comprises the step of creating and storing a value in the third data file when at least one of the lock connected with the at least one controller is adjusted to the unlocked configuration, the lock connected with the at least one controller is adjusted to the locked configuration, and the door associated with the at least one controller is opened with the lock connected with the at least one controller being in the locked configuration.
29. A lock system comprising:
a lock adjustable between a locked configuration and an unlocked configuration;
at least one input device configured to generate user input, each user input having a value; and
a controller operatively connected with the lock, coupled with the input device so as to receive user input, and including a database having at least one record with first and second fields, the first field having a value, the controller being configured to receive first and second user inputs and to compare the first input value with the first field value and to store the second input value within the second field when the particular first input value corresponds with the first field value.
30. A lock system for a door disposed within a frame, the lock system comprising:
a lock adjustable between a locked configuration and an unlocked configuration;
at least one input device configured to receive user input, each user input having a value; and
a controller operatively connected with the lock, coupled with the input device so as to receive user input, having a memory with at least first and second data files, the first file having at least one value, the controller being configured to receive two user inputs and to compare the value of a predetermined one of the two inputs with the at least one first file value and to store the value of the other one of the two inputs within the second file when the particular value of the one input corresponds with one first file value.
31. A lock system comprising:
a lock adjustable between a locked configuration and an unlocked configuration;
a first and second input devices each configured to generate user input, each input having a value; and
a controller operatively connected with the lock, coupled with the first and second input devices so as to receive user input, having a memory with at least first and second data files, the first file having at least one stored value, the controller being configured to receive first user input from the first input device and second user input from the second input device, to compare the first input value with the at least one first file value, and to store the second input value within the second file when the particular value of the first input corresponds with at least one value in the first file.
32. A method of managing a plurality of lock assemblies, the method comprising the steps of:
providing a plurality of the lock assemblies, each lock assembly including a lock adjustable between a locked configuration and an unlocked configuration, and an input device configured to generate user input, and a controller operatively connected with the lock, coupled with the input device so as to receive user input, and having a memory with at least first and second data files;
providing a programming device having a memory with a set of values;
copying the set of values from the programming device memory into the lock controller first data file of each one of the locks;
inputting first and second user values into at least one the lock controllers; and
storing the second user value in the controller second data unit when the at least one controller determines that the first user value corresponds with at least one of the set of values stored in the controller first data file such that the at least one controller is configured to adjust the lock to the unlocked configuration whenever the second user value is subsequently inputted to the at least one controller.

1. An integrated circuit disposed on a semiconductor die, wherein the integrated circuit comprises a plurality of columns extending from a first column on a first side of the semiconductor die to a second column on a second side of the semiconductor die opposite the first side, each of the columns is substantially completely occupied by a plurality of tiles, wherein substantially all of the tiles of each of the columns have an identical width, wherein a width of one of the columns differs from a width of another of the columns, and wherein there are inputoutput interconnect tiles in a third column enabling connections between columns, and inputoutput block tiles disposed in at least two of the columns, the inputoutput block tiles enabling internal connections to circuits in an adjacent column by way of the third column of inputoutput interconnect tiles and enabling external connections to first associated bond bumps of the semiconductor die, and the inputoutput block tiles in at least one of the columns of inputoutput block tiles being in a column other than the first column or the second column and an inputoutput block tile of the at least one column being disposed in a central location to receive a clock signal by way of a bond bump of the inputoutput block tile, wherein the first column on the first side of the semiconductor die comprises a plurality of multi-gigabit transceivers enabling external connections to second associated bond bumps of the semiconductor die, the plurality of multi-gigabit transceivers being coupled to a fourth column of inputoutput interconnect tiles.
2. The integrated circuit of claim 1, wherein the semiconductor die has the first side, the second side parallel to the first side, a third side, and a fourth side parallel to the third side, and wherein each column of the plurality of columns extends from the third side to the fourth side.
3. The integrated circuit of claim 1, wherein the semiconductor die has the first side, the second side parallel to the first side, a third side, and a fourth side parallel to the third side, and wherein one of the columns is a column of configurable logic block tiles, the column of configurable logic block tiles extending from the third side to the fourth side such that a first configurable logic block tile is disposed adjacent the third side and such that a second configurable logic block tile is disposed adjacent the fourth side.
4. The integrated circuit of claim 3, wherein all the configurable logic block tiles of the column of configurable logic block tiles are identical tiles.
5. The integrated circuit of claim 3, wherein there is no inputoutput block tile disposed between the column of configurable logic block tiles and the third side of the semiconductor die, and wherein there is no inputoutput block tile disposed between the column of configurable logic block tiles and the fourth side of the semiconductor die.
6. The integrated circuit of claim 1, wherein each of the inputoutput block tiles is coupled by a conductor to an associated bond bump, and wherein circuitry of the inputoutput block tile can be configured to use the bond bump to receive a signal onto the integrated circuit via the inputoutput block tile.
7. The integrated circuit of claim 1, wherein the semiconductor die has the first side, the second side parallel to the first side, a third side, and a fourth side parallel to the third side, and wherein the at least one column of inputoutput block tiles extends from the third side to the fourth side such that an inputoutput block tile is disposed adjacent the third side and such that a second inputoutput block tile is disposed adjacent the fourth side.
8. The integrated circuit of claim 7, wherein all the inputoutput block tiles of the column of inputoutput block tiles are identical tiles.
9. The integrated circuit of claim 1, wherein one of the columns includes at least four different types of tiles.
10. The integrated circuit of claim 1, wherein a column of the plurality of columns includes a plurality of clock distribution tiles.
11. The integrated circuit of claim 1, wherein over ninety-five percent of the die area of each of the columns is occupied by a single type of tile.
12. The integrated circuit of claim 11, wherein in addition to the single type of tile each of the columns also includes a plurality of clock distribution tiles.
13. The integrated circuit of claim 1, wherein substantially all the inputoutput block tiles are laid out to have either a first orientation or a second orientation, where the second orientation is a mirror image of the first orientation.
14. An integrated circuit disposed on a semiconductor die, wherein the integrated circuit comprises a plurality of columns extending from a first column on a first side of the semiconductor die to a second column on a second side of the semiconductor die opposite the first side, each of the columns is substantially completely occupied by a plurality of tiles, wherein substantially all of the tiles of each of the columns have an identical width, wherein a width of one of the columns differs from a width of another of the columns, and wherein there are inputoutput interconnect tiles in a third column enabling connections between columns, and inputoutput block tiles disposed in at least three of the columns, the inputoutput block tiles enabling internal connections to circuits in an adjacent column by way of the third column of inputoutput interconnect tiles and enabling external connections to first associated bond bumps of the semiconductor die, and the inputoutput block tiles in at least one of the columns of inputoutput block tiles being in a column other than the first column or the second column and an inputoutput block tile of the at least one column being disposed in a central location to receive a clock signal by way of a bond bump of the inputoutput block tile, wherein the first column on the first side of the semiconductor die comprises a plurality of multi-gigabit transceivers enabling external connections to second associated bond bumps of the semiconductor die, the plurality of multi-gigabit transceivers being coupled to a fourth column of inputoutput interconnect tiles.
15. The integrated circuit of claim 14, wherein the semiconductor die has the first side, the second side parallel to the first side, a third side, and a fourth side parallel to the third side, and wherein each column of the plurality of columns extends from the third side to the fourth side.
16. The integrated circuit of claim 14, wherein the semiconductor die has the first side, the second side parallel to the first side, a third side, and a fourth side parallel to the third side, and wherein one of the columns is a column of configurable logic block tiles, the column of configurable logic block tiles extending from the third side to the fourth side such that a first configurable logic block tile is disposed adjacent the third side and such that a second configurable logic block tile is disposed adjacent the fourth side.
17. The integrated circuit of claim 14, wherein each of the inputoutput block tiles is coupled by a conductor to an associated bond bump, and wherein circuitry of the inputoutput block tile can be configured to use the bond bump to receive a signal onto the integrated circuit via the inputoutput block tile.
18. The integrated circuit of claim 14, wherein the semiconductor die has the first side, the second side parallel to the first side, a third side, and a fourth side parallel to the third side, and wherein at least one of the columns is a column of inputoutput block tiles, the column of inputoutput block tiles extending from the third side to the fourth side such that an inputoutput block tile is disposed adjacent the third side and such that a second inputoutput block tile is disposed adjacent the fourth side.
19. The integrated circuit of claim 18, wherein all the inputoutput block tiles of the column of inputoutput block tiles are identical tiles.
20. The integrated circuit of claim 14, wherein substantially all the inputoutput block tiles are laid out to have either a first orientation or a second orientation, where the second orientation is a mirror image of the first orientation.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. Fluid product dispenser comprising:
a variable volume reservoir (12) that varies by displacement of a mobile wall (11) in order to reduce the volume of the reservoir,
a distribution orifice (32), and
actuation means (2) to move the mobile wall (11) of the reservoir, wherein the actuation means rotate and comprise a thread (21) engaged with the reservoir.
2. Dispenser according to claim 1, in which the reservoir (12) comprises at least one displacement flange (13) fixed to the mobile wall (11) and is engaged by threading (21).
3. Dispenser according to claim 1, comprising a body (3), the rotating actuation means (2) being fixed free to rotate in the said body (3) without any translation movement with respect to the said body.
4. Dispenser according to claim 3, in which the body (3) forms a part (31) of the reservoir (12).
5. Dispenser according to claim 4, in which the reservoir (12) comprises a bellows (1) with a sealed connection with the body (3), the said bellows (1) forming the mobile wall (11).
6. Dispenser according to claim 5, in which the bellows (1) comprises a sealed attachment collar (15) engaged with a connection sleeve (35) formed by the body (3).
7. Dispenser according to claim 3, in which the distribution orifice (31) is formed in the body (3).
8. Dispenser according to claim 6, in which the mobile wall (11) is connected to the attachment collar (15) through a deformable wall (14).
9. Dispenser according to claim 1, in which the actuation means (2) form a bottom (22) for the dispenser.
10. Dispenser according to claim 1, in which the actuation means (2) comprise a peripheral gripping device (23) capable of driving the actuation means in free rotation in the body.