Author: claimsbot

What is claimed as new and desired to be secured by Letters Patent of the United States is:

1. A television program distribution arrangement for use in connection with a server in a home area network, the television program distribution arrangement being configured to distribute television programming over a local video link, the television program distribution arrangement comprising:
A. a television programming information receiver module configured to receive television programming information from a plurality of sources;
B. a television programming information assembler module configured to assemble said television programming information as received by the television programming information receiver module into a unitary set of channels for transmission over the local link; and
C. a control module configured to control the television programming information receiver module and the television programming information assembler module.
2. A television program distribution arrangement as defined in claim 1 in which one of said sources provides television programming information over a unitary set of channels, the television programming information assembler module being configured to remove at least some of the television programming information from at least one of the channels and substitute television programming information from another of said sources in the at least one of the channels.
3. A television programming information distribution arrangement as defined in claim 2 in which the at least one of the channels is selectable in response to channel selection information from a user.
4. A television programming distribution arrangement as defined in claim 2 in which one of the sources is a local programming source.
5. A television programming distribution arrangement as defined in claim 2 in which said one of said sources comprises a cable television programming provider.
6. A television programming distribution arrangement as defined in claim 2 in which said one of said sources comprises a satellite television programming provider.
7. A television programming distribution arrangement as defined in claim 2 in which said other of said sources comprises a pre-recorded television programming information source.
8. A television programming distribution arrangement as defined in claim 7 in which said pre-recorded television programming information source comprises a video cassette recorder.
9. A television programming distribution arrangement as defined in claim 7 in which said pre-recorded television programming information source comprises a digital video disk.
10. A television program distribution arrangement as defined in claim 1 further comprising a television programming information storage module, the control module being further configured to selectively enable television programming information received by said television programming information receiver module from one of said sources to be stored in the television programming information storage module, and thereafter retrieved from the television programming information storage module and provided to the television programming information assembler module for use by the television programming information receiver module in assembling the television programming information.
11. A method of controlling a server in a home area network to provide television programming information over a local video link, the method comprising:
A. a television programming information receiving step of receiving television programming information from a plurality of sources;
B. a television programming information assembling step of assembling said television programming information as received by the television programming information receiver module into a unitary set of channels for transmission over the local link.
12. A method as defined in claim 11 in which one of said sources provides television programming information over a unitary set of channels, the television programming information assembling step including the steps of removing at least some of the television programming information from at least one of the channels and substituting television programming information from another of said sources in the at least one of the channels.
13. A method as defined in claim 12 in which the at least one of the channels is selectable in response to channel selection information from a user, the television programming information assembling step including the steps of receiving the channel selection information and using the channel selection information in assembling the television programming information.
14. A method as defined in claim 12 in which one of the sources is a local programming source.
15. A method as defined in claim 12 in which said one of said sources comprises a cable television programming provider.
16. A method as defined in claim 12 in which said one of said sources comprises a satellite television programming provider.
17. A method as defined in claim 12 in which said other of said sources comprises a pre-recorded television programming information source.
18. A method as defined in claim 17 in which said pre-recorded television programming information source comprises a video cassette recorder.
19. A method as defined in claim 17 in which said pre-recorded television programming information source comprises a digital video disk.
20. A method as defined in claim 11 including
A. a television program information storage step of selectively storing television programming information received by said television programming information receiver module from one of said sources in a television programming information storage module, and
B. a television program information retrieval step of retrieving previously-recorded television programming information from the television programming information storage module for use in assembling the television programming information during the television programming information assembling step.
21. A computer program product for use in connection with a programmable device to provide a television program distribution arrangement for use in connection with a server in a home area network, the television program distribution arrangement being configured to distribute television programming over a local video link, the computer program product comprising a device readable medium having encoded thereon:
A. a television programming information receiver module configured to enable the device to receive television programming information from a plurality of sources;
B. a television programming information assembler module configured to enable the device to assemble said television programming information as received by the television programming information receiver module into a unitary set of channels for transmission over the local link; and
C. a control module configured to enable the device to control the television programming information receiver module and the television programming information assembler module.
22. A computer program product as defined in claim 21 in which one of said sources provides television programming information over a unitary set of channels, the television programming information assembler module being configured to enable the device to remove at least some of the television programming information from at least one of the channels and substitute television programming information from another of said sources in the at least one of the channels.
23. A computer program product as defined in claim 22 in which the at least one of the channels is selectable in response to channel selection information from a user.
24. A computer program product as defined in claim 22 in which one of the sources is a local programming source.
25. A computer program product as defined in claim 22 in which said one of said sources comprises a cable television programming provider.
26. A computer program product as defined in claim 22 in which said one of said sources comprises a satellite television programming provider.
27. A computer program product as defined in claim 22 in which said other of said sources comprises a pre-recorded television programming information source.
28. A computer program product as defined in claim 27 in which said pre-recorded television programming information source comprises a video cassette recorder.
29. A computer program product as defined in claim 27 in which said pre-recorded television programming information source comprises a digital video disk.
30. A computer program product as defined in claim 21 further comprising a television programming information storage module, the control module being further configured to enable the device to selectively enable television programming information received by said television programming information receiver module from one of said sources to be stored in the television programming information storage module, and thereafter retrieved from the television programming information storage module and provided to the television programming information assembler module for use by the television programming information receiver module in assembling the television programming information.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A hub unit having a sensor and comprising a hub unit having a wheel-side raceway member for a wheel connectable thereto, a body-side raceway member to be attached to a vehicle body and two rows of rolling bodies arranged between the two raceway members, and a sensor device provided on the hub unit, the body-side raceway member having a cylindrical portion and a flange portion provided with an insertion hole for a bolt for fastening the hub unit to the vehicle body,
the hub unit being characterized in that the sensor device has a sensor for detecting the amount of deformation of the flange portion of the body-side raceway member and processing means for determining a ground contact load from the output of the sensor.
2. A hub unit having a sensor according to claim 1 wherein the flange portion of the body-side raceway member has a base end part provided with a curved surface, and the sensor is a strain sensor provided on the base end part having the curved surface.
3. A hub unit having a sensor according to claim 1 wherein the sensor is a displacement sensor supported by a support member fixed to one of the cylindrical portion of the body-side raceway member and the flange portion thereof for detecting the distance between the displacement sensor and the other portion.
4. A hub unit having a sensor according to claim 3 wherein the displacement sensor is a magnetic sensor provided on a forward end of the support member for detecting variations in the distance from the displacement sensor to an outer periphery of the cylindrical portion of the body-side raceway member, and a magnetized portion is provided on the other portion of the body-side raceway member which portion is not provided with the support member, at a location opposed to the sensor.
5. A hub unit having a sensor according to claim 3 wherein the displacement sensor is a displacement sensor of the inductance type provided on a forward end of the support member for detecting variations in the distance from the displacement sensor to the other portion of the body-side raceway member which portion is not provided with the support member.

1. A method for fabricating a circuit component, comprising:
providing a silicon substrate and a silicon-nitride layer over said silicon substrate;
forming a sacrificial layer over said silicon-nitride layer;
forming a first metal layer comprising a first portion over a top surface of said sacrificial layer and at a sidewall of said sacrificial layer, and a second portion over said silicon substrate but not over said sacrificial layer;
forming a photoresist layer on said first metal layer, wherein an opening in said photoresist layer exposes said first and second portions of said first metal layer;
after said forming said photoresist layer, forming a second metal layer over said first and second portions of said first metal layer, wherein said second metal layer comprises gold;
after said forming said second metal layer, removing said photoresist layer;
after said removing said photoresist layer, removing said first metal layer not under said second metal layer such that said first metal layer remains under said second metal layer; and
after said removing said first metal layernot under said second metal layer, removing said sacrificial layer vertically under said remaining first metal layer and creating a void vertically under said remaining first metal layer.
2. The method of claim 1, wherein said forming said second metal layer comprises an electroplating process.
3. The method of claim 1, wherein said sacrificial layer comprises a polymer.
4. The method of claim 1, wherein said forming said sacrificial layer comprises a spin-coating process.
5. The method of claim 1 further comprising providing a transistor in or on said silicon substrate.
6. The method of claim 1, wherein said forming said first metal layer comprises a sputtering process.
7. The method of claim 1, wherein said forming said first metal layer comprises forming a gold layer comprising a first portion over said top surface of said sacrificial layer and at said sidewall of said sacrificial layer, and a second portion over said silicon substrate but not over said sacrificial layer.
8. The method of claim 1, wherein said forming said first metal layer comprises forming a titanium-containing layer comprising a first portion over said top surface of said sacrificial layer and at said sidewall of said sacrificial layer, and a second portion over said silicon substrate but not over said sacrificial layer.
9. A method for fabricating a circuit component, comprising:
providing a silicon substrate;
forming a sacrificial layer over said silicon substrate;
forming a first gold-containing layer comprising a first portion over a top surface of said sacrificial layer and at a sidewall of said sacrificial layer, and a second portion over said silicon substrate but not over said sacrificial layer;
forming a photoresist layer on said first gold-containing layer, wherein an opening in said photoresist layer exposes said first and second portions of said first gold-containing layer;
after said forming said photoresist layer, electroplating a second gold-containing layer over said first and second portions of said first gold-containing layer;
after said electroplating said second gold-containing layer, removing said photoresist layer;
after said removing said photoresist layer, removing said first gold-containing layer not under said second gold-containing layer such that said first gold-containing layer remains under said second gold-containing layer; and
after said removing said first gold-containing layer not under said second gold-containing layer, removing said sacrificial layer vertically under said remaining first gold-containing layer and creating a void vertically under said remaining first gold-containing layer.
10. The method of claim 9, wherein said sacrificial layer comprises a polymer.
11. The method of claim 9, wherein said forming said sacrificial layer comprises a spin-coating process.
12. The method of claim 9 further comprising forming a titanium-containing layer comprising a first portion over said top surface of said sacrificial layer and at said sidewall of said sacrificial layer, and a second portion over said silicon substrate but not over said sacrificial layer, followed by said forming said first gold-containing layer further on said titanium-containing layer.
13. A method for fabricating a circuit component, comprising:
providing a silicon substrate, a dielectric layer over said silicon substrate, a metal pad on said dielectric layer, and a passivation layer over said dielectric layer, wherein said passivation layer comprises a nitride layer, wherein an opening in said passivation layer is over a contact point of said metal pad, and said contact point is at a bottom of said opening;
forming a sacrificial layer having a portion directly on said passivation layer;
electroplating a metal layer comprising a first portion over a top surface of said sacrificial layer and at a sidewall of said sacrificial layer, and a second portion over said silicon substrate but not over said sacrificial layer; and
after said electroplating said metal layer, removing said sacrificial layer vertically under said metal layer and creating a void vertically under said metal layer such that said metal layer is connected to said contact point through said opening.
14. The method of claim 13, wherein said sacrificial layer comprises a polymer.
15. The method of claim 13, wherein said forming said sacrificial layer comprises a spin-coating process.
16. The method of claim 13, wherein said electroplating said metal layer comprises electroplating a gold-containing layer comprising a first portion over said top surface of said sacrificial layer and at said sidewall of said sacrificial layer, and a second portion over said silicon substrate but not over said sacrificial layer.
17. A method for fabricating a circuit component, comprising:
providing a silicon substrate, multiple transistors in or on said silicon substrate, a dielectric layer over said silicon substrate, a metal pad on said dielectric layer, and a passivation layer over said dielectric layer, wherein said passivation layer comprises a nitride layer, wherein an opening in said passivation layer is over a contact point of said metal pad, and said contact point is at a bottom of said opening in said passivation layer;
forming a sacrificial layer having a portion directly on said passivation layer;
forming a first metal layer comprising a first portion over a top surface of said sacrificial layer and at a sidewall of said sacrificial layer, and a second portion over said silicon substrate but not over said sacrificial layer;
forming a photoresist layer on said first metal layer, wherein an opening in said photoresist layer exposes said first and second portions of said first metal layer;
after said forming said photoresist layer, forming a second metal layer over said first and second portions of said first metal layer;
after said forming said second metal layer, removing said photoresist layer;
after said removing said photoresist layer, removing said first metal layer not under said second metal layer, wherein said first metal layer remains under said second metal layer; and
after said removing said first metal layer, not under said second metal layer, removing said sacrificial layer vertically under said remaining first metal layer and creating a void vertically under said remaining first metal layer.
18. The method of claim 17, wherein said forming said second metal layer comprises an electroplating process.
19. The method of claim 17, wherein said sacrificial layer comprises a polymer.
20. The method of claim 17, wherein said forming said sacrificial layer comprises a spin-coating process.
21. The method of claim 17, wherein said forming said second metal layer comprises forming a gold-containing layer over said first and second portions of said first metal layer.
22. The method of claim 17, wherein said forming said first metal layer comprises a sputtering process.
23. The method of claim 17, wherein said forming said first metal layer comprises forming a gold layer comprising a first portion over said top surface of said sacrificial layer and at said sidewall of said sacrificial layer, and a second portion over said silicon substrate but not over said sacrificial layer.
24. The method of claim 17, wherein said forming said first metal layer comprises forming a titanium-containing layer comprising a first portion over said top surface of said sacrificial layer and at said sidewall of said sacrificial layer, and a second portion over said silicon substrate but not over said sacrificial layer.
25. The method of claim 17, wherein said forming said second metal layer comprises forming a copper-containing layer over said first and second portions of said first metal layer.
26. The method of claim 17, wherein said forming said second metal layer comprises forming a nickel-containing layer over said first and second portions of said first metal layer.
27. The method of claim 9 further comprising providing a transistor in or on said silicon substrate.
28. The method of claim 13, wherein said electroplating said metal layer comprises electroplating a copper-containing layer comprising a first portion over said top surface of said sacrificial layer and at said sidewall of said sacrificial layer, and a second portion over said silicon substrate but not over said sacrificial layer.
29. The method of claim 13, wherein said electroplating said metal layer comprises electroplating a nickel-containing layer comprising a first portion over said top surface of said sacrificial layer and at said sidewall of said sacrificial layer, and a second portion over said silicon substrate but not over said sacrificial layer.
30. A method for fabricating a semiconductor chip, comprising:
providing a silicon substrate, multiple transistors in or on said silicon substrate, a dielectric layer over said silicon substrate, a metal pad on said dielectric layer, and a passivation layer over said dielectric layer, wherein said passivation layer comprises a nitride layer, wherein an opening in said passivation layer is over a contact point of said metal pad, and said contact point is at a bottom of said opening, wherein said passivation layer has a top surface with a first region, a second region and a third region between said first and second regions;
forming a polymer spacer on said third region but not over said first and second regions, wherein said polymer spacer has a first sidewall and a second sidewall opposite to said first sidewall;
forming a metal layer on said contact point, on said first and second regions, on said first and second sidewalls and on a top of said polymer spacer;
forming a gold-containing layer over said metal layer, over said contact point, over said first and second regions, at said first and second sidewalls and over said top of said polymer spacer; and
removing said metal layer not under said gold-containing layer such that said metal layer remains under said gold-containing layer and on said contact point, said first and second regions, said first and second sidewalls and said top of said polymer spacer, and said gold-containing layer is connected to said contact point through said opening, but does not connect said contact point to any other contact point at a bottom of another opening in said passivation layer.
31. The method of caim 30, wherein said forming said metal layer comprises forming a titanium-containing layer on said contact point, on said first and second regions, on said first and second sidewalls and on said top of said polymer spacer.
32. The method of claim 30, wherein said forming said gold-containing layer comprises an electroless plating process.
33. The method of claim 30, wherein said forming said gold-containing layer comprises an electroplating process.
34. The method of claim 30, after said removing said metal layer not under said gold-containing layer, further comprising removing said polymer spacer vertically under said remaining metal layer and creating a void vertically under said remaining metal layer.
35. A method for fabricating a semiconductor chip, comprising:
providing a silicon substrate, multiple transistors in or on said silicon substrate and a dielectric layer over said silicon substrate;
forming a sacrificial layer over said dielectric layer;
forming a first metal layer comprising a first portion over a top surface of said sacrificial layer and a second portion over said dielectric layer but not over said sacrificial layer;
forming a photoresist layer on said first metal layer, wherein an opening in said photoresist layer exposes said first and second portions of said first metal layer;
forming a second metal layer over said first and second portions of said first metal layer, wherein said second metal layer comprises gold;
after said forming said second metal layer, removing said photoresist layer;
after said removing said photoresist layer, removing said first metal layer not under said second metal layer such that said first metal layer remains under said second metal layer; and
after said removing said first metal layer not under said second metal layer, removing said sacrificial layer.
36. The method of claim 35, wherein said forming said second metal layer comprises an electroplating process.
37. The method of claim 35, wherein said forming said first metal layer comprises forming a titanium-containing layer and forming a gold layer on said titanium-containing layer.
38. The method of claim 35, wherein said sacrificial layer comprises a polymer.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An LED lamp comprising:
an LED assembly including at least first and second LEDs operable to emit light of at least two different colors; and
an optical enclosure disposed to receive light from the LED assembly, the optical enclosure including a curved surface and a primary exit surface so that a large percentage of the light strikes the curved surface at an oblique angle and exits through the primary exit surface, at least a portion of the primary exit surface spaced at least about 1.5 inches from the LED assembly to produce light with an efficiency of at least about 150 lumens per watt.
2. The LED lamp of claim 1 having a light output of at least 1200 lumens.
3. The LED lamp of claim 2 wherein the light has a warm white color.
4. The LED lamp of claim 3 wherein the light a correlated color temperature of from 2500 to 3500 K.
5. The LED lamp of claim 4 wherein the light a correlated color temperature of from 2800 to 3000 K.
6. The LED lamp of claim 5 wherein the light has a color rendering index of at least 90.
7. The LED lamp of claim 2 wherein the first and second LEDs, when illuminated, emit light having a dominant wavelength from 435 to 490 nm and a dominant wavelength from 600 to 640 nm, respectively, and at least one of the first and second LEDs is packaged with a phosphor, which, when excited, emits light having a dominant wavelength from 540 to 585 nm.
8. The LED lamp of claim 7 wherein the first and second LEDs, when illuminated, emit light having a dominant wavelength from 440 to 480 nm, and a dominant wavelength from 605 to 630 nm, respectively and the phosphor, when excited, emits light having a dominant wavelength from 560 to 580 nm.
9. The LED lamp of claim 1 wherein the portion of the primary exit surface is spaced at least about 3 inches from the LED assembly.
10. The LED lamp of claim 1 wherein the portion of the primary exit surface is spaced from about 1.5 to about 8 inches away from the LED assembly.
11. The LED lamp of claim 10 further comprising a power supply portion including a power supply electrically connected to the LED assembly and an Edison base.
12. The LED lamp of claim 9 wherein the portion of the primary exit surface is spaced from about 3 to about 8 inches from the LED assembly.
13. A method of assembling a high-efficiency LED lamp, the method comprising:
providing an LED assembly including at least first and second LEDs operable to emit light of at least two different colors;
connecting the LED assembly to a power supply; and
installing a cylindrical optical enclosure including a curved surface and a primary exit surface that provide diffusion, the optical enclosure disposed to receive light from the LED assembly so that a large percentage of the light strikes the curved surface at an oblique angle and exits through the primary exit surface, and the primary exit surface is spaced at least about 1.5 inches from the LED assembly to produce light with an efficiency of at least about 150 lumens per watt.
14. The method of claim 13 further comprising connecting an Edison base to the power supply.
15. The method of claim 14 wherein the portion of the primary exit surface is spaced at least about 3 inches from the LED assembly.
16. The method of claim 13 wherein the providing of the LED assembly further comprises packaging one of the first and second LEDs with a phosphor.
17. The method of claim 16 wherein the first and second LEDs, when illuminated, emit light having a dominant wavelength from 435 to 490 nm and a dominant wavelength from 600 to 640 nm, respectively, and the phosphor, when excited, emits light having a dominant wavelength from 540 to 585 nm.
18. The method of claim 17 wherein the first and second LEDs, when illuminated, emit light having a dominant wavelength from 440 to 480 nm, and a dominant wavelength from 605 to 630 nm, respectively and the phosphor, when excited, emits light having a dominant wavelength from 560 to 580 nm.
19. The method of claim 18 wherein the portion of the primary exit surface is spaced from about 1.5 to about 8 inches away from the LED assembly.
20. A lamp comprising:
an LED assembly to emit light; and
a cylindrical optical enclosure including a curved surface and a primary exit surface for the light at an end so that a large percentage of the light strikes the curved surface at an oblique angle and exits through the primary exit surface, wherein at least a portion of the primary exit surface is spaced at least 1.5 inches from the LED assembly.
21. The lamp of claim 20 wherein the optical enclosure is one of a cylinder and a frustoconical shape.
22. The lamp of claim 21 operable to emit light with an efficiency of 150 lumens per watt and a total output of 1200 lumens.
23. The lamp of claim 22 wherein the light emitted has a color rendering index of at least 90 and a coordinated color temperature CCT of 2500 to 3500 K.
24. The lamp of claim 23 wherein the light emitted has a CCT of 2800 to 3000.
25. The lamp of claim 21 wherein the portion of the primary exit surface is at least 3 inches from the LED assembly.
26. The lamp of claim 21 wherein the portion of the primary exit surface is less than 8 inches from the LED assembly.
27. The lamp of claim 25 wherein the portion of the primary exit surface is less than 8 inches from the LED assembly.