Author: claimsbot

1. A junction block circuit structure, comprising:
a positive electrode busbar and a negative electrode busbar;
a plurality of positive terminals following to the positive electrode busbar being disposed in a connector housing to form a positive electrode connector; and
a plurality of negative terminals following to the negative electrode busbar being disposed in an other connector housing to form a negative electrode connector.
2. The junction block circuit structure according to claim 1, wherein the positive electrode busbar and the negative electrode busbar are arranged in different layers intervening an insulating plate.
3. The junction block circuit structure according to claim 1, wherein each of the positive electrode busbar and the negative electrode busbar is connected to a total input part of a battery circuit, a total output part of an inverter circuit and other output parts which are provided with the positive electrode terminal and the negative electrode terminal.
4. The junction block circuit structure according to claim 3, wherein the total output part is disposed in the center of the junction block and the positive electrode terminal and the negative electrode terminal are disposed at both sides of the total output part.
5. The junction block circuit structure according to claim 3, wherein the positive electrode terminal and the negative electrode terminal are connected to a 100V alternating-current conversion circuit.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A manufacturing method for an electronic device joining a first metallic bond part formed on a first electronic component and a second metallic bond part formed on a second electronic component, the manufacturing method comprising:
a first process for:
placing the first metallic bond part directly against the second metallic bond part;
applying pressure to the first electronic component and the second electronic component;
joining the first metallic bond part to the second metallic bond part with solid-phase diffusion; and
releasing the applied pressure; and

a second process for:
heating the first electronic component and the second electronic component at a predetermined temperature such that the first metallic bond part and the second metallic bond part are joined together by melting at least one of the first metallic bond part and the second metallic bond part.
2. The manufacturing method according to claim 1, further comprising:
forming the first electronic component on a support piece before the first process.
3. The manufacturing method according to claim 2, wherein the support piece has a heat expansion coefficient near a heat expansion coefficient of the second electronic component.
4. The manufacturing method according to claim 2, wherein a heat expansion coefficient of the support piece is the same as a heat expansion coefficient of the second electronic component.
5. The manufacturing method according to claim 2, wherein the support piece and the second electronic component comprise a same material.
6. The manufacturing method according to claim 2, wherein the support piece comprises a substrate comprising a silicon wafer, glass, or ceramic materials.
7. The manufacturing method according to claim 2, wherein the second electronic component comprises a semiconductor chip, the semiconductor chip comprising a through-silicon via.
8. The manufacturing method according to claim 2, wherein the second electronic component comprises a plurality of semiconductor chips, the semiconductor chips being stacked on each other, and
wherein each of the semiconductor chips comprises a through-silicon via.
9. The manufacturing method according to claim 8, wherein said through-silicon via is connected to through-silicon vias of other semiconductor chips.
10. The manufacturing method according to claim 2, further comprising:
mounting the first electronic component and the support piece on a heating stage.
11. The manufacturing method according to claim 1, further comprising:
clamping the second electronic component to the first electronic component, prior to said applying pressure.
12. The manufacturing method according to claim 1, wherein the first electronic component comprises a wiring piece comprising alternate laminations of insulating layers and wiring layers.
13. The manufacturing method according to claim 1, wherein the first metallic bond part is formed on a surface of the first electronic component.
14. The manufacturing method according to claim 1, further comprising:
mounting a plurality of laminated pieces of the second electronic component adjacently on a surface of the first electronic component.
15. The manufacturing method according to claim 14, further comprising:
press heating said plurality of laminated pieces of the second electronic component mounted on the surface of the first electronic component.
16. The manufacturing method according to claim 15, wherein said press heating comprises:
applying pressure to a support piece of the first electronic component, the first electronic component, and said plurality of laminated pieces, to simultaneously clamp the first electronic component and said plurality of laminated pieces in their relative positions.
17. A manufacturing method for an electronic device joining a first metallic bond part formed on a first electronic component and a second metallic bond part formed on a second electronic component, the manufacturing method comprising:
a first process for:
placing the first metallic bond part directly against the second metallic bond part;
applying pressure to the first electronic component and the second electronic component;
metallically joining the first metallic bond part to the second metallic bond part; and
releasing the applied pressure; and

a second process for:
heating the first electronic component and second electronic component at a predetermined temperature so that the first metallic bond part and the second metallic bond part are joined to each other,
wherein the first electronic component or the second electronic component includes a semiconductor substrate and, the second metallic bond part mounted on the semiconductor substrate,
wherein the second metallic bond part includes a base section and a cover section covering a surface of the base section with a melting point lower than that of the base section,
wherein in the first process, the first electronic component and the second electronic component are heated and maintained at a temperature lower than the melting point of the cover section, and
wherein in the second process, the first electronic component and the second electronic component are heated and maintained at a temperature higher than the melting point of the cover section.
18. The manufacturing method for the electronic device according to claim 17, wherein the base section is affixed on the semiconductor substrate.
19. The manufacturing method for the electronic device according to claim 17, wherein in the second process, metal atoms that make up the base section diffuse into the cover section.
20. The manufacturing method for the electronic device according to claim 17, wherein the cover section comprises tin (Sn) or indium (In), and
wherein the base section includes any of copper (Cu), nickel (Ni), gold (Au), or palladium (Pd).
21. The manufacturing method for the electronic device according to claim 17, wherein the base section is bent to form an arc at tip surfaces.
22. The manufacturing method for the electronic device according to claim 17, further comprising:
forming the first electronic component on a support piece before the first process.
23. The manufacturing method for the electronic device according to claim 22, wherein the second electronic component comprises a semiconductor chip, the semiconductor chip comprising a through-silicon via.
24. The manufacturing method for the electronic device according to claim 22, wherein the second electronic component comprises a plurality of semiconductor chips, the semiconductor chips being stacked on each other, and
wherein each of the semiconductor chips comprises a through-silicon via.
25. The manufacturing method for the electronic device according to claim 24, wherein said through-silicon via is connected to through-silicon vias of other semiconductor chips.

1. An optical information recording medium comprising:
a ROM region in which intermittent pits are formed along a line at a track pitch (P); and
a RAM region including a groove in which at least one of a pit and a mark is to be formed to record information,
wherein the pits in the ROM region are wobbled in a radius direction of the optical information recording medium, wherein an inter-pit groove is formed along the wobbled pits, the groove connecting adjacent pits along the line, and wherein a width (W) of the inter-pit groove is narrower than a width of the groove in the RAM region.
2. The optical information recording medium according to claim 1, wherein a ratio (WP) of the width (W) of the inter-pit groove to the track pitch (P) is from 0.2 to 0.4.
3. The optical information recording medium according to claim 1, wherein the optical information recording medium is a CD-R.
4. The optical information recording medium according to claim 1, wherein the optical information recording medium is a CD-RW.
5. An information recording method comprising:
providing an optical information recording medium comprising a ROM region in which intermittent pits are formed along a line at a track pitch (P), and a RAM region including a groove; and
forming at least one of a pit and a mark in the groove in the RAM region of the optical information recording medium to record information,
wherein the pits in the ROM region are wobbled in a radius direction of the recording medium, an inter-pit groove is formed along the wobbled pits, the groove connecting adjacent pits along the line, and wherein a width (W) of the inter-pit groove is narrower than a width of the groove in the RAM region.
6. The information recording method according to claim 5, wherein a ratio (WP) of the width (W) of the inter-pit groove to the track pitch (P) is from 0.2 to 0.4.
7. An optical information recording method comprising:
providing an optical information recording medium comprising a ROM region in which intermittent pits are formed along a line at a track pitch (P) and a RAM region including a groove; and
applying light irradiation to the groove in the RAM region of the optical information recording medium to form at least one of a pit and a mark therein,
wherein the pits in the ROM region are wobbled in a radius direction of the recording medium, an inter-pit groove is formed along the wobbled pits, the groove connecting adjacent pits along the line, and wherein a width (W) of the inter-pit groove is narrower than a width of the groove in the RAM region.
8. The optical information recording method according to claim 7, wherein a ratio (WP) of the width (W) of the inter-pit groove to the track pitch (P) is from 0.2 to 0.4.
9. An optical information recording medium comprising:
a ROM region in which intermittent pits are formed along a line at a track pitch (P) and including an inter-pit groove connecting adjacent pits along the line; and
a RAM region including a groove in which at least one of a pit and a mark is to be formed to record information,
wherein a width (W) of the inter-pit groove is narrower than a width of the groove in the RAM region.
10. The optical information recording medium according to claim 9, wherein a ratio (WP) of the width (W) of the inter-pit groove to the track pitch (P) is from 0.2 to 0.4.
11. The optical information recording medium according to claim 9, wherein the optical information recording medium is a CD-R.
12. The optical information recording medium according to claim 9, wherein the optical information recording medium is a CD-RW.
13. An information recording method comprising:
providing an optical information recording medium comprising a RAM region including a groove, and a ROM region in which intermittent pits are formed along a line at a track pitch (P) and including an inter-pit groove connecting adjacent pits along the line; and
forming at least one of a pit and a mark in the groove in the RAM region of the optical information recording medium to record information,
wherein a width (W) of the inter-pit groove is narrower than a width of the groove in the RAM region.
14. The information recording method according to claim 13, wherein a ratio (WP) of the width (W) of the inter-pit groove to the track pitch (P) is from 0.2 to 0.4.
15. An optical information recording method comprising:
providing an optical information recording medium comprising a RAM region including a groove, and a ROM region in which intermittent pits are formed at a track pitch (P) and including an inter-pit groove connecting adjacent pits along the line; and
applying light irradiation to the groove in the RAM region of the optical information recording medium to form at least one of a pit and a mark therein,
wherein a width (W) of the inter-pit groove is narrower than a width of the groove in the RAM region.
16. The optical information recording method according to claim 15, wherein a ratio (WP) of the width (W) of the inter-pit groove to the track pitch (P) is from 0.2 to 0.4.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An interchangeable radio frequency interactive panel, comprising:
an outer wall:
an inner wall; and
an enclosed interior cavity disposed between said outer well and said inner wall, said interior cavity sized to receive at least one radio frequency interactive material.
2. The interchangeable radio frequency interactive panel of claim 1 further comprising a plurality of male lock connectors and a plurality of female lock connectors disposed about the periphery of said radio frequency interactive panel.
3. The interchangeable radio frequency interactive panel of claim 1, wherein said inner well and said outer well are substantially rectangular.
4. The interchangeable radio frequency interactive panel of claim 3, wherein said inner wall and said outer wall are hingeably attached along one side.
5. The interchangeable radio frequency interactive panel of claim 1, wherein said at least one radio frequency interactive material comprises at least one polarization filter.
6. The interchangeable radio frequency interactive panel of claim 5, wherein said at least one polarization filter comprises multiple polarization filters.
7. The interchangeable radio frequency interactive panel of claim 6, wherein said at least one polarization filter comprises a circular polarization filter.
8. The interchangeable radio frequency interactive panel of claim 6, wherein said at least one polarization filter comprises a elliptical polarization filter.
10. The interchangeable radio frequency interactive panel of claim 6, wherein said at least one polarization filter comprises a linear polarization filter.
11. The interchangeable radio frequency interactive panel of claim 1, wherein said at least one radio frequency interactive material comprises at least one type of mesh electromagnetic shielding material.