Author: claimsbot

1. An LGA connector for electrically connecting an LGA package with a circuit substrate, the LGA connector comprising:
a dielectric housing having a bottom wall having a mounting surface and a plurality of sidewalls jointly encircling a receiving cavity to receive the LGA package therein, the bottom wall being provided with a plurality of reinforced columns integrally formed from the mounting surface and extending outwardly toward the circuit substrate so as to securely position the dielectric housing thereon; and
a plurality of conductive terminals embedded in the dielectric housing, respectively, each conductive terminal comprising an upper flexible beam protruding into the receiving cavity to resiliently and electrically mate with the LGA package;
wherein the reinforced columns each comprise a chamber at a center thereof and a reinforcing pin interferingly inserted in the chamber wherein each of the reinforced columns is situated on a periphery of a bottom surface and adjacent to each of four corners of the dielectric housing; wherein each of the reinforced columns keeps a constant contour regardless of whether the corresponding metallic pin is received therein or not.
2. The LGA connector of claim 1, wherein a plurality of sidewalls each form a flexible cantilevered beam stretching into the receiving cavity to resiliently resist against the LGA package.
3. An LGA connector for electrically connecting an LGA package with a circuit substrate thereunder, the WA connector comprising:
a dielectric housing having a bottom wall having a mounting face and a plurality of sidewalls jointly encircling a receiving cavity to receive the WA package therein, a plurality of laterally protruding sections formed on exterior surfaces of the sidewalls, and adjacent to four corner of the dielectric housing
a plurality of metallic pins respectively extending downward from said laterally protruding sections for assembling to the circuit substrate; and
a plurality of conductive terminals embedded in the dielectric housing, respectively, each conductive terminal comprising an upper flexible beam protruding into the receiving cavity to resiliently and electrically mate with the LGA package; wherein
laterally protruding section keeps a constant contour regardless of whether the corresponding metallic pin is equipped therewith or not wherein each of said metallic pins is compactly enclosed within a hollow column of each respective protruding section, said each of the hollow columns being integrally formed with the mounting surface and the below the bottom wall of the housing.
4. The electrical connector of claim 3, wherein said hollow column keeps a constant contour regardless of whether the corresponding metallic pin is received therein or not.
5. The electrical connector of claim 4, wherein metallic pin does not communicate with an exterior upwardly.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. Display (1) with a display illuminating device and means for controlling the display illuminating device according to the light intensity of luminous radiation occurring on said display (1), determined by means of a light-sensitive element (2) characterized in that the light-sensitive measuring element (2) is integrated into the display (1).
2. Display according to claim 1 characterized in that the light-sensitive measuring element (2) is integrated into a component (3a) which is located on a display glass (4).
3. Display according to claim 2 characterized in that the component (3a) includes an integrated circuit attached to the display glass (4).
4. Display according to claim 2 or 3 characterized in that the component (3a) located on the display glass (4) is shielded from incident light by means of an opaque protective layer (10) which has an aperture (11), and in that the aperture (11) and the light-sensitive measuring element (2) in the component (3a) are mutually disposed such that the incident luminous radiation reaches the light-sensitive measuring element (2) through the aperture (11).
5. Display according to one of the claims 2 to 4 characterized in that the component (3a) includes a display controller andor a display driver stage (3a).
6. Display according to one of the claims 1 to 5 characterized by a measuring device which by means of the light-sensitive measuring element determines an ambient light intensity incident on the display.
7. Display according to claim 6 characterized in that the display illuminating device operates in a pulsating manner and in that the measuring device has a filtering device which filters out that portion of the light intensity, determined by means of the light-sensitive measuring element, that is produced by the display illuminating device.
8. Display according to claim 6 characterized in that the display illuminating device operates intermittently and in that the measuring device has means for determining the light intensity by means of the sensitive measuring element only when the display illuminating device is not producing any light.
9. Display according to one of the claims 1 to 8 characterized in that the measuring element determines a digital value or in that a device that converts the light intensity determined by means of the measuring element into a digital value is integrated into the display.
10. Device with a display according to one of the claims 1 to 9.
11. Method for operating a display (1) with a display illuminating device wherein a light intensity of a luminous radiation occurring on the display (1) is determined and the display illuminating device is controlled according to the determined light intensity, characterized in that the light intensity is determined by means of a light-sensitive measuring element (2) integrated into the display (1).
12. Method according to claim 11 characterized in that an ambient light intensity occurring on the display is measured.
13. Method according to claim 12 characterized in that the display illuminating device operates in a pulsating manner and in that a portion of the determined light intensity produced by the display illuminating device is filtered out.
14. Method according to claim 12 characterized in that the display illuminating device operates intermittently and in that the light intensity is only determined when the display illuminating device is not producing any light.

1. An apparatus for extending the effective field of view (FOV) of a computer tomography (CT) scanner, comprising:
a storage medium that stores an image mask and stores acquired CT projection transmission data of said CT scanner to be used in calculating image reconstruction data; and
a processor that performs a direct inversion data calculation using said CT projection transmission data defined by said image mask to obtain image reconstruction data for a reconstructed CT image,
wherein the calculation uses the image mask and image center as one boundary; and
wherein the reconstructed CT image includes areas outside the image mask and outside the CT scanner FOV.
2. An apparatus for extending the effective field of view (FOV) of a computer tomography (CT) scanner, comprising:
a storage medium that stores an image mask and stores acquired CT projection transmission data of said CT scanner to be used in calculating image reconstruction data; and
a processor that performs an iterative reconstruction data calculation using said CT projection transmission data defined by said image mask to obtain image reconstruction data for reconstruction of a reconstructed CT image,
wherein the calculation uses the image mask and image center as one boundary; and
wherein the reconstructed CT image includes areas outside the image mask and outside the CT scanner FOV.
3. The apparatus of claim 2, wherein said iterative reconstruction data calculation is performed for a pre-selected number of iterations.
4. The apparatus of claim 2, wherein said iterative reconstruction data calculation is performed until a calculation result is within a pre-selected tolerance level of a preceding calculation result.
5. The apparatus of claim 1, wherein said processor further uses said CT image reconstruction data to develop attenuation correction factors for PET projection data acquired from the same object as said CT projection data.
6. The apparatus of claim 1, wherein said processor further co-registers said CT image reconstruction data with PET reconstruction data pertaining to the same object as said CT image reconstruction data.
7. The apparatus of claim 2, wherein said processor further uses said CT image reconstruction data to develop attenuation correction factors for PET projection data acquired from the same object as said CT projection data.
8. The apparatus of claim 2, wherein said processor further co-registers said CT image reconstruction data with PET reconstruction data pertaining to the same object as said CT image reconstruction data.
9. An apparatus for extending the effective field of view (FOV) of a computer tomography (CT) scanner, comprising:
a storage medium that stores an image and stores acquired CT projection transmission data to be acquired as CT projection data and storing a reconstruction mask for acquired CT projection data surrounding a FOV of said CT scanner to be used in calculating image reconstruction data; and
a processor that performs an iterative reconstruction data calculation using said CT projection data defined by said projection data mask and said reconstruction mask to obtain image reconstruction data for reconstruction of a CT image,
wherein the calculation uses the image mask and image center as one boundary; and
wherein the reconstructed CT image includes areas outside the image mask and outside the CT scanner FOV.
10. The apparatus of claim 9, wherein said iterative reconstruction data calculation is performed for a pre-selected number of iterations.
11. The apparatus of claim 9, wherein said iterative reconstruction data calculation is performed until a calculation result is within a pre-selected tolerance level of a preceding calculation result.
12. The apparatus of claim 9, wherein said projection data mask includes projection data in a predetermined area surrounding said FOV.
13. The apparatus of claim 9, wherein said reconstruction mask includes projection data from truncated areas in said predetermined area surrounding said FOV.
14. The apparatus of claim 9, wherein said processor further uses said CT image reconstruction data to develop attenuation correction factors for PET projection data acquired from the same object as said CT projection data.
15. The apparatus of claim 9, wherein said processor further co-registers said CT image reconstruction data with PET reconstruction data pertaining to the same object as said CT image reconstruction data.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A digital broadcasting data receiving apparatus, comprising:
a packet input section configured to input a packet having a program clock reference value related to digital broadcasting;
a decode section configured to decode the packet input by the packet input section;
a system time clock reproducing section configured to reproduce a system time clock used for a synchronizing process executed in the decode section; and
a system time clock control section configured to control the system time clock reproducing section to correct the system time clock reproduced by the system time clock reproducing section in accordance with a difference between the value of the system time clock and the program clock reference value.
2. The digital broadcasting data receiving apparatus according to claim 1, wherein the value of the system time clock is placed at a head of the input packet.
3. The digital broadcasting data receiving apparatus according to claim 1, wherein:
the input packet has a header section and an adaptation or payload section, and
the value of the system time clock is placed between the head section and the adaptation or payload section.
4. The digital broadcasting data receiving apparatus according to claim 1, wherein the value of the system time clock is placed at a tail of the input packet.
5. The digital broadcasting data receiving apparatus according to claim 1, wherein a field of a predetermined byte length is added to the input packet, the field including the value of the system time clock and reserved bits.
6. The digital broadcasting data receiving apparatus according to claim 5, wherein the reserved bits are placed in front of the value of the system time clock.
7. The digital broadcasting data receiving apparatus according to claim 5, wherein the reserved bits are placed behind the value of the system time clock.
8. The digital broadcasting data receiving apparatus according to claim 5, wherein:
the value of the system time clock is divided into a system time clock base section and a system time clock extension section in placement, and
the reserved bits are placed between the system time clock base section and the system time clock extension section.
9. A method of controlling a digital broadcasting data receiving apparatus including a packet input section which inputs a packet having a program clock reference value related to digital broadcasting and a decode section which decodes the packet input by the packet input section, the method comprising:
in the packet input section, reproducing a system time clock used for a synchronizing process executed in the decode section,; and
in the decode section, correcting the system time clock reproduced in the packet input section in accordance with a difference between the value of the system time clock and the program clock reference value.
10. The method according to claim 9, wherein the value of the system time clock is placed at a head of the input packet.
11. The method according to claim 9, wherein:
the input packet has a header section and an adaptation or payload section, and
the value of the system time clock is placed between the head section and the adaptation or payload section.
12. The method according to claim 9, wherein the value of the system time clock is placed at a tail of the input packet.
13. The method according to claim 9, wherein a field of a predetermined byte length is added to the input packet, the field including the value of the system time clock and reserved bits.
14. The method according to claim 13, wherein the reserved bits are placed in front of the value of the system time clock.
15. The method according to claim 13, wherein the reserved bits are placed behind the value of the system time clock.
16. The method according to claim 13, wherein:
the value of the system time clock is divided into a system time clock base section and a system time clock extension section in placement, and
the reserved bits are placed between the system time clock base section and the system time clock extension section.
17. A digital broadcasting data receiving apparatus, comprising:
a packet input section configured to input a packet having a program clock reference value related to digital broadcasting;
a decode section configured to decode the packet input by the packet input section;
a system time clock reproducing section provided in the packet input section and configured to reproduce a system time clock used for a synchronizing process executed in the decode section;
a buffer provided in the packet input section and configured to temporarily store the input packet with a value of the reproduced system time clock to output the stored packet with the value of the system time clock; and
a system time clock control section provided in the decode section and configured to extract the value of the system time clock and the program clock reference value from the packet output by the buffer and configured to control the system time clock reproducing section to correct the system time clock reproduced by the system time clock reproducing section in accordance with a difference between the value of the system time clock and the program clock reference value.