Author: claimsbot

1. A track roller assembly, comprising:
a yoke member having a first arm and a second arm spaced apart from the first arm;
an idler wheel rotatably disposed between the first and second arms of the yoke member;
a frame configured to receive at least a portion of the yoke member; and
at least one idler key configured to extend through an opening in the frame and engage a lengthwise slot in at least one of the first and second arms.
2. The track roller assembly of claim 1, wherein:
when the at least one idler key is mounted to the frame in a first orientation, the yoke member is retained in a first position relative to the frame; and
when the at least one idler key is mounted to the frame in a second orientation, the yoke member is retained in a second position relative to the frame.
3. The track roller assembly of claim 2, further including:
a plurality of lower rollers supported by the frame; and
an endless track looped around the idler wheel and the plurality of lower rollers,
wherein reorienting the at least one idler key from the first orientation to the second orientation changes a distance between the idler wheel and the plurality of lower rollers.
4. The track roller assembly of claim 1, wherein:
the at least one idler key includes a flange that mates against an external surface of the frame; and
the track roller assembly further includes a plurality of upper fasteners and a plurality of opposing lower fasteners that retain the flange against the frame.
5. The track roller assembly of claim 4, wherein:
the at least one idler key includes a line of symmetry passing between the pluralities of upper and lower fasteners; and
the line of symmetry is closer to the plurality of upper fasteners than the plurality of lower fasteners.
6. The track roller assembly of claim 5, wherein the line of symmetry is offset from a centerline between the pluralities of upper and lower fasteners by a first amount; and
reorienting the at least one idler key from a first orientation to a second orientation moves the yoke member by a distance about equal to twice the first amount.
7. The track roller assembly of claim 6, wherein the first amount is in a range of about 2-8 mm.
8. The track roller assembly of claim 1, wherein:
the at least one idler key includes a first idler key configured to engage the first arm; and
a second idler key configured to engage the second arm.
9. The track roller assembly of claim 1, wherein:
the first and second arms each include a partial-bore; and
the track roller assembly further includes:
a shaft extending between the partial circumference bores of the first and second arms and configured to support the idler wheel;
a first cap configured to engage the first arm and retain a first end of the shaft; and
a second cap configured to engage the second arm and retain a second end of the shaft.
10. The track roller assembly of claim 9, further including at least one guard located at an end of the frame and configured to substantially enclose the shaft.
11. The track roller assembly of claim 10, wherein the at least one guard includes an opening to provide clearance for an end of at least one of the first and second arms.
12. The track roller assembly of claim 1, wherein engagement surfaces of the lengthwise slot are harder than engagement surfaces of the at least one idler key.
13. The track roller assembly of claim 12, wherein the engagement surfaces of the lengthwise slot are about 40-60% harder than the engagement surfaces of the at least one idler key.
14. The track roller assembly of claim 1, wherein the yoke member is constrained from movement in vertical direction and a transverse direction relative to the frame, and allowed to move in a lengthwise direction of the frame.
15. The track roller assembly of claim 14, further including a biasing member disposed within the frame and configured to bias the yoke member away from the frame in the lengthwise direction.
16. The track roller assembly of claim 1, wherein the at least one idler key extends in a length direction of the slot more than in a width direction of the slot.
17. A track roller assembly, comprising:
a yoke member having a first arm and a second arm spaced apart from the first arm;
an idler wheel rotatably disposed between the first and second arms of the yoke member;
a frame configured to receive at least a portion of the yoke member; and
at least one idler key configured to extend through an opening in the frame and engage the yoke member, wherein:
when the at least one idler key is mounted to the frame in a first orientation, the yoke member is retained in a first position relative to the frame; and
when the at least one idler key is mounted to the frame in a second orientation, the yoke member is retained in a second position relative to the frame.
18. The track roller assembly of claim 17, wherein:
the at least one idler key includes a flange that mates against an external surface of the frame;
the track roller assembly further includes a plurality of upper fasteners and a plurality of opposing lower fasteners that retain the flange against the frame;
the at least one idler key includes a line of symmetry passing between the pluralities of upper and lower fasteners; and
the line of symmetry is closer to the plurality of upper fasteners than the plurality of lower fasteners.
19. The track roller assembly of claim 18, wherein the line of symmetry is offset from a centerline between the pluralities of upper and lower fasteners by a first amount; and
reorienting the at least one idler key from a first orientation to a second orientation moves the yoke member by a distance about equal to twice the first amount.
20. A track type machine, comprising:
a machine frame;
an engine supported by the machine frame;
a sprocket driven by the engine;
a track roller frame pivotally connected at one end to the machine frame;
a plurality of lower rollers connected to a lower side of the track roller frame;
a plurality of upper carriers connected to an upper side of the track roller frame;
a yoke member having a first end disposed at least partially within the track roller frame, and first and second spaced apart arms protruding from a second end;
an idler wheel rotatably disposed between the first and second arms of the yoke member;
an endless track wrapped around the sprocket, the plurality of lower rollers, the plurality of upper carriers, and the idler wheel; and
first and second idler keys configured to extend through openings in opposing sides of the track roller frame to engage lengthwise slots in at the first and second arms,
wherein:
when the first and second idler keys are mounted to the track roller frame in a first orientation, the yoke member is retained in a first position relative to the lower rollers; and
when the first and second idler keys are mounted to the track roller frame in a second orientation, the yoke member is retained in a second position further away from the lower rollers.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A wirelessly controlled pet toy dispenser system with camera, to provide a user with the opportunity to select a pet toy for dispensing and to select the timing of dispensing so as to create elements of surprise in the timing and toy selection for a pet, which comprises:
a. a pet toy main housing having a plurality of compartments, each compartment adapted to hold at least one pet toy for subsequent dispensing, each compartment having a first state, being a pet toy holding state, and having a second state, being a pet toy dispensing state, said pet toy main housing being above a floor and positioned above the reach level of a pet for which it is intended, said dispensing state being a state causing movement of a pet toy from said main housing wherein a selected pet toy is therefore dropped to the floor;
b. a movement mechanism connected to each of said plurality of compartments and adapted to independently move each of said plurality of compartments on separate command signals from said first position to said second position to dispense at least one pet toy;
c. a control mechanism located at said main housing for receiving wireless signals, including at least one unique signal for each of said plurality of compartments to activate said movement mechanism, said control mechanism being functionally connected to said movement mechanism;
d. at least one pet camera located at and connected to said main housing and camera transmission mechanism for wirelessly transmitting a camera picture to a remote user; and,
e. a remote user transmitter and receiver, said transmitter keyed to said control mechanism and adapted to permit a remote user to select a compartment and activate at least one pet toy release at will, said receiver including camera picture screen keyed to said at least one pet camera.
2. The wirelessly controlled pet toy dispenser system with camera of claim 1 wherein said movement means are selected from the group consisting of (a) a latch opener with a gravity drop door; (b) a tilt mechanism; (c) a push mechanism.
3. The wirelessly controlled pet toy dispenser system with camera of claim 1 wherein said plurality of compartments is arranged with at least one row or column.
4. The wirelessly controlled pet toy dispenser system with camera of claim 1 wherein said remote user transmitter and receiver includes a microphone and said pet toy main housing includes a speaker in proximity thereto to enable a user to speak to a pet.
5. The wirelessly controlled pet toy dispenser system with camera of claim 1 wherein said plurality of compartments is arranged in at least one circle.
6. The wirelessly controlled pet toy dispenser system with camera of claim 1 wherein said remote user transmitter and receiver is a computer equipped with internet capability and picture viewing.
7. The wirelessly controlled pet toy dispenser system with camera of claim 1 wherein said remote user transmitter and receiver is a picture cell phone.
8. The wirelessly controlled pet toy dispenser system with camera of claim 1 wherein said control means is a wireless receiving and transmitting microprocessor.
9. The wirelessly controlled pet toy dispenser system with camera of claim 1 wherein said main housing includes wall attachment mechanism for attachment to a wall.
10. The wirelessly controlled pet toy dispenser system with camera of claim 1 wherein each of said plurality of compartments contains at least one pet toy and there are at least two different pet toys within said plurality of compartments.
11. A wirelessly controlled pet toy dispenser system with camera, to provide a user with opportunity to select a pet toy for dispensing and to select the timing of dispensing so as to create elements of surprise in the timing and toy selection for a pet, which comprises:
a. a pet toy main housing having a plurality of compartments, each compartment adapted to hold at least one pet toy for subsequent dispensing, each compartment having a first state, being a pet toy holding state, and having a second state, being a pet toy dispensing state;
b. movement mechanism connected to each of said plurality of compartments and adapted to independently move each of said plurality of compartments on separate command signals from said first position to said second position to dispense at least one pet toy;
c. control mechanism for receiving wireless signals, including at least one unique signal for each of said plurality of compartments to activate said movement mechanism, said control mechanism being functionally connected to said movement mechanism;
d. at least one pet camera connected to said main housing and camera transmission mechanism for wirelessly transmitting a camera picture to a remote user;
e. a remote user transmitter and receiver, said transmitter keyed to said control means and adapted to permit a remote user to select a compartment and activate at least one pet toy release at will, said receiver including camera picture screen keyed to said pet camera; and,
f. at least one display screen, within proximity of said pet toy main housing to enable a pet to see a remote user.
12. The wirelessly controlled pet toy dispenser with camera of claim 11 wherein said movement mechanisms are selected from the group consisting of (a) a latch opener with a gravity drop door; (b) a tilt mechanism; (c) a push mechanism.
13. The wirelessly controlled pet toy dispenser with camera of claim 11 wherein said plurality of compartments is arranged with at least one row or column.
14. The wirelessly controlled pet toy dispenser with camera of claim 11 wherein said remote user transmitter and receiver includes a microphone and said pet toy main housing includes a speaker in proximity thereto to enable a user to speak to a pet.
15. The wirelessly controlled pet toy dispenser with camera of claim 11 wherein said plurality of compartments is arranged in at least one circle.
16. The wirelessly controlled pet toy dispenser with camera of claim 11 wherein said remote user transmitter and receiver is a computer equipped with internet capability and picture viewing.
17. The wirelessly controlled pet toy dispenser with camera of claim 11 wherein said remote user transmitter and receiver is a picture cell phone.
18. The wirelessly controlled pet toy dispenser with camera of claim 11 wherein said control means is a wireless receiving and transmitting microprocessor.
19. The wirelessly controlled pet toy dispenser with camera of claim 11 wherein said main housing includes wall attachment mechanism for attachment to a wall.
20. The wirelessly controlled pet toy dispenser with camera of claim 11 wherein each of said plurality of compartments contains at least one pet toy and there are at least two different pet toys within said plurality of compartments.

1. A parallel flash programming system for use in motor vehicle assembly, comprising:
an input receptive of information relating to a predetermined number of processors connected to a system bus, processor flash programming attributes, and system bus attributes;
an incremental flash programming times determination module adapted, based on the information, to determine incremental flash programming times of a processor in relation to multiple interframe wait times respective of multiple parallel flash programming schema in accordance with the predetermined number of processors; and
a global flash programming time resolution module adapted to determine, based on incremental flash programming times respective of multiple processors of the predetermined number, an assignment of the multiple processors to a number of parallel programming tracks yielding a global flash programming time in accordance with predetermined criteria.
2. The system of claim 1, wherein said incremental flash programming times determination module is adapted to mathematically determine incremental flash programming times T(i,j) of the processor according to:
T
\u2061

(

i
,
j

)
=
\u2211

x
=
1

m

\u2062

\u2003

\u2062
S

calset
\u2061

(
x
)
S
Buffer
*

(
(

1
+

Roundup
\u2061

(
S
Buffer

–
6

7

)
)

*

(
Bits
frame
P
Bus
+

T
lFWt
)
+

T
FW

+

2
*

T
resp
+

T
FR
)
wherein SBuffer refers to processor buffer size, scalset(x) refers to size of the processor calibration tables, m refers to a total number of calibration tables to be flash programmed for the processor, PBus refers to bus baudrate, Bitsframe refers to a number of bits per frame, TIFWt refers to inter-frame wait time, TFW refers to time to write calibration data in a RAM buffer of the processor to a flash memory device of the processor Tresp refers to a time to transfer a response frame, and TFR refers to a time to a start of flow control frame transmission.
3. The system of claim 2, further comprising an interframe wait times determination module adapted to determine incremental interframe wait times according to:
T
lFW

\u2061

(
j
)
=
j
*
Bits
frame
P
bus
\u2062

\u2003

\u2062
j

=
1
,
2
,
\u2026
\u2062

\u2003

,

N
–
1.
4. The system of claim 1, wherein said input is receptive of a minimum flash programming time T(i, 0) and a maximum flash programming time T(i, N\u22121) of the processor obtained by experimentally programming the processor at a minimum interframe wait time TIFW(0) and a maximum interframe wait time TIWF(1) and recording the results.
5. The system of claim 4, wherein said incremental flash programming times determination module is adapted to determine incremental flash programming times T(i, j) of the processor according to:
T
\u2061

(

i
,
j

)
=
T
\u2061

(

i
,

N
–
1
)
\u2062

(
T
\u2061

(

i
,

N
–
1
)
–

T
\u2061

(

i
,
0

)
T
lFW

\u2061

(
1
)
–
T
lFW

\u2061

(
0
)
)

*
(

N
–
1

)

–
j
*
Bits
frame
P
bus
wherein PBus refers to bus baudrate, and Bitsframe refers to a number of bits per frame.
6. The system of claim 1, wherein said global flash programming time resolution module is adapted to perform multiple combinatorial assignments of processors to various numbers of tracks utilizing constraints specifying at least one processor per track, to determine multiple global programming times based on the multiple combinatorial assignments and the incremental flash programming times, and to select an assignment of processors to a number of tracks that minimizes the global flash programming time.
7. The system of claim 1, wherein said global flash programming time resolution module is adapted to select an interframe wait time based on the incremental flash programming times, and to select a number of parallel programming tracks corresponding to the interframe wait time.
8. The system of claim 7, wherein said global flash programming time resolution module adapted to determine multiple, average flash programming times of multiple interframe wait times based on the incremental flash programming times, to recursively compare an average flash programming time of an interframe wait time to a flash programming time of greatest magnitude of the interframe wait time and record the difference, and to select an interframe wait time at the difference is minimized.
9. The system of claim 7, wherein said global flash programming time resolution module is adapted to recursively designate an empty track as a current track, to designate a pool of unassigned flash programming times associated with the interframe wait time, to calculate a minimum global flash programming time respective of a current recursion as a total of flash programming times of the pool divided by a number of remaining tracks that includes the current track and all empty tracks, to assigning to the current track a flash programming time of greatest magnitude in the pool, thereby removing it from the pool with respect to a subsequent recursion, to calculate a best fit to the current track as a difference between a total of flash programming times assigned to the current track and the minimum global flash programming time, to select a best fitting flash programming time in the pool that most closely matches the best fit, to make a comparison between magnitude differences respective of minimum global flash programming times relating to current and subsequent recursions, wherein the comparison is dependent on whether the best fitting flash programming time is assigned to the current track, and to determine whether to assign the best fitting flash programming time to the current track based on the comparison, thereby minimizing differences between flash programming times of precedent and subsequent tracks.
10. The system of claim 1, further comprising a parallel flash programming module adapted to parallel flash program multiple processors in accordance with the assignment of the multiple processors to the number of parallel programming tracks, wherein the multiple processors are of the predetermined number, possess the processor flash programming characteristics, and are connected to a common system bus having the system bus attributes.
11. A parallel flash programming method for parallel flash programming multiple processors connected to a common bus, comprising:
receiving information relating to a predetermined number of processors connected to a system bus, processor flash programming attributes, and system bus attributes;
determining, based on the information, incremental flash programming times of a processor in relation to multiple interframe wait times respective of multiple parallel flash programming schema in accordance with the predetermined number of processors; and
determining, based on incremental flash programming times respective of multiple processors of the predetermined number, an assignment of the multiple processors to a number of parallel programming tracks yielding a global flash programming time in accordance with predetermined criteria.
12. The method of claim 11, further comprising mathematically determining incremental flash programming times T(i,j) of the processor according to:
T
\u2061

(

i
,
j

)
=
\u2211

x
=
1

m

\u2062

\u2003

\u2062
S

calset
\u2061

(
x
)
S
Buffer
*

(
(

1
+

Roundup
\u2061

(
S
Buffer

–
6

7

)
)

*

(
Bits
frame
P
Bus
+

T
lFWt
)
+

T
FW

+

2
*

T
resp
+

T
FR
)
wherein SBuffer refers to processor buffer size, Scalset(x) refers to size of the processor calibration tables, m refers to a total number of calibration tables to be flash programmed for the processor, PBus refers to bus baudrate, Bitsframe refers to a number of bits per frame, TIFWt refers to inter-frame wait time, TFW refers to time to write calibration data in a RAM buffer of the processor to a flash memory device of the processor Tresp refers to a time to transfer a response frame, and TFR refers to a time to a start of flow control frame transmission.
13. The method of claim 12, further comprising determining incremental interframe wait times according to,
T
lFW

\u2061

(
j
)
=
j
*
Bits
frame
P
bus
\u2062

\u2003

\u2062
j

=
1
,
2
,
\u2026
\u2062

\u2003

,

N
–
1.
14. The method of claim 11, further comprising experimentally determining a minimum flash programming time T(i, 0) and a maximum flash programming time T(i, N\u22121) of the processor by programming the processor at a minimum interframe wait time TIFW(0) and a maximum interframe wait time TIFW(1) and recording the results.
15. The method of claim 14, further comprising determining incremental flash programming times T(i,j) of the processor according to:
T
\u2061

(

i
,
j

)
=
T
\u2061

(

i
,

N
–
1
)
\u2062

(
T
\u2061

(

i
,

N
–
1
)
–

T
\u2061

(

i
,
0

)
T
lFW

\u2061

(
1
)
–
T
lFW

\u2061

(
0
)
)

*
(

N
–
1

)

–
j
*
Bits
frame
P
bus
wherein PBus baudrate, and Bitsframe refers to a number of bits per frame.
16. The method of claim 11, further comprising:
performing multiple combinatorial assignments of processors to various numbers of tracks utilizing constraints specifying at least one processor per track;
determining multiple global programming times based on the multiple combinatorial assignments and the incremental flash programming times; and
selecting an assignment of processors to a number of tracks that minimizes the global flash programming time.
17. The method of claim 11, further comprising:
selecting an interframe wait time based on the incremental flash programming times;
selecting a number of parallel programming tracks corresponding to the interframe wait time.
18. The method of claim 17, further comprising:
determining multiple, average flash programming times of multiple interframe wait time based on the incremental flash programming times;
recursively comparing an average flash programming time of an interframe wait time to a flash programming time of greatest magnitude of the interframe wait time and recording the difference; and
selecting an interframe wait time at which the difference is minimized.
19. The method of claim 17, further comprising:
recursively designating an empty track as a current track;
designating a pool of unassigned flash programming times associated with the interframe wait time;
calculating a minimum global flash programming time respective of a current recursion as a total of flash programming times of the pool divided by a number of remaining tracks that includes the current track and all empty tracks;
assigning to the current track a flash programming time of greatest magnitude in the pool, thereby removing it from the pool with respect to a subsequent recursion;
calculating a best fit to the current track as a difference between a total of flash programming times assigned to the current track and the minimum global flash programming time;
selecting a best fitting flash programming time in the pool that most closely matches the best fit;
making a comparison between magnitude differences respective of minimum global flash programming times relating to current and subsequent recursions, wherein the comparison is dependent on whether the best fitting flash programming time is assigned to the current track; and
determining whether to assign the best fitting flash programming time to the current track based on the comparison, thereby minimizing differences between flash programming times of precedent and subsequent tracks.
20. The method of claim 11, further comprising parallel flash programming multiple processors in accordance with the assignment of the multiple processors to the number of parallel programming tracks,.wherein the multiple processors are of the predetermined number, possess the processor flash programming characteristics, and are connected to a common system bus having the system attributes.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1-3. (canceled)
4. A double-coated pressure-sensitive adhesive tape comprising:
a core having a thickness of no greater than 20 \u03bcm, wherein the core comprises a nonwoven fabric and
a pressure-sensitive adhesive layer on both sides of said core material, wherein the pressure sensitive adhesive comprises an acrylic-based polymer having a glass transition temperature (Ig) of between \u221220\xb0 C. and 20\xb0 C. and a weight-average molecular weight of 1 million or greater;

wherein said double-coated pressure-sensitive adhesive tape has a total thickness of no greater than 60 \u03bcm.
5. The double-coated pressure-sensitive adhesive tape according to claim 4, wherein the acrylic-based polymer comprises the copolymerization product of
(a) 0.01 to 20% by weight of on or more monomers with a radical polymerizable unsaturated group and at least one reactive functional group, and
(b) 80 to 99.99% by weight of one or more (meth)acrylic acid ester-based monomer other than monomer (a).
6. The double-coated pressure-sensitive adhesive tape according to claim 5, wherein the acrylic-based polymer comprises the copolymerization product of monomer (a), monomer (b), and up to 20% by weight of (c) a monomer selected from the group consisting of vinyl acetate, styrene, methylstyrene, vinyl toluene, and acrylonitrile.
7. The double-coated pressure-sensitive adhesive tape according to claim 4, wherein the acrylic-based polymer has a weight-average molecular weight of no greater than 2.5 million.
8. The double-coated pressure-sensitive adhesive tape according to claim 4, wherein the pressure-sensitive adhesive further comprises 1 to 50 parts by weight of tackifier per 100 parts by weight of the acrylic-based polymer.
9. The double-coated pressure-sensitive adhesive tape according to claim 4, wherein the pressure-sensitive adhesive further comprises a crosslinking agent, wherein the crosslinking agent is a polyfunctional compound having functional groups that react with the reactive functional group of monomer (a).
10. The double-coated pressure-sensitive adhesive tape according to claim 9, wherein the acrylic-based copolymer comprises a carboxyl group and the crosslinking agent is an epoxy-based compound.
11. The double-coated pressure-sensitive adhesive tape according to claim 4, wherein the non-woven fabric comprises natural fibers selected from the group consisting of cotton, hemp, or rayon.
12. The double-coated pressure-sensitive adhesive tape according to claim 4, wherein the non-woven fabric comprises synthetic fibers selected from the group consisting of polyimide and glass.
13. The double-coated pressure-sensitive adhesive tape according to claim 4, wherein the non-woven fabric has a basis weight of no greater than 10 grams per square meter.
14. The double-coated pressure-sensitive adhesive tape according to claim 4, wherein the non-woven fabric has a tensile strength of at least 1 Newton per 15 millimeters when measured at 300 millimeters per minute.
15. A method of attaching a flexible circuit board to an adherend comprising attaching a double-coated pressure sensitive adhesive tape to a backside or the flexible circuit board, subjecting the flexible circuit board to a solder reflow step at a temperature of at least 240\xb0 C., and attaching the backside of the circuit board to the adherend via the double-coated pressure sensitive adhesive tape, wherein the double-coated pressure-sensitive adhesive tape comprises:
a core having a thickness of no greater than 20 \u03bcm, wherein the core comprises a nonwoven fabric and
a pressure-sensitive adhesive layer on both sides of said core material,

wherein the pressure sensitive adhesive comprises an acrylic-based polymer having a glass transition temperature (Tg) of between \u221220\xb0 C. and 20\xb0 C. and a weight-average molecular weight of 1 million or greater;
wherein said double-coated pressure-sensitive adhesive tape has a total thickness of no greater than 60 \u03bcm.
16. The method according to claim 15, wherein the acrylic-based polymer comprises the copolymerization product of
(a) 0.01 to 20% by weight of on or more monomers with a radical polymerizable unsaturated group and at least one reactive functional group, and
(b) 80 to 99.99% by weight of one or more (meth)acrylic acid ester-based monomer other than monomer (a).
17. The method according to claim 16, wherein the pressure-sensitive adhesive further comprises a crosslinking agent, wherein the crosslinking agent is a polyfunctional compound having functional groups that react with the reactive functional group of monomer (a).
18. The method according to claim 17, wherein the acrylic-based copolymer comprises a carboxyl group and the crosslinking agent is an epoxy-based compound.
19. The method according to claim 15, wherein the solder reflow step occurs at a temperature of at least 260\xb0 C.