1461139019-0dccbf6e-6b50-496e-899a-30eee9baecd3

1: A driving power supply circuit for controlling a driving voltage to have the voltage between a lower reference voltage and a upper reference voltage and for outputting said driving voltage from an output comprising;
a p-channel MOS transistor being connected between a power supply voltage and said output node and being configured to become on-state when a first signal has a low logic level (hereinafter referred to as level \u201cL\u201d) and become off-state when said first signal has a high level (hereinafter referred to as level \u201cH\u201d);
a n-channel MOS transistor being connected between said output node and a ground voltage and being configured to become off-state when a second signal has level \u201cL\u201d and become on-state when said second signal has level \u201cH\u201d;
a first comparing circuit being configured to compare said driving voltage to said reference voltage when said second signal has level \u201cL\u201d, being configured to set said first signal to level \u201cH\u201d and output said first signal when said driving voltage is higher than said reference voltage, and being configured to set said first signal to level \u201cL\u201d and output said first signal when said driving voltage is lower than said reference voltage, and being configured to halt the operation thereof, set said first signal to level \u201cH\u201d, and output said first signal when said second signal has level \u201cL\u201d;
a second comparing circuit being configured to compare said driving voltage to said reference voltage when said second signal has level \u201cH\u201d, being configured to set said second signal to level \u201cH\u201d and output said second signal when said driving voltage is higher than said reference voltage, being configured to set said second signal to level \u201cL\u201d and output said second signal when said driving voltage is lower than said reference voltage, and being configured to halt the operation thereof, set said second signal to level \u201cL\u201d, and output said second signal when said first signal has level \u201cL\u201d.
2. A driving power supply circuit for controlling a driving voltage to have the voltage between a lower reference voltage and a upper reference voltage and for outputting said driving voltage from an output comprising;
a p-channel MOS transistor being connected between a power supply voltage and said output node and being configured to become on-state when a first signal has level \u201cL\u201d and become off-state when said first signal has level \u201cH\u201d;
a n-channel MOS transistor being connected between said output node and a ground voltage and being configured to become off-state when a second signal has level \u201cL\u201d and become on-state when said second signal has level \u201cH\u201d;
a logic circuit being configured to output a first control signal when said first signal and said second signal have level \u201cL\u201d, being configured to output a second control signal when said first signal and said second signal have level \u201cH\u201d, and being configured to output a third control signal when said first signal has level \u201cH\u201d and said second signal have level \u201cL\u201d;
a first comparing circuit being configured to compare said driving voltage to said reference voltage in a high-speed-operation mode when said first control signal is provided thereto, being configured to compare said driving voltage to said reference voltage in a low-power-consumption mode when said third control signal is provided thereto, being configured to set said first signal to level \u201cH\u201d and output said first signal when said driving voltage is higher than said reference voltage, and being configured to set said first signal to level \u201cL\u201d and output said first signal when said driving voltage is lower than said reference voltage;
a second comparing circuit being configured to compare said driving voltage to said reference voltage in a high-speed-operation mode when said second control signal is provided thereto, being configured to compare said driving voltage to said reference voltage in a low-power-consumption mode when said third control signal is provided thereto, being configured to set said second signal to level \u201cH\u201d and output said second signal when said driving voltage is higher than said reference voltage, being configured to set said second signal to level \u201cL\u201d and output said second signal when said driving voltage is lower than said reference voltage.
3. The driving voltage circuit according to claim 2, being configured to output said first, said second, and said third control signal in the case where a changing signal indicating that a load side circuit supplying said driving voltage is changed is given thereto when said first signal has level \u201cH\u201d and said second signal has level \u201cL\u201d.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A transceiver, comprising:
a transmitter portion including a digital-to-analog converter (DAC);
a receiver portion configured to receive RF signals in a receive frequency band; and
a variable rate clock generator operable to control said DAC,
wherein the rate of a variable rate clock provided by the variable rate clock generator is adjustable so that an upconverted version of a DAC image created by said DAC is shifted in frequency away from frequencies within said receive frequency band.
2. The transceiver of claim 1, further comprising a data rate converter configured to receive digital data and provide rate converted digital data to said DAC.
3. The transceiver of claim 2 wherein the data rate converter provides said rate converted data to said DAC according to the variable rate clock provided by the variable rate clock generator.
4. The transceiver of claim 1 wherein the transmitter portion further includes a digital filter that functions as a notch filter, said digital filter configured so that its notch frequency falls within the receive frequency band.
5. The transceiver of claim 4 wherein the digital filter is controlled by the variable rate clock provided by the variable rate clock generator.
6. The transceiver of claim 4, further comprising a data rate converter configured to receive digital data and provide rate converted digital data to said DAC.
7. The transceiver of claim 6 wherein the data rate converter provides said rate converted data according to the variable rate clock provided by the variable rate clock generator.
8. The transceiver of claim 6 wherein the functionality of the data rate converter is merged with the functionality of the digital filter.
9. A method of processing signals in a transceiver, comprising:
receiving a digital baseband signal from a digital source;
converting the digital baseband signal to an analog baseband signal according to an adjustable oversampling clock; and
upconverting the analog baseband signal to a radio frequency (RF) signal,
wherein converting the digital baseband signal to an analog baseband signal includes adjusting the rate of the adjustable oversampling clock so that an image created by the conversion process does not fall within a receive frequency band when the image is upconverted to RF by the upconversion process.
10. The method of claim 9, further comprising filtering the digital baseband signal using a digital low-pass filter that functions as a notch filter.
11. The method of claim 10 wherein a notch frequency of said the digital low-pass filter is configured so that it falls within the receive frequency band.
12. The method of claim 11 wherein the notch frequency of the digital low-pass filter is controlled by the adjustable oversampling clock.
13. A transceiver capable of transmitting and receiving in different transmit and frequency bands, comprising:
a polar modulation transmitter having a magnitude path and a phase path, at least one of said magnitude and phase paths having a digital-to-analog converter (DAC) configured to receive digital baseband signals from a digital source;
a receiver that can be configured to receive radio frequency (RF) signals in any one of several possible receive frequency bands; and
an oversampling clock generator operable to provide an oversampling clock to a clock input of said DAC, wherein the oversampling clock provided by the oversampling clock generator is adjustable so that a DAC image created by the DAC and upconverted to RF is shifted away from the receive frequency band in which the receiver is configured to receive.
14. The transceiver of claim 13 wherein at least one of said magnitude and phase paths of said transmitter includes a digital filter that operates as a notch filter.
15. The transceiver of claim 14 wherein the digital filter is configured so that its notch frequency falls within the frequency band in which the receiver is configured to receive.
16. The transceiver of claim 14 wherein the digital filter is controlled by the variable rate oversampling clock provided by the oversampling clock generator.
17. A mobile communication device, comprising:
baseband circuitry operable to generate digital symbols;
a transmitter having a digital-to-analog converter (DAC) that is operable to convert the digital symbols to analog signals;
a receiver configured to receive RF signals in one or more receive frequency bands; and
means for frequency shifting an upconverted version of a DAC image created by the DAC to a frequency region that does not substantially overlap with a receive frequency band in which the receiver is configured to receive.
18. The mobile communication device of claim 17 wherein said means for shifting a DAC image is configured to frequency shift the DAC image by an amount that depends on which one of said one or more receive frequency bands the receiver is configured to receive.
19. The mobile communication device of claim 18 wherein the transmitter further comprises a digital filter configured to filter the digital symbols, said digital filter having an adjustable notch frequency.
20. The mobile communication device of claim 19 wherein the digital filter is controlled by a sampling clock provided by the means for frequency shifting a DAC image.
21. A transceiver, comprising:
a transmitter portion including a digital-to-analog converter (DAC);
a receiver portion configured to receive RF signals in a receive frequency band; and
a variable rate clock generator operable to control said DAC,
wherein the rate of a variable rate clock provided by the variable rate clock generator is determined based on an operating band of a standard the transceiver is currently configured to operate in.

1461139008-701be69f-f69d-4458-86dd-b03ced34af48

1. A method of protecting data with application layer forward error correction in a communication system, the communication system including first devices with legacy receivers and second devices with FEC-enabled receivers, wherein operation of the legacy receivers is not affected by the application layer forward error correction, the method comprising:
determining a duration period;
assembling packets of source data into source blocks corresponding to the duration period, each source block comprising a number of packets of source data;
encoding the source blocks to generate encoded blocks, each encoded block comprising a number of packets of repair data; and
transmitting the packets of repair data.
2. The method of claim 1, wherein the data comprises Digital Video Broadcasting\u2014Terrestrial data.
3. The method of claim 1, further comprising separating or partitioning the packets of source data from a data stream.
4. The method of claim 1, wherein the number of packets of repair data of an encoded block is greater than the number of packets of source data of a source block.
5. The method of claim 1, further comprising determining which packets of source data from a data stream to assemble into source blocks, wherein at least some of the packets of source data from the data stream are not assembled into source blocks.
6. The method of claim 1, further comprising determining a protection amount for the source blocks, wherein the source blocks are encoded based on the protection amount.
7. A method of receiving data protected with application layer forward error correction in a communication system, the communication system including first devices with legacy receivers and second devices with FEC-enabled receivers, wherein operation of the legacy receivers is not affected by the application layer forward error correction, the method comprising:
receiving packets of repair data;
assembling the received packets of repair data into encoded blocks, each encoded block comprising a number of packets of repair data;
decoding the encoded blocks to generate source blocks, each source block corresponding to a predetermined duration period and comprising a number of packets of source data; and
assembling the packets of source data to reproduce a transmitted data stream.
8. The method of claim 7, wherein the transmitted data stream comprises Digital Video Broadcasting\u2014Terrestrial data.
9. The method of claim 7, further comprising separating or partitioning the packets of repair data from a received data stream.
10. The method of claim 7, wherein the encoded blocks are decoded based on a predetermined protection amount.
11. An apparatus configured to protect data with application layer forward error correction in a communication system, the communication system including first devices with legacy receivers and second devices with FEC-enabled receivers, wherein operation of the legacy receivers is not affected by the application layer forward error correction, the apparatus comprising:
a processor configured to determine a duration period, and assemble packets of source data into source blocks corresponding to the duration period, each source block comprising a number of packets of source data;
an encoder communicatively coupled to the processor and configured to encode the source blocks to generate encoded blocks, each encoded block comprising a number of packets of repair data; and
a transmitter communicatively coupled to the encoder and configured to transmit the packets of repair data.
12. The apparatus of claim 11, wherein the data comprises Digital Video Broadcasting\u2014Terrestrial data.
13. The apparatus of claim 11, wherein the processor is further configured to separate or partition the packets of source data from a data stream.
14. The apparatus of claim 11, wherein the number of packets of repair data of an encoded block is greater than the number of packets of source data of a source block.
15. The apparatus of claim 11, wherein the processor is further configured to determine which packets of source data from a data stream to assemble into source blocks, wherein at least some of the packets of source data from the data stream are not assembled into source blocks.
16. The apparatus of claim 11, wherein
the processor is further configured to determine a protection amount for the source blocks; and
the encoder is configured to encode the source blocks based on the protection amount.
17. An apparatus configured to receive data protected with application layer forward error correction in a communication system, the communication system including devices with legacy receivers, wherein operation of the legacy receivers is not affected by the application layer forward error correction, the apparatus comprising:
a receiver configured to receive packets of repair data;
an assembly module communicatively coupled to the receiver and configured to assemble the received packets of repair data into encoded blocks, each encoded block comprising a number of packets of repair data; and
a decoder communicatively coupled to the assembly module and configured to decode the encoded blocks to generate source blocks, each source block corresponding to a predetermined duration period and comprising a number of packets of source data, wherein
the assembly module is further configured to assemble the packets of source data to reproduce a transmitted data stream.
18. The apparatus of claim 17, further comprising a processor communicatively coupled to the receiver and configured to determine that an identifier associated with the repair data corresponds with a desired service.
19. The apparatus of claim 18, wherein
the receiver is configured to receive the packets of repair data as part of a received data stream comprising the packets of repair data, packets of source data of the desired service, and packets of data of other services; and
the apparatus further comprises a de-multiplexer communicatively coupled to the receiver and configured to de-multiplex the packets of repair data and the packets of source data of the desired service from the received data stream.
20. The apparatus of claim 17, wherein the transmitted data stream comprises Digital Video Broadcasting\u2014Terrestrial data.
21. The apparatus of claim 17, wherein the decoder is configured to decode the encoded blocks based on a predetermined protection amount.
22. An apparatus configured to receive data protected with application layer forward error correction in a communication system, the apparatus comprising:
a receiver configured to receive packets of source data of a desired service and packets of repair data for the desired service, wherein the repair data is for correcting errors in the source data of the desired service;
a processor communicatively coupled to the receiver and configured to determine that a first identifier associated with the source data corresponds with the desired service, determine that a second identifier associated with the repair data does not correspond with the desired service, and discard the packets of repair data; and
an assembly module communicatively coupled to the processor and configured to assemble the packets of source data to reproduce a transmitted data stream of the desired service.
23. The apparatus of claim 22, wherein the transmitted data stream comprises Digital Video Broadcasting\u2014Terrestrial data.
24. A computer program product for protecting data with application layer forward error correction in a communication system, the communication system including first devices with legacy receivers and second devices with FEC-enabled receivers, wherein operation of the legacy receivers is not affected by the application layer forward error correction, the product comprising:
a processor-readable medium storing processor-readable instructions configured to cause a processor to:
determine a duration period;
assemble packets of source data into source blocks corresponding to the duration period, each source block comprising a number of packets of source data;
encode the source blocks to generate encoded blocks, each encoded block comprising a number of packets of repair data; and
transmit the packets of repair data.
25. The product of claim 24, wherein the data comprises Digital Video Broadcasting\u2014Terrestrial data.
26. The product of claim 24, wherein the processor-readable medium is further configured to cause the processor to separate or partition the packets of source data from a data stream.
27. The product of claim 24, wherein the number of packets of repair data of an encoded block is greater than the number of packets of source data of a source block.
28. The product of claim 24, wherein the processor-readable medium is further configured to cause the processor to determine which packets of source data from a data stream to assemble into source blocks, wherein at least some of the packets of source data from the data stream are not assembled into source blocks.
29. The product of claim 24, wherein the processor-readable medium is further configured to cause the processor to determine a protection amount for the source blocks, wherein the source blocks are encoded based on the protection amount.
30. A computer program product for receiving data protected with application layer forward error correction in a communication system, the communication system including first devices with legacy receivers and second devices with FEC-enabled receivers, wherein operation of the legacy receivers is not affected by the application layer forward error correction, the product comprising:
a processor-readable medium storing processor-readable instructions configured to cause a processor to:
receive packets of repair data;
assemble the received packets of repair data into encoded blocks, each encoded block comprising a number of packets of repair data;
decode the encoded blocks to generate source blocks, each source block corresponding to a predetermined duration period and comprising a number of packets of source data; and
assemble the packets of source data to reproduce a transmitted data stream.
31. The product of claim 30, wherein the transmitted data stream comprises Digital Video Broadcasting\u2014Terrestrial data.
32. The product of claim 30, wherein the processor-readable medium is further configured to cause the processor to separate or partition the packets of repair data from a received data stream.
33. The product of claim 30, wherein the encoded blocks are decoded based on a predetermined protection amount.
34. A system configured to protect data with application layer forward error correction in a communication system, the communication system including first devices with legacy receivers and second devices with FEC-enabled receivers, wherein operation of the legacy receivers is not affected by the application layer forward error correction, the system comprising:
means for determining a duration period;
means for assembling packets of source data into source blocks corresponding to the duration period, each source block comprising a number of packets of source data;
means for encoding the source blocks to generate encoded blocks, each encoded block comprising a number of packets of repair data; and
means for transmitting the packets of repair data.
35. The system of claim 34, wherein the data comprises Digital Video Broadcasting\u2014Terrestrial data.
36. The system of claim 34, further comprising means for separating or partitioning the packets of source data from a data stream.
37. The system of claim 34, wherein the number of packets of repair data of an encoded block is greater than the number of packets of source data of a source block.
38. The system of claim 34, further comprising means for determining which packets of source data from a data stream to assemble into source blocks, wherein at least some of the packets of source data from the data stream are not assembled into source blocks.
39. The system of claim 34, further comprising means for determining a protection amount for the source blocks, wherein the source blocks are encoded based on the protection amount.
40. A system configured to receive data protected with application layer forward error correction in a communication system, the communication system including first devices with legacy receivers and second devices with FEC-enabled receivers, wherein operation of the legacy receivers is not affected by the application layer forward error correction, the system comprising:
means for receiving packets of repair data;
means for assembling the received packets of repair data into encoded blocks, each encoded block comprising a number of packets of repair data;
means for decoding the encoded blocks to generate source blocks, each source block corresponding to a predetermined duration period and comprising a number of packets of source data; and
means for assembling the packets of source data to reproduce a transmitted data stream.
41. The system of claim 40, wherein the transmitted data stream comprises Digital Video Broadcasting\u2014Terrestrial data.
42. The system of claim 40, further comprising means for separating or partitioning the packets of repair data from a received data stream.
43. The system of claim 40, wherein the encoded blocks are decoded based on a predetermined protection amount.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

We claim:

1. A UV-emitting phosphor blend comprising a mixture of at least two UVA-emitting phosphors selected from SrB4O7:Eu, YPO4:Ce, and BaSi2O5:Pb, the sum of the weight percentages of the phosphors in the mixture equaling 100%, the phosphor blend additionally containing an optional amount of a UVB-emitting phosphor having a range from 0 to 12 wt. % of the mixture.
2. The phosphor blend of claim 1 wherein the mixture of UVA-emitting phosphors comprises 0 to 50 wt. % SrB4O7:Eu, 0 to 40 wt. % YPO4:Ce, and 30 to 70 wt. % BaSi2O5:Pb.
3. The phosphor blend of claim 1 wherein the mixture of UVA-emitting phosphors comprises 30 to 40 wt. % SrB4O7:Eu, 30 to 40 wt. % YPO4:Ce, and 30 to 40 wt. % BaSi2O5:Pb.
4. The phosphor blend of claim 1 wherein the mixture of UVA-emitting phosphors comprises 30 to 35 wt. % SrB4O7:Eu, 30 to 35 wt. % YPO4:Ce, and 30 to 35 wt. % BaSi2O5:Pb.
5. The phosphor blend of claim 1 wherein the mixture of UVA-emitting phosphors comprises about 33.3 wt. % SrB4O7:Eu, about 33.3 wt. % YPO4:Ce, and about 33.3 wt. % BaSi2O5:Pb.
6. The phosphor blend of claim 1 wherein the mixture of UVA-emitting phosphors comprises 0 to 20 wt. % SrB4O7:Eu, 0 to 20 wt. % YPO4:Ce, and 50 to 70 wt. % BaSi2O5:Pb.
7. The phosphor blend of claim 1 wherein the mixture of UVA-emitting phosphors comprises 15 to 20 wt. % SrB4O7:Eu, 15 to 20 wt. % YPO4:Ce, and 65 to 70 wt. % BaSi2O5:Pb.
8. The phosphor blend of claim 1 wherein the mixture of UVA-emitting phosphors comprises about 16.7 wt. % SrB4O7:Eu, about 16.7 wt. % YPO4:Ce, and about 66.6 wt. % BaSi2O5:Pb.
9. The phosphor blend of claim 1 wherein the mixture of UVA-emitting phosphors comprises 40 to 60 wt. % SrB4O7:Eu and 40 to 60 wt. % BaSi2O5:Pb.
10. The phosphor blend of claim 1 wherein the mixture of UVA-emitting phosphors comprises 45 to 55 wt. % SrB4O7:Eu and 45 to 55 wt. % BaSi2O5:Pb.
11. The phosphor blend of claim 1 wherein the mixture of UVA-emitting phosphors comprises about 50 wt. % SrB4O7:Eu and about 50 wt. % BaSi2O5:Pb.
12. The phosphor blend of claim 1 wherein the mixture of UVA-emitting phosphors comprises 40 to 60 wt. % SrB4O7:Eu and 40 to 60 wt. % YPO4:Ce.
13. The phosphor blend of claim 1 wherein the mixture of UVA-emitting phosphors comprises 45 to 55 wt. % SrB4O7:Eu and 45 to 55 wt. % YPO4:Ce.
14. The phosphor blend of claim 1 wherein the mixture of UVA-emitting phosphors comprises about 50 wt. % SrB4O7:Eu and about 50 wt. % YPO4: Ce.
15. A fluorescent tanning lamp having a UV-transmissive envelope and a phosphor coating on an inner wall of the envelope, the phosphor coating containing a UV-emitting phosphor blend comprising a mixture of at least two UVA-emitting phosphors selected from SrB4O7:Eu, YPO4:Ce, and BaSi2O5:Pb, the phosphor blend additionally containing an optional amount of a UVB-emitting phosphor having a range from 0 to 12 wt. % of the mixture.
16. The fluorescent lamp of claim 15 wherein the lamp exhibits a 100h UVA maintenance of at least about 87%.
17. The fluorescent lamp of claim 16 wherein the lamp exhibits a 0 h UVA output of at least about 8800 Wcm2.
18. The fluorescent lamp of claim 16 wherein the mixture of UVA-emitting phosphors comprises 40 to 60 wt. % SrB4O7:Eu and 40 to 60 wt. % YPO4:Ce.
19. The fluorescent lamp of claim 17 wherein the mixture of UVA-emitting phosphors comprises 0 to 50 wt. % SrB4O7:Eu, 0 to 40 wt. % YPO4:Ce, and 30 to 70 wt. % BaSi2O5:Pb.
20. The fluorescent lamp of claim 17 wherein the mixture of UVA-emitting phosphors comprises 0 to 20 wt. % SrB4O7:Eu, 0 to 20 wt. % YPO4:Ce, and 50 to 70 wt. % BaSi2O5:Pb.
21. The fluorescent lamp of claim 17 wherein the mixture of UVA-emitting phosphors comprises 40 to 60 wt. % SrB4O7:Eu and 40 to 60 wt. % BaSi2O5:Pb.
22. The fluorescent lamp of claim 17 wherein the envelope is tubular and further contains a reflector layer extending over a 220 segment of the circumference of the envelope, the reflector layer being disposed between the envelope and the phosphor layer, the phosphor layer extending over the entire circumference of the envelope.
23. The fluorescent lamp of claim 15 wherein the lamp exhibits a 100 h UVB maintenance of at least about 90%.
24. The fluorescent lamp of claim 15 wherein the lamp exhibits a normalized spectral power distribution as shown in FIG. 6.
25. The fluorescent lamp of claim 15 wherein the lamp exhibits a normalized spectral power distribution defined by:
7
Wavelength
Normalized
Range
Intensity
(nm)
(%)
280-283
0.01-0.02
284-290
0.03-0.15
291-297
0.15-0.6
298-306
0.5-1
307-311
1-2
312-314
3-5
315-326
1-5
327-335
6-17
336-340
18-20
341-352
20-35
353-360
36-66
361-366
71-100
367-372
96-75
373-377
71-49
378-381
45-32
382-388
29-13
389-400
13-3
26. A UV-emitting phosphor blend comprising 62.3 wt. % BaSi2O5:Pb, 15.6 wt. % SrB4O7:Eu, 15.6 wt. % YPO4:Ce, and 6.5 wt. % SrCe0.08MgAl11O18.
27. A fluorescent tanning lamp having a UV-transmissive envelope and a phosphor coating on an inner wall of the envelope, the phosphor coating containing a UV-emitting phosphor blend comprising 62.3 wt. % BaSi2O5:Pb, 15.6 wt. % SrB4O7:Eu, 15.6 wt. % YPO4:Ce, and 6.5 wt. % SrCe0.08MgAl11O18.
28. The phosphor blend of claim 1 wherein the UVB-emitting phosphor is selected from Ce(Sr,Mg)Al11O19:Ce, Ce(Ca,Mg)A11O19:Ce, Ce(Ba,Mg)A11O19:Ce or LaPO4:Ce.
29. The fluorescent lamp of claim 15 wherein the UVB-emitting phosphor is selected from Ce(Sr,Mg)A11O19:Ce, Ce(Ca,Mg)A11O19:Ce, Ce(Ba,Mg)A11O19:Ce or LaPO4:Ce.