Author: claimsbot

1. A carbazole compound represented by General Formula (G3),
wherein, in the formula:
R1 to R5 each independently represent any of hydrogen, an unsubstituted phenyl group, and an unsubstituted biphenyl group; and
n is 0.
2. A carbazole compound represented by General Formula (G4),
wherein, in the formula:
R2 to R5 each independently represent any of hydrogen, an unsubstituted phenyl group, and an unsubstituted biphenyl group; and
n is 0.
3. A carbazole compound represented by Structural Formula (100)

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An optoelectronic component comprising:
a first semiconductor layer stack, which has an active layer designed for the emission of radiation and a main area;
a separating layer, which is arranged on the main area of the first semiconductor layer stack, wherein the separating layer forms a semitransparent mirror;
a second semiconductor layer stack, which is arranged at the separating layer and which has a further active layer designed for the emission of radiation and a main area;
a first contact element of the first semiconductor layer stack arranged on a further main area of the first semiconductor layer stack, wherein the further main area lies opposite the main area; and
a second contact element of the first semiconductor layer stack on an again further main area of the first semiconductor layer stack, wherein the again further main area is arranged between the main area and the further main area, wherein the first contact element and the second contact element provide an electrical contact of the active layer of the first semiconductor layer stack.
2. The optoelectronic component as claimed in claim 1, wherein the emittable radiation of the active layer of the first semiconductor layer stack couples into the second semiconductor layer stack and the emittable radiation of the active layer of the first semiconductor layer stack and the emittable radiation of the active layer of the second semiconductor layer stack are emittable from the main area of the second semiconductor layer stack.
3. The optoelectronic component as claimed in claim 1, wherein the active layer of the first semiconductor layer stack is designed to emit radiation of a first wavelength range, and the active layer of the second semiconductor layer stack is designed to emit radiation of a second wavelength range.
4. The optoelectronic component as claimed in claim 3, wherein the separating layer is transparent to radiation of the first wavelength range and is embodied for reflecting radiation of the second wavelength range.
5. The optoelectronic component as claimed in claim 1, wherein the separating layer comprises at least two layers, wherein the layers have at least two different refractive indices.
6. The optoelectronic component as claimed in claim 1, wherein the separating layer comprises an electrically conducting material.
7. The optoelectronic component as claimed in claim 1, wherein the separating layer comprises a dielectric.
8. The optoelectronic component as claimed in claim 1, wherein the separating layer has a structuring.
9. The optoelectronic component as claimed in claim 7, wherein the separating layer comprises at least one cutout into which an electrically conducting material is introduced.
10. The optoelectronic component as claimed in claim 1, further comprising:
a first contact element arranged at the second semiconductor layer stack, and
a second contact element arranged at the second semiconductor layer stack, wherein the first contact element and the second contact element provide an electrical contact of the active layer of the second semiconductor layer stack.
11. The optoelectronic component as claimed in claim 1, wherein the different semiconductor layer stacks are in each case individually drivable.
12. The optoelectronic component as claimed in claim 1, further comprising: a converter substance for the partial wavelength conversion of radiation, wherein the converter substance is arranged at the main area of the second semiconductor layer stack.
13. A method for producing an optoelectronic component, comprising:
providing a first substrate;
producing a first semiconductor layer stack having an active layer designed for the emission of radiation on the first substrate;
stripping away the substrate from the first semiconductor layer stack;
providing a second substrate;
producing a second semiconductor layer stack having an active layer suitable for the emission of radiation on the second substrate;
stripping away the second substrate from the second semiconductor layer stack;
applying a separating layer, which forms a semitransparent mirror, on at least one of the semiconductor layer stacks;
applying the second semiconductor layer stack to the first semiconductor layer stack, such that the separating layer is arranged between the first and the second semiconductor layer stacks;
forming a first contact element of the first semiconductor layer stack arranged on a further main area of the first semiconductor layer stack, wherein the further main area lies opposite the main area; and
forming a second contact element of the first semiconductor layer stack on an again further main area of the first semiconductor layer stack, wherein the again further main area is arranged between the main area and the further main area, wherein the first contact element and the second contact element provide an electrical contact of the active layer of the first semiconductor layer stack.
14. The method as claimed in claim 13, comprising:
forming at least one cutout of the separating layer; and
filling the cutout of the separating layer with an electrically conducting material.

1. A method for treating a patient infected with Hepatitis C Virus, the method comprising administering to the patient a therapeutically effective amount of a compound of formula (I)
or a pharmaceutically acceptable salt thereof.
2. The method of claim 1 further comprising administering an additional antiviral agent prior to, currently with, or following the administration of the compound of formula (I) or a pharmaceutically acceptable salt thereof.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

What is claimed is:

1. A connection structure between an electronic device and a substrate therefor, comprising:
at least one conductive pad on said electronic device;
at least one conductive pad on said substrate;
a solder ball positioned between said at least one conductive pad on said electronic device and said at least one conductive pad on said substrate;
insulating material surrounding and in contact with said solder ball to enclose said solder ball; and
at least one volume expansion region adjacent a portion of said solder ball to accommodate volume expansion of said solder ball during reflow.
2. The connection structure of claim 1 wherein each said volume expansion region comprises:
a via through said at least one conductive pad on said substrate adjacent said solder ball; and
a cavity expansion region formed in said substrate adjacent said via to accommodate volume expansion of said solder ball during reflow.
3. The connection structure of claim 2 wherein an elastic material is positioned across said cavity expansion region to provide an air-cushioned diaphragm that deforms into said expansion region upon volume expansion of said solder ball during reflow.
4. The connection structure of claim 3 wherein said diaphragm is an elastic insulating material positioned between said at least one conductive pad on said substrate and said substrate.
5. The connection structure of claim 3 wherein said diaphragm is an elastic conductive material acting as a pad on said substrate.
6. The connection structure of claim 5 wherein said expansion region is lined with a conductive material.
7. The connection structure of claim 2 wherein a porous material is positioned in said expansion region.
8. The connection of claim 7 wherein said porous material is a closed surface compliant material which deforms upon volume expansion of said solder during reflow.
9. The connection structure of claim 7 wherein said porous material is an open surface rigid material with voids therein sufficient to accommodate volume expansion of said solder ball upon reflow.
10. A connection structure comprising:
an electronic device having a array of electrical contacts;
a substrate for said electronic device having an array of electrical contacts matching the array of electrical contacts on said electronic device;
solder balls respectively positioned between each of the said electrical contacts of said array of electrical contacts of said electronic device and each of the corresponding electrical contacts of said array of electrical contacts of said substrate;
insulating material filling the space between said semiconductor chip and said substrate between each of said solder balls so as to enclose each of said solder balls;
a hole through each of the said electrical contacts of said substrate beneath the respective solder balls positioned thereon; and
an expansion region formed in said substrate open to each said hole to accommodate volume expansion of said solder balls during reflow.
11. The connection structure of claim 10 wherein there are a plurality of holes through each of said electrical contacts of said substrate and a corresponding plurality of expansion regions formed in said substrate open to each of said holes to accommodate volume expansion of said solder balls during reflow.
12. The connection structure of claim 10 wherein an elastic material is positioned across each said hole in each of said electrical contacts to provide an air-cushioned diaphragm that deforms into said expansion region upon volume expansion of said solder balls during reflow.
13. The connection structure of claim 12 wherein said diaphragm is an insulating material positioned between each of the said electrical contacts of said substrate and said substrate.
14. The connection structure of claim 12 wherein said diaphragm is a conductive material positioned on each said hole of each of said electrical contacts of said substrate.
15. The connection structure of claim 14 wherein said expansion region is lined with conductive material.
16. The connection structure of claim 10 wherein a porous material is positioned in said expansion region beneath each said hole in each of said electrical contacts.
17. The connection structure of claim 16 wherein said porous material is a closed compliant material that deforms upon volume expansion of said solder balls during reflow.
18. The connection structure of claim 16 wherein said porous material is an open rigid material with non-wettable voids therein sufficient to accommodate volume expansion of said solder balls during reflow.
19. The connection structure of claim 18 wherein said porous material is porous ceramic material.
20. A method of interconnecting electronic devices using reflow of encapsulated solder comprising:
forming a volume expansion region adjacent to said solder having volume dimensions sufficient to accommodate enough of the volume expansion of said encapsulated solder during reflow so as to prevent damage; and
applying heat to said solder to cause solder reflow to the liquid phase and expand into said volume expansion region.
21. The method of claim 20 wherein during cooling the said solder that expanded into said volume expansion region is drawn back to its original encapsulated site.
22. The method of claim 21 wherein said volume expansion region includes an air-cushioned diaphragm that flexes during volume expansion of said solder.
23. The method of claim 21 wherein said volume expansion region includes a deformable medium that deforms during volume expansion of said solder.
24. The method of claim 20 wherein said volume expansion region includes a porous material with voids sufficient to accommodate volume expansion of said solder.
25. A method of attaching an electronic device having an array of contact pads to a substrate having a matching array of contact pad sites, comprising:
forming volume expansion regions in said substrate beneath each of the said contact pad sites of said array of contact pad sites;
forming substrate contact pads at each of the said contact pad sites of said array of contact pad sites of said substrate;
forming vias through each of said substrate contact pads to the respective ones of said volume expansion regions in said substrate;
attaching said electronic device to said substrate with solder balls respectively connecting each contact pad of said array of contact pads of said electronic device to each substrate contact pad of said substrate;
enclosing each of said solder balls with an insulating material; and
reflowing said solder balls such that the volume expansion of said solder during the liquid phase expands into said volume expansion region.
26. The method as set forth in claim 25 wherein said step of forming substrate contact pads is carried out before the said step of forming said volume expansion regions and said step of forming said volume expansion region is carried out during the step of forming said vias through each of said substrate contact pads by extending said vias into said substrate.
27. The method as set forth in claim 26 wherein said step of forming said vias is by laser ablation or mechanical drilling.
28. The method as set forth in claim 25 wherein said volume expansion regions include an air-cushioned diaphragm that flexes during said volume expansion of said solder.
29. The method as set forth in claim 25 wherein said volume expansion regions include a deformable material that deforms during volume expansion of said solder.
30. The method as set forth in claim 25 wherein said volume expansion regions include a porous material with voids sufficient to accommodate volume expansion of said solder.
31. The method as set forth in claim 26 wherein said volume expansion region has non-wettable surfaces.