1. An integrated circuit device comprising:
a memory cell including a transistor having a body region configured to be electrically floating; and
data write and sense circuitry coupled to the memory cell, the data write and sense circuitry configured to refresh data of the transistor by sequentially applying read control signals and one of first write control signals and second write control signals to the transistor during a single clock cycle, wherein one of the first write control signals and the second write control signals are applied to the transistor immediately following the application of the read control signals depending upon a data state detected in the transistor as a result of the application of the read control signals.
2. The integrated circuit device of claim 1, wherein the read control signals perform a read operation on the transistor during a first portion of the single clock cycle.
3. The integrated circuit device of claim 2, wherein the first write control signals perform a first write operation on the transistor during a second portion of the single clock cycle, wherein the first write operation comprises writing a logic high data state to the transistor if a logic high data state is detected in the transistor as a result of the application of the read control signals.
4. The integrated circuit device of claim 3, wherein the second write control signals perform a second write operation on the transistor during a second portion of the single clock cycle, wherein the second write operation comprises writing a logic low data state to the transistor if a logic low data state is detected in the transistor as a result of the application of the read control signals.
5. The integrated circuit device of claim 1, wherein the read control signals include a first gate signal applied to a gate of the transistor and a first potential difference applied between a source region and a drain region of the transistor.
6. The integrated circuit device of claim 5, wherein the first write control signals and the second write control signals include a second gate signal applied to the gate of the transistor.
7. The integrated circuit device of claim 6, wherein the first write control signals include signals having a second potential difference applied between the source region and the drain region of the transistor.
8. The integrated circuit device of claim 7, wherein the second potential difference is configured to refresh a logic high data state in the transistor.
9. The integrated circuit device of claim 8, wherein the second potential difference is greater than a threshold at which current flows in the body region of the transistor.
10. The integrated circuit device of claim 6, wherein the second write control signals include signals having a third potential difference applied between the source region and the drain region of the transistor.
11. The integrated circuit device of claim 10, wherein the third potential difference is configured to refresh a logic low data state in the transistor.
12. The integrated circuit device of claim 11, wherein the third potential difference is less than a threshold at which current flows in the body region of the transistor.
13. The integrated circuit device of claim 6, wherein the first write control signals include signals having a second potential difference applied between the source region and the drain region of the transistor, wherein the second write control signals include signals having a third potential difference applied between the source region and the drain region, wherein the second potential difference is greater than the third potential difference.
14. The integrated circuit device of claim 1, wherein the body region functions as an inherent bipolar transistor.
15. The integrated circuit device of claim 1, wherein the data write and sense circuitry comprises a read-word line coupled to the gate and a read-bit output coupled to the source region or the drain region.
16. The integrated circuit device of claim 15, wherein the body region stores data in the form of a charge accumulated in the body region.
17. The integrated circuit device of claim 16, wherein, in response to the read control signals, the transistor imparts the data onto the read-bit line by discharging the body region in response to a shifting voltage level on the read-word line.
18. The integrated circuit device of claim 17, wherein the shifting voltage level on the read-word line provides a gate-to-source voltage sufficient to cause read-bit line charging or lack of charging depending on data state.
19. The integrated circuit device of claim 18, wherein the discharging provides a read current on the read-bit line that is proportional to a current gain of the transistor multiplied by the charge.
20. The integrated circuit device of claim 19, wherein the data write and sense circuitry determines a data state of the memory cell at least substantially based on the read current.
21. The integrated circuit device of claim 17, wherein the transistor further imparts the data onto the read-bit line by discharging the body region in response to a shifting voltage level on a read-source line coupled to the source region or the drain region.
22. The integrated circuit device of claim 5, wherein the gate is disposed over a first portion of the body region.
23. The integrated circuit device of claim 22, wherein the source region adjoins a second portion of the body region that is adjacent the first portion and separates the source region from the first portion.
24. The integrated circuit device of claim 23, wherein the drain region adjoins a third portion of the body region that is adjacent the first portion and separates the drain region from the first portion.
25. The integrated circuit device of claim 5, wherein one or more of the source region and the drain region include a doped region shaped so that a farthermost boundary of the doped region is separated from a portion of the body region underlying the gate.
26. The integrated circuit device of claim 5, wherein the body region includes a first type of semiconductor material and the source region and drain region include a second type of semiconductor material.
27. The integrated circuit device of claim 26, wherein the source region includes a lightly doped region.
28. The integrated circuit device of claim 26, wherein the source region includes a highly doped region.
29. The integrated circuit device of claim 26, wherein the source region includes a lightly doped region and a highly doped region.
30. The integrated circuit device of claim 26, wherein the drain region includes a lightly doped region.
31. The integrated circuit device of claim 26, wherein the drain region includes a highly doped region.
32. The integrated circuit device of claim 26, wherein the drain region includes a lightly doped region and a highly doped region.
33. An integrated circuit device comprising:
a memory cell including a transistor having a body region configured to be electrically floating; and
data write and sense circuitry coupled to the memory cell, the data write and sense circuitry configured to refresh data of the transistor by sequentially applying read control signals and one of first write control signals and second write control signals to the transistor during a single clock cycle, wherein the first write control signals or the second write control signals are applied to the transistor immediately following the application of the read control signals, wherein voltage levels of the read control signals and the first and the second write control signals are approximately equivalent.
34. An integrated circuit device comprising:
a memory cell including a transistor having an electrically floating body region; and
data write and sense circuitry coupled to the memory cell, the data write and sense circuitry configured to refresh data of the transistor by sequentially applying read control signals followed by write control signals to the transistor during a single clock cycle, wherein the write control signals are applied to the transistor immediately following the application of the read control signals.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A motion estimation method for processing images intended to be inserted, between a preceding original image and a following original image, into a sequence of images, each of the images being divided into a plurality of pixel blocks, and a motion vector being associated with each of the pixel blocks of a processed image, the method comprising, for a current block of an image being processed, the steps of:
selecting spatial motion vectors associated with pixel blocks of the image being processed andor temporal motion vectors associated with determined pixel blocks of an already processed image;
generating candidate motion vectors from the selected motion vectors;
calculating, by a processing device, an error for each of the candidate motion vectors;
determining a penalty for at least one subset of the candidate motion vectors;
electing a motion vector from among the candidate motion vectors based on the error that is calculated and the penalty that is determined; and
storing information associating the elected motion vector with the current pixel block,
wherein in the determining step, the penalty for each candidate motion vector of the subset is determined based on values of the pixels of that pixel block in the preceding original image from which that candidate motion vector points to the current block andor based on values of the pixels of that pixel block in the following original image to which that candidate motion vector points from the current block, and
for each candidate motion vector of the subset, the determining step comprises determining the penalty based on the mean luminance of the pixels of that pixel block in the preceding original image from which that candidate motion vector points to the current block andor based on the mean luminance of the pixels of that pixel block in the following original image to which that candidate motion vector points from the current block.
2. The method according to claim 1, wherein the determining step comprises, for a candidate motion vector generated from a spatial motion vector, the sub-steps of:
calculating a first value corresponding to the mean luminance of the pixels of the pixel block in the preceding original image from which the candidate motion vector points to the current block;
calculating a second value corresponding to the mean luminance of the pixels of the pixel block in the preceding original image from which the candidate motion vector points to the pixel block with which the motion vector is associated, from which the candidate motion vector is generated; and
determining the penalty based on a comparison between the first and second values in such a way that the penalty is relatively large when the first and second values are substantially different and is relatively small when the first and second values are substantially equivalent.
3. The method according to claim 2, wherein the determining step further comprises, for a candidate motion vector generated from a spatial motion vector, the sub-steps of:
calculating a third value corresponding to the mean luminance of the pixels of the pixel block in the following original image to which the candidate motion vector points from the current block;
calculating a fourth value corresponding to the mean luminance of the pixels of the pixel block in the following original image to which the candidate motion vector points from the pixel block with which the motion vector, from which the candidate motion vector is generated, is associated; and
determining the penalty based on a comparison between the third and fourth values in such a way that the penalty is relatively large when the third and fourth values are substantially different and is relatively small when the third and fourth values are substantially equivalent.
4. The method according to claim 1, wherein the determining step comprises, for a candidate motion vector generated from a spatial motion vector, the sub-steps of:
calculating a third value corresponding to the mean luminance of the pixels of the pixel block in the following original image to which the candidate motion vector points from the current block;
calculating a fourth value corresponding to the mean luminance of the pixels of the pixel block in the following original image to which the candidate motion vector points from the pixel block with which the motion vector, from which the candidate motion vector is generated, is associated; and
determining the penalty based on a comparison between the third and fourth values in such a way that the penalty is relatively large when the third and fourth values are substantially different and is relatively small when the third and fourth values are substantially equivalent.
5. The method according to claim 1, wherein the subset of candidate motion vectors includes the candidate motion vector having the lowest error and a determined number of candidate motion vectors having errors such that the difference between each of the errors and the lowest error is less than a determined threshold value.
6. The method according to claim 1, wherein, for each candidate motion vector of the subset, the determining step comprises comparing a first value corresponding to the mean luminance of the pixels of the pixel block in the preceding original image from which the candidate motion vector points to the current block with a second value corresponding to the mean luminance of the pixels of the pixel block in the preceding original image from which the candidate motion vector points to the pixel block with which the motion vector is associated, from which the candidate motion vector is generated.
7. A motion estimation device for processing images intended to be inserted, between a preceding original image and a following original image, into a sequence of images, each of the images being divided into a plurality of pixel blocks, and a motion vector being associated with each of the pixel blocks of a processed image, the device comprising, with respect to a current block of an image being processed:
a selection unit for selecting spatial motion vectors associated with pixel blocks of the image being processed andor temporal motion vectors associated with pixel blocks of an already processed image;
a generation unit for generating candidate motion vectors from the selected motion vectors;
a calculation unit for calculating an error for each of the candidate motion vectors;
a determination unit for determining a penalty for at least one subset of the candidate motion vectors; and
an election unit for electing a motion vector from among the candidate motion vectors based on the error that is calculated and the penalty that is determined; and
a memory for storing information associating the elected motion vector with the current pixel block;
wherein the determination unit determines the penalty for each candidate motion vector of the subset based on values of the pixels of that pixel block in the preceding original image from which that candidate motion vector points to the current block andor based on values of the pixels of that pixel block in the following original image to which that candidate motion vector points from the current block, and
for each candidate motion vector of the subset, the determination unit determines the penalty based on the mean luminance of the pixels of that pixel block in the preceding original image from which that candidate motion vector points to the current block andor based on the mean luminance of the pixels of that pixel block in the following original image to which that candidate motion vector points from the current block.
8. The device according to claim 7, further comprising, for a candidate motion vector generated from a spatial motion vector:
a first luminance calculation unit for calculating a first value corresponding to the mean luminance of the pixels of the pixel block in the preceding original image from which the candidate motion vector points to the current block; and
a second luminance calculation unit for calculating a second value corresponding to the mean luminance of the pixels of the pixel block in the preceding original image from which the candidate motion vector points to the pixel block with which the motion vector, from which the candidate motion vector is generated, is associated,
wherein the determination unit determines the penalty based on a comparison between the first and second values so that the penalty is relatively large when the first and second values are substantially different and is relatively small when the first and second values are substantially equivalent.
9. The device according to claim 8, further comprising, for a candidate motion vector generated from a spatial motion vector:
a third luminance calculation unit for calculating a third value corresponding to the mean luminance of the pixels of the pixel block in the following original image to which the candidate motion vector points from the current block; and
a fourth luminance calculation unit for calculating a fourth value corresponding to the mean luminance of the pixels of the pixel block in the following original image to which the candidate motion vector points from the pixel block with which the motion vector, from which the candidate motion vector is generated, is associated,
wherein the determination unit determines the penalty based on a comparison between the third and fourth values so that the penalty is relatively large when the third and fourth values are substantially different and is relatively small when the third and fourth values are substantially equivalent.
10. The device according to claim 7, further comprising, for a candidate motion vector generated from a spatial motion vector:
a third luminance calculation unit for calculating a third value corresponding to the mean luminance of the pixels of the pixel block in the following original image to which the candidate motion vector points from the current block; and
a fourth luminance calculation unit for calculating a fourth value corresponding to the mean luminance of the pixels of the pixel block in the following original image to which the candidate motion vector points from the pixel block with which the motion vector, from which the candidate motion vector is generated, is associated,
wherein the determination unit determines the penalty based on a comparison between the third and fourth values so that the penalty is relatively large when the third and fourth values are substantially different and is relatively small when the third and fourth values are substantially equivalent.
11. The device according to claim 7, wherein the subset of candidate motion vectors includes the candidate motion vector having the lowest error and a determined number of candidate motion vectors having errors, such that the difference between each of the errors and the lowest error is less than a determined threshold value.
12. A non-transitory computer readable medium encoded with a program for processing images intended to be inserted, between a preceding original image and a following original image, into a sequence of images, each of the images being divided into a plurality of pixel blocks, and a motion vector being associated with each of the pixel blocks of a processed image, the program including instructions for performing, for a current block of an image being processed, the steps of:
selecting spatial motion vectors associated with pixel blocks of the image being processed andor temporal motion vectors associated with determined pixel blocks of an already processed image;
generating candidate motion vectors from the selected motion vectors;
calculating an error for each of the candidate motion vectors;
determining a penalty for at least one subset of the candidate motion vectors;
electing a motion vector from among the candidate motion vectors based on the error that is calculated and the penalty that is determined; and
storing information associating the elected motion vector with the current pixel block,
wherein in the determining step, the penalty for each candidate motion vector of the subset is determined based on values of the pixels of that pixel block in the preceding original image from which that candidate motion vector points to the current block andor based on values of the pixels of that pixel block in the following original image to which that candidate motion vector points from the current block, and
for each candidate motion vector of the subset, the determining step comprises determining the penalty based on the mean luminance of the pixels of that pixel block in the preceding original image from which that candidate motion vector points to the current block andor based on the mean luminance of the pixels of that pixel block in the following original image to which that candidate motion vector points from the current block.
13. The non-transitory computer readable medium according to claim 12, wherein the determining step comprises, for a candidate motion vector generated from a spatial motion vector, the sub-steps of:
calculating a first value corresponding to the mean luminance of the pixels of the pixel block in the preceding original image from which the candidate motion vector points to the current block;
calculating a second value corresponding to the mean luminance of the pixels of the pixel block in the preceding original image from which the candidate motion vector points to the pixel block with which the motion vector is associated, from which the candidate motion vector is generated; and
determining the penalty based on a comparison between the first and second values in such a way that the penalty is relatively large when the first and second values are substantially different and is relatively small when the first and second values are substantially equivalent.
14. The non-transitory computer readable medium according to claim 12, wherein the subset of candidate motion vectors includes the candidate motion vector having the lowest error and a determined number of candidate motion vectors having errors such that the difference between each of the errors and the lowest error is less than a determined threshold value.
15. A motion estimation method for processing images intended to be inserted, between a preceding original image and a following original image, into a sequence of images, each of the images being divided into a plurality of pixel blocks, and a motion vector being associated with each of the pixel blocks of a processed image, the method comprising, for a current block of an image being processed, the steps of:
selecting spatial motion vectors associated with pixel blocks of the image being processed andor temporal motion vectors associated with determined pixel blocks of an already processed image;
generating candidate motion vectors from the selected motion vectors;
calculating, by a processing device, an error for each of the candidate motion vectors;
determining a penalty for at least one subset of the candidate motion vectors;
electing a motion vector from among the candidate motion vectors based on the error that is calculated and the penalty that is determined; and
storing information associating the elected motion vector with the current pixel block,
wherein in the determining step, the penalty for each candidate motion vector of the subset is determined based on values of the pixels of that pixel block in the preceding original image from which that candidate motion vector points to the current block andor based on values of the pixels of that pixel block in the following original image to which that candidate motion vector points from the current block, and
for each candidate motion vector of the subset, the determining step comprises at least one of:
calculating a value corresponding to the mean luminance of the pixels of one of the pixel blocks in the preceding original image; and
calculating a value corresponding to the mean luminance of the pixels of one of the pixel blocks in the following original image.