1461136483-e957df72-4215-49a7-b7f5-d4794e95b301

1. A method for controlling a slitter-scorer apparatus, comprising the steps of:
supplying a paperboard sheet along a feed line; and
moving a slitterscorer including at least one of a slitter and a scorer in at least one of a vertical direction by a mechanism for vertically moving said slitterscorer and a widthwise direction by a mechanism for horizontally moving said slitterscorer to an operative level where a surface of the paperboard sheet is processed thereby,
wherein each of said mechanism for vertically moving said slitterscorer and said mechanism for horizontally moving said slitter scorer includes a servo motor,
and when said slitterscorer moves from a first widthwise position of a first operative position to a second widthwise position of a second operative position, said slitterscorer is caused to start moving only in the vertical direction while a level of said at least one of said slitterscorer is between a bottom surface of the paperboard sheet and a top surface of the paperboard sheet, and then said slitterscorer is moved simultaneously in the vertical direction and in a cross machine direction which said cross machine direction is oriented from said first widthwise position to said second widthwise position in part along a first diagonal path portion disposed on a first line and thereafter said slitterscorer moves in part along a second diagonal path portion disposed on a second line that intersects the first line so that said slitterscorer moves diagonally toward said second cross machine position before said slitterscorer again moves only in the vertical direction and after said slitterscorer initially moved only in the vertical direction.
2. A method as recited in claim 1, wherein said slitterscorer is moved simultaneously in said vertical direction and in said widthwise direction so that said slitterscorer moves diagonally toward said second widthwise position when said slitterscorer moves from said first widthwise position of said first operative level to said second widthwise position of said second operative level.
3. A method as recited in claim 2, wherein said diagonal movement of said slitterscorer occurs while said slitterscorer is positioned in the paperboard sheet.
4. A method as recited in any one of claims 2 or 3, wherein a path of movement of said slitterscorer forms a plurality of straight lines which define a generally convex shape which is oriented in such a way that the nearer said straight lines come to a peak of the generally convex shape, the more said straight lines are separated from said surface of the paperboard sheet.
5. A method as recited in any one of claims 2 or 3, wherein a path of movement of said slitter andor scorer forms a curved line which defines a generally convex shape which is oriented in such a way that the nearer the curved line comes to its peak, the more the curved line is separated from said surface of the paperboard sheet.
6. A method as recited in claim 1, wherein said slitter has an anvil positioned relative to a slitter blade of said slitter such that the paperboard sheet will be clamped therebetween, and said operative level being adjusted in accordance with the depth of the wear of said anvil during a setup step of said operative level so that said slitter blade penetrates into said anvil.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method for assembling a panel of a liquid crystal display device, comprising the following steps:
a) providing a thin-film-transistor substrate and a color-filter substrate, wherein the color filter substrate comprises a non-active area, and an active area having plural spacers formed in the active area of the color-filter substrate, at least two spacing-pads are individually formed in two opposite regions close to an edge of the active area and in a corresponding periphery of the non-active area adjacent to the edge of the active area, and the height of the spacing-pad is as same as those of the spacers in the active area; and
b) sealing the color-filter substrate and the thin-film-transistor substrate.
2. The method of claim 1, wherein the materials of the spacers and spacing-pads are photoresist.
3. The method of claim 1, wherein the color-filter substrate is formed by a photolithographic process.
4. The method of claim 3, wherein the photolithographic process is performed with a mask having a pattern of photo spacers and spacing-pads.
5. The method of claim 1, wherein the thickness of the spacers and that of the spacing-pads is different.
6. The method of claim 1, wherein the spacing-pads are formed at two sites opposite to each other on the edge of the non-active area.
7. The method of claim 1, wherein the shape of the spacing-pads is in a shape of a rectangle, a circle or a U-shape.
8. The method of claim 1, further comprising a step (c) after step (b), of depositing a liquid crystal in the panel.
9. The method of claim 1, wherein the color-filter substrate further comprises a plurality of pixel units and at least one electrode structure.
10. The method of claim 1, wherein the thin-film-transistor substrate comprises a transparent electrode.
11. A method for preparing a color filter substrate having spacing-pads, the steps comprising:
(a) providing a color-filter substrate having an active area and a non-active area; and
(b) forming plural spacers in the active area, and forming at least two spacing-pads individually in the surrounding non-active area;
wherein the at least two spacing-pads are individually formed in two opposite regions close to an edge of the active area and in a corresponding periphery of the non-active area adjacent to the edge of the active area, and the height of the spacing-pads is as same as those of the spacers in the active area.
12. The method of claim 11, wherein the wherein the materials of the spacers and spacing-pads are photoresist.
13. The method of claim 11, wherein the spacers and spacing-pads are formed by a photolithographic process.
14. The method of claim 13, wherein the photolithographic process is performed in conjunction with a mask having a pattern of photo spacers and spacing-pads.
15. The method of claim 11, wherein the thickness of the spacers and that of the spacing-pads is different.
16. The method of claim 11, wherein the spacing-pads are formed at two sites opposite to each other on the edge of the non-active area.
17. The method of claim 11, wherein the spacing-pads are in a shape of a rectangle, a circle, or U.
18. A color-filter substrate having spacing-pads, comprising:
an active area having a plurality of photo-spacers; and
a non-active area having at least two spacing-pads; wherein the at least two spacing-pads are individually formed in two opposite regions close to an edge of the active area and in a corresponding periphery of the non-active area adjacent to the edge of the active area, and the height of the spacing-pads is as same as those of the spacers in the active area.
19. The color-filter substrate of claim 18, wherein the materials of the spacers and spacing-pads are photoresist.
20. The color-filter substrate of claim 18, wherein the thickness of the spacers and that of the spacing-pads is different.
21. The color filter substrate of claim 18, wherein the spacing-pad are formed at two sites opposite to each other on an edge of the non-active area.
22. The color filter substrate of claim 18, wherein the spacing-pads are in a shape of a rectangle, a circle, or U.

1461136471-c868ae78-650e-48d5-ba04-f9c98fddc3c5

1. A system-in-package (SiP) comprising:
a substrate obtained by cutting a wafer for each unit system;
one or more first electronic devices mounted on the substrate by a heat radiation plate;
a plurality of interlayer dielectrics sequentially formed on the substrate; and
one or more second electronic devices buried between or in the interlayer dielectrics on the substrate.
2. The SiP according to claim 1, wherein a heat sink is attached beneath the substrate.
3. The SiP according to claim 2, wherein heat pipes for connecting the heat radiation plate on the substrate and the heat sink to each other are formed to pass through the substrate.
4. The SiP according to claim 1, wherein the first electronic device comprises a device operated in high speed and generating high heat, such as CPU, MCU, AP or BBP.
5. The SiP according to claim 1, further comprising a passive device buried between or in the interlayer dielectrics.
6. The SiP according to claim 5, wherein the passive device comprises an integrated passive device or a thin film type passive device.
7. The SiP according to claim 1, further comprising a redistribution conductive layer electrically connected to at least one of the first and second electronic devices.
8. The SiP according to claim 1, further comprising solder bumps electrically connected to the first and second electronic devices on the substrate.
9. The SiP according to claim 8, wherein a vertical conductive layer passing through the interlayer dielectrics is formed to electrically connect the first or second electronic device and the solder bump to each other.
10. The SiP according to claim 8, wherein a lower metal layer having one or more layers is formed beneath the solder bump.
11. The SiP according to claim 1, wherein the first electronic device is connected to the heat radiation plate by a die attach film.
12. The SiP according to claim 1, wherein the first or second electronic device is mounted to have a top surface facing up or down.
13. The SiP according to claim 1, wherein the substrate is made of a Si, Al2O3, glass or metal material.
14. An SiP comprising:
a substrate obtained by cutting a wafer for each unit system;
one or more first electronic devices mounted on the substrate by a heat radiation plate;
a plurality of interlayer dielectrics sequentially formed on the substrate;
one or more second electronic devices buried between or in the interlayer dielectrics on the substrate; and
a thermal conduction path connecting the second electronic device to the heat radiation plate.
15. The SiP according to claim 14, wherein the thermal conduction path is configured to connect the second electronic device to the heat radiation plate by filling a thermal conductive material in a hole vertically passing through the interlayer dielectrics.
16. A method of fabricating an SiP, comprising:
forming a heat pipe by making a hole in a thickness direction of a wafer level substrate therein and filling a thermal conductive material in the hole;
positioning a heat radiation plate on a top surface of the substrate;
mounting a first electronic device on the heat radiation plate;
forming a plurality of interlayer dielectrics on the substrate;
burying a second electronic device between or in the interlayer dielectrics;
exposing the heat pipe by grinding a bottom surface of the substrate;
forming a solder bump on the substrate; and
attaching a heat sink to the bottom surface of the substrate.
17. The method according to claim 16, further comprising burying a passive device between or in the interlayer dielectrics.
18. The method according to claim 16, further comprising forming a vertical conductive layer passing through the interlayer dielectrics to be electrically connected to the first or second electronic device.
19. The method according to claim 16, further comprising forming a redistribution conductive layer electrically connected to the first or second electronic device.
20. The method according to claim 16, further comprising cutting the substrate for each unit system.
21. The method according to claim 16, further comprising making a plurality of holes in the substrate and filling a conductive material in the holes.
22. The method according to claim 21, further comprising forming a thermal conductive path connecting a portion of the second electronic device to the heat radiation plate.
23. A method of fabricating an SiP, comprising:
positioning a heat radiation plate on a wafer level substrate;
mounting a first electronic device on the heat radiation plate;
forming a plurality of interlayer dielectrics on the substrate;
burying a second electronic device between or in the interlayer dielectrics;
forming a solder bump on the substrate;
removing the substrate; and
attaching a heat sink to the bottom surface of the heat radiation plate.
24. The method according to claim 23, wherein the substrate has a complex structure in which a flexible film is formed on a hard substrate.
25. The method according to claim 24, wherein the flexible film is a thin film having a release property or a release agent coated in liquid phase.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method for processing a substrate in single substrate tool, the method comprising:
providing the substrate in the single substrate tool;
applying a first processing fluid at a first temperature greater than 100\xb0 C. to a lower surface of the substrate to heat the substrate to approximately the first temperature; and
applying a second processing fluid at a second temperature greater than 100\xb0 C. to an upper surface of the substrate.
2. The method of claim 1, wherein applying the first processing fluid is performed before applying the second processing fluid.
3. The method of claim 1, wherein applying the first processing fluid overlaps in time with applying the second processing fluid.
4. The method of claim 1, wherein applying the second processing fluid etches a film on the upper surface of the substrate.
5. The method of claim 1, wherein applying the second processing fluid etches a nitride film on the upper surface of the substrate.
6. The method of claim 1, wherein applying the second processing fluid etches a silicon nitride film on the upper surface of the substrate.
7. The method of claim 1, wherein the first processing fluid includes phosphoric acid, sulfuric acid, or a mixture thereof.
8. The method of claim 1, wherein the second processing fluid includes phosphoric acid, sulfuric acid, or a mixture thereof.
9. The method of claim 1, wherein the first and second processing fluids include the same chemical selected from the group consisting of phosphoric acid, sulfuric acid, and a mixture phosphoric acid and sulfuric acid.
10. The method of claim 1, wherein the first and second processing fluids include phosphoric acid.
11. The method of claim 1, wherein the first and second temperatures are greater than 130\xb0 C.
12. The method of claim 1, wherein the first and second temperatures are greater than 160\xb0 C.
13. The method of claim 1, wherein the first temperature is greater than the second temperature.
14. The method of claim 1, wherein the first processing fluid includes sulfuric acid and the second processing fluid includes phosphoric acid, and wherein the first temperature is greater than the second temperature.
15. A method for processing a substrate in single substrate tool, the method comprising:
providing the substrate in the single substrate tool;
applying a first processing fluid containing phosphoric acid at a first temperature greater than 100\xb0 C. to a lower surface of the substrate to heat the substrate to approximately the first temperature; and
applying a second processing fluid containing phosphoric acid at a second temperature greater than 100\xb0 C. to an upper surface of the substrate, wherein applying the second processing fluid etches a silicon nitride film on the upper surface of the substrate.
16. The method of claim 15, wherein applying the first processing fluid is performed before applying the second processing fluid.
17. The method of claim 15, wherein applying the first processing fluid overlaps in time with applying the second processing fluid.
18. The method of claim 15, wherein the first and second temperatures are greater than 130\xb0 C.
19. The method of claim 15, wherein the first and second temperatures are greater than 160\xb0 C.
20. A method for processing a substrate in single substrate tool, the method comprising:
providing the substrate in the single substrate tool;
applying a first processing fluid containing sulfuric acid at a first temperature greater than 100\xb0 C. to a lower surface of the substrate to heat the substrate to approximately the first temperature; and
applying a second processing fluid containing phosphoric acid at a second temperature greater than 100\xb0 C. to an upper surface of the substrate, wherein the first temperature is greater than the first temperature.