1461129002-4f3d66dd-88d8-4652-bc8d-88efc3304636

1. A double-stranded siRNA molecule comprising an antisense strand and a sense strand complementary to the antisense strand, wherein the siRNA molecule has at least one single nucleotide bulge having a gap without base-pairing formed by introducing a single nucleotide into the antisense strand, wherein the single nucleotide bulge is present at a second, eighteenth or nineteenth position from the 5\u2032 end region of antisense strand.
2. The double-stranded siRNA molecule of claim 1, wherein the single nucleotide bulge is present at a second position from the 5\u2032 end region of the antisense strand of the siRNA.
3. The double-stranded siRNA molecule of claim 1, wherein the introduced nucleotide is a nucleotide having a base different from that of a nucleotide which is adjacent thereto or an abasic nucleotide.
4. The double-stranded siRNA molecule of claim 1, wherein the siRNA molecule comprises a 19-21-nucleotide (nt) antisense strand and a 13-17-nt sense strand having a sequence complementary to the antisense strand, wherein the 5\u2032 end of the antisense strand is a blunt end, and the 3\u2032 end of the antisense strand has an overhang.
5. The double-stranded siRNA molecule of claim 4, wherein the length of the sense strand in the siRNA molecule is 15-16 nt, and the length of the overhang is 3-6 nt.
6. The double-stranded siRNA molecule of claim 1, wherein the siRNA molecule comprises a chemical modification.
7. The double-stranded siRNA molecule of claim 6, wherein the chemical modification is the substitution of the hydroxyl group at position 2\u2032 of the ribose of at least one nucleotide included in the siRNA by any one of a hydrogen atom, a fluorine atom, an -O-alkyl group, an -O-acyl group and an amino group.
8. The double-stranded siRNA molecule of claim 6, wherein the chemical modification is the substitution of the phosphate backbone of at least one nucleotide included in the siRNA by any one of a phosphorothioate form, a phosphorodithioate form, an alkylphosphonate form, a phosphoroamidate form and a boranophosphate form.
9. The double-stranded siRNA molecule of claim 6, wherein the chemical modification is the substitution of at least one nucleotide included in the siRNA by any one of LNA (locked nucleic acid), UNA (unlocked nucleic acid), morpholino, and PNA (peptide nucleic acid).
10. A gene silencing composition containing the siRNA molecule of claim 1.
11. A gene silencing kit containing the siRNA molecule of claim 1.
12. A method for silencing a target gene in a cell, the method comprising a step of introducing the siRNA molecule of claim 1 into the cell.
13. A method for silencing a target gene in a cell, the method comprising a step of expressing the siRNA molecule of claim 1 into the cell.
14. A method for suppressing off-target effects caused by the antisense strand of siRNA molecules, the method comprising a step of introducing the siRNA molecule of claim 1 into a cell.
15. A method for suppressing off-target effects caused by the antisense strand of siRNA molecules, the method comprising a step of expressing the siRNA molecule of claim 1 into a cell.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A system comprising:
a plurality of physical processors;
one or more task queues;
a virtual machine manager configured to (a) request a first of the physical processors to execute a high priority virtual processor and to (b) wake at least a second of the physical processors to watch the one or more task queues for virtual processors that are preempted and queued in response to interrupting the first of the physical processors based at least on the request;
the first of the physical processors being configured to preempt a previously executing virtual processor in response to the request and to place the preempted virtual processor in the one or more task queues;
the second of the physical processors being configured upon being awakened to actively monitor the one or more task queues and to execute the preempted virtual processor; and
wherein the virtual machine manager is configured to wake the second processor without waiting for the first processor to place the preempted virtual processor in the one or more queues.
2. The system of claim 1, wherein the virtual machine manager requests the first of the physical processors to execute the high priority virtual processor by generating an inter-processor interrupt for interrupting the first of the physical processors.
3. The system of claim 1, wherein the virtual machine manager wakes the second of the physical processors by generating an inter-processor interrupt.
4. The system of claim 1, wherein the second of the physical processors is configured to actively monitor the one or more task queues for a predetermined time.
5. The system of claim 1, wherein the second of the physical processors is configured to watch the one or more task queues for a time that is based at least in part on the priority of the preempted virtual processor.
6. The system of claim 1, wherein the second of the physical processors is configured to watch the one or more task queues for a time that is based at least in part on an expected time for the first of the physical processors to place the preempted virtual processor in the one or more task queues.
7. The system of claim 1, wherein the second of the physical processors is configured to watch the one or more task queues for a time that is based at least in part on an observed time for the first of the physical processors to place the preempted virtual processor in the one or more task queues.
8. The system of claim 1, wherein the high priority virtual processor is not compatible with being executed by the second of the physical processors.
9. The system of claim 1, wherein the preempted virtual processor is compatible with being executed by at least one of the plurality of physical processors.
10. The system of claim 1, wherein the first of the physical processors is configured to (a) preempt a low-priority virtual processor in response to the request; (b) place the preempted low-priority virtual processor in the one or more task queues, and (c) not wake the second of the physical processors upon placing the preempted low-priority virtual processor in the one or more task queues.
11. The system of claim 1, wherein the virtual machine concurrently wakes multiple physical processors that are predicted to execute preempted tasks in response to preempting the previously executing virtual processor.
12. A computer-implemented method, comprising:
under control of one or more processors configured with executable instructions,
executing a first task on a first processor;
interrupting the first processor to execute a second task on the first processor;
interrupting a second processor to monitor tasks in a task queue in response to the interrupting of the first processor, wherein interrupting the second processor comprises waking the second processor without waiting for the first task to be placed in the task queue;
preempting the first task and placing the first task in the task queue in response to interrupting the first processor; and
resuming the first task on the second processor after the first task is placed in the task queue.
13. The method of claim 12, wherein the interrupting is performed by an operating system scheduler.
14. The method of claim 12, wherein the interrupting is performed by a virtual machine scheduler.
15. The method of claim 12, further comprising interrupting a plurality of processors to monitor tasks in the task queue concurrently with interrupting the first processor to execute the second task, wherein the plurality of processors comprise processors that are predicted to execute preempted tasks in response to interrupting the first processor.
16. The method of claim 12, wherein the first and second processors comprise virtual processors.
17. The method of claim 12, wherein the first and second tasks comprise virtual processors.
18. The method of claim 12, wherein the first and second processors comprise physical processors.
19. The method of claim 12, wherein the first and second tasks comprise execution threads.
20. The method of claim 12, wherein interrupting the first processor comprises generating an inter-processor interrupt to the first processor.
21. The method of claim 12, wherein waking the second processor comprises generating an inter-processor interrupt to the second processor.
22. The method of claim 12, wherein the second processor is configured to actively monitor the task queue for a predetermined time in response to waking the second processor.
23. The method of claim 12, wherein the second processor is configured to actively monitor the task queue for a time that is based at least in part on the priority of the first task.
24. The method of claim 12, wherein the second processor is configured to actively monitor the task queue for a time that is based at least in part on an expected time for the first processor to place the first task in the task queue.
25. The method of claim 12, wherein the second processor is configured to actively monitor the task queue for a time that is based at least in part on an observed time for the first processor to place the first task in the task queue.
26. The method of claim 12, wherein the first processor is configured to not wake the second processor when placing the first task in the task queue.
27. The method of claim 12, further comprising interrupting a plurality of processors to watch for tasks in the task queue concurrently with interrupting the first processor to execute the second task, wherein the plurality of processors comprise processors that are predicted to execute preempted tasks in response to interrupting the first processor.
28. One or more non-transitory computer-readable media containing instructions that are executable by one or more processors to perform actions comprising:
executing a first task on a first processor;
interrupting the first processor to execute a second task;
interrupting a second processor to watch for tasks in a task queue in response to the interrupting of the first processor, wherein interrupting the second processor is performed without waiting for the first processor to respond to interrupting the first processor and without waiting for the first task to be placed in the task queue;
in response to interrupting the first processor, preempting the first task on the first processor and placing the first task in the task queue; and
resuming the first task on the second processor after the first task is placed in the task queue.
29. The one or more non-transitory computer-readable media of claim 28, the acts further comprising interrupting a plurality of processors to watch for tasks in the task queue, without waiting for the first processor to respond to interrupting the first processor, wherein the plurality of processors comprise processors that are predicted to execute preempted tasks in response to interrupting the first processor.
30. The one or more non-transitory computer-readable media of claim 28, wherein interrupting the first processor comprises generating an inter-processor interrupt to the first processor.
31. The one or more non-transitory computer-readable media of claim 28, wherein interrupting the second processor comprises generating an inter-processor interrupt to the second processor.
32. The one or more non-transitory computer-readable media of claim 28, wherein the second processor is configured to actively monitor the task queue for a predetermined time in response to interrupting the second processor.
33. The one or more non-transitory computer-readable media of claim 28, wherein the second processor is configured to actively monitor the task queue for a time that is based at least in part on the priority of the first task.
34. The one or more non-transitory computer-readable media of claim 28, wherein the second processor is configured to actively monitor the task queue for a time that is based at least in part on an expected time for the first processor to place the first task in the task queue.
35. The one or more non-transitory computer-readable media of claim 28, wherein the second processor is configured to actively monitor the task queue for a time that is based at least in part on an observed time for the first processor to place the first task in the task queue.
36. The one or more non-transitory computer-readable media of claim 28, wherein the first processor is configured to not interrupt the second processor when placing the first task in the task queue.

1461128992-bdc39de6-b170-45ef-9c8f-d8a8a718266a

1. A low-insertion-force connector assembly comprising:
one connector receiving one terminal; and
the other connector receiving a mating terminal,
the one connector including:
a driving lever having a gear part arranged in a circular-arc shape, rotatively arranged along a wall portion of the one connector, and pivotally supported onto the wall portion,
a gear wheel engaging with the gear part; and
a gear member having a spiral groove engaged with a driven projection of the other connector.
2. The low-insertion-force connector assembly as claimed in claim 1, wherein the driving lever comprises a circular-arc-shaped wall part having the gear part, a pivotally-supported middle wall part, and an operation part.
3. The low-insertion-force connector assembly as claimed in claim 1, wherein the one connector is provided with a safety circuit unit slidable in an axial direction of the driving lever, wherein the other connector is provided with a small connector for connecting with the safety circuit unit,
wherein the driving lever prevents the safety circuit unit from moving in a connecting direction at a provisional connector-engaging position, and wherein the driving lever permits the safety circuit unit to move in the connecting direction and is prevented from rotating by a flange of the safety circuit unit at a connector-engaging position.
4. The low-insertion-force connector assembly as claimed in claim 1, wherein the one connector is provided with the safety circuit unit slidable in a direction axially perpendicular to the driving lever, wherein the other connector is provided with a small connector for connecting with the safety circuit unit, and wherein the driving lever includes a groove engaged with a boss of the safety circuit unit,
wherein the boss is approached to engage with the groove by rotation of the driving lever in a state of disconnection between the safety circuit unit and the small connector, and wherein the groove corresponds to a sliding direction thereof so that the safety circuit unit operatively connects with the small connector in a state of connection between both the connectors while both the connectors are engaged with each other.
5. The low-insertion-force connector assembly as claimed in claim 4, wherein the boss of the safety circuit unit disengaged with the small connector abuts a side where the groove of the driving lever is formed such that the driving lever is prohibited to rotate in an engaging direction of both the connectors.
6. The low-insertion-force connector assembly as claimed in claim 2, wherein the one connector is provided with a safety circuit unit slidable in an axial direction of the driving lever, wherein the other connector is provided with a small connector for connecting with the safety circuit unit,
wherein the driving lever prevents the safety circuit unit from moving in a connecting direction at a provisional connector-engaging position, and wherein the driving lever permits the safety circuit unit to move in the connecting direction and is prevented from rotating by a flange of the safety circuit unit at a connector-engaging position.
7. The low-insertion-force connector assembly as claimed in claim 2, wherein the one connector is provided with the safety circuit unit slidable in a direction axially perpendicular to the driving lever, wherein the other connector is provided with a small connector for connecting with the safety circuit unit, and wherein the driving lever includes a groove engaged with a boss of the safety circuit unit,
wherein the boss is approached to engage with the groove by rotation of the driving lever in a state of disconnection between the safety circuit unit and the small connector, and wherein the groove corresponds to a sliding direction thereof so that the safety circuit unit operatively connects with the small connector in a state of connection between both the connectors while both the connectors are engaged with each other.
8. The low-insertion-force connector assembly as claimed in claim 7, wherein the boss of the safety circuit unit disengaged with the small connector abuts a side where the groove of the driving lever is formed such that the driving lever is prohibited to rotate in an engaging direction of both the connectors.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method comprising:
registering an identifier for a navigation application at a map management server;
accessing an installed version, at the map management server, of a geographic database according to the identifier;
accessing a later version, at the map management server, of the geographic database, wherein the later version of the geographic database is different than the installed version of the geographic database;
receiving, at the map management server, a destination location;
querying the installed version of the geographic database for the destination location for a first map result;
querying the later version of the geographic database for the destination location for a second map result; and
performing a comparison of the first map result and the second map result.
2. The method of claim 1, further comprising:
displaying a result of the comparison of the first map result and the second map result.
3. The method of claim 1, wherein the comparison indicates that the destination location is included in the later version of the geographic database and omitted from the installed version of the geographic database.
4. The method of claim 1, further comprising:
counting a number of times destination locations are omitted from the installed version of the geographic database; and
displaying the number in a message to a user.
5. The method of claim 4, wherein the message includes an offer to purchase the later version of the geographic database.
6. The method of claim 1, further comprising:
determining a location included in the installed version of the geographic database and nearby to the second map result from the later version of the geographic database.
7. The method of claim 1, further comprising:
providing a plurality of navigation options when the comparison of the first map result and the second map result indicates that the destination location is omitted from the installed version of the navigation database.
8. The method of claim 7, wherein the plurality of options includes at least two of a printout of full directions to the destination location, a printout of partial directions to the destination location based on the installed version of the geographic database, a transmission of directions to a mobile device, and a display of longitude and latitude coordinates.
9. The method of claim 1, further comprising:
transmitting the navigation location to a navigation system including the navigation application when the first map result is substantially equivalent to the second map result.
10. An map management server comprising:
a processor configured to register a navigation application of a user at the map management server and receive a destination location entered from a website;
a first database including an installed version of a geographic database, wherein the installed version of the geographic database is installed with the navigation application of the user;
a second database including a later version of the geographic database, wherein the later version of the geographic database is newer than the installed version of the geographic database,
wherein the processor is configured to query the installed version of the geographic database for the destination location for a first map result, query the later version of the geographic database for the destination location for a second map result, and perform a comparison of the first map result and the second map result.
11. The apparatus of claim 10, further comprising:
generating a display message based on the comparison of the first map result and the second map result, wherein the display message indicates that the destination location is included in the later version of the geographic database and omitted from the installed version of the geographic database.
12. The apparatus of claim 10, wherein the processor is further configured to count a number of times that destination locations are omitted from the installed version of the geographic database and generate an offer message when the number exceeds a threshold.
13. The apparatus of claim 10, wherein the processor is configured to generate a navigation message when the comparison of the first map result and the second map result indicates that the destination location is omitted form the installed version of the navigation database.
14. The apparatus of claim 13, wherein the navigation message includes options for a printout of full directions to the destination location, a printout of partial directions to the destination location based on the installed version of the geographic database, a transmission of directions to a mobile device, or a display of longitude and latitude coordinates.
15. The apparatus of claim 13, further comprising:
a communication application configured to transmit the navigation location to the navigation application when the first map result is substantially equivalent to the second map result.
16. A non-transitory computer readable medium including instructions that when executed by a processor, instruct the processor to:
select an installed version of a geographic database installed with a navigation application from a list of compiled databases indexed by user;
select a later version of the geographic database from a map service;
receiving, at a map management server, a destination location;
compare, with respect to the destination location, the installed version of the geographic database to the later version of the geographic database; and
generate a message for a user of the navigation application based on the comparison.
17. The non-transitory computer readable medium of claim 16, wherein the message includes maps showing differences between the installed version of the geographic database and the later version of the geographic database.
18. The non-transitory computer readable medium of claim 16, wherein the message includes an offer to update the installed version of the geographic database to the later version of the geographic database.
19. The non-transitory computer readable medium of claim 16, wherein the message includes options for printing directions to the destination location in response to the destination location being omitted from the installed version of the geographic database.
20. The non-transitory computer readable medium of claim 16, wherein the message indicates that the destination is invalid when the destination location is included in the installed version of the geographic database and omitted in the later version of the geographic database.