Author: claimsbot

1. A method for displaying a time-dependent process, the method comprising:
providing a toothbrush having a porous indicator strip disposed on its surface, the indicator strip having:
a first portion,
a second, opposite-portion, the second portion having a dye pre-applied thereto, and
a display surface extending between the first and second portions;

applying a liquid onto the first portion of the porous indicator strip
allowing the liquid to migrate along a length of the display surface from the first portion to the second portion, causing the dye to dissolve in the liquid; and then
diffusing the dye along the length of the display surface from the second portion toward the first portion.
2. The method of claim 1 wherein the strip is pre-impregnated with the dye.
3. The method of claim 1 wherein the strip is pre-printed with the dye.
4. The method of claim 1 wherein the strip has been conditioned to cause molecules of the dye to adhere to the strip.
5. The method according to claim 1, further comprising providing the liquid within a storage capsule located adjacent the first portion of the indicator strip.
6. The method according to claim 5, further comprising applying the liquid to the indicator strip from the storage capsule.
7. The method according to claim 6, further comprising opening the capsule by applying mechanical pressure to a flexible cladding substantially surrounding the indicator strip and the capsule.
8. The method according to claim 6, further comprising opening the capsule by actuating a pressure pin arranged adjacent the capsule.
9. The method according to claim 1, wherein the liquid comprises water.
10. The method according to claim 1, wherein the dye comprises Erythrosin B or Coomassie Brilliant Blue.
11. The method according to claim 1, wherein the indicator strip comprises cellulose paper.
12. A display device for a toothbrush, the device comprising:
a capsule to store a liquid and comprising a seal for controllable release of the liquid; and
a porous indicator strip disposed adjacent to the capsule, the indicator strip having:
a first portion adjacent the capsule,
a second portion opposite the first portion, the second portion having a dye pre-applied thereto, and
a display surface extending between the first and second portions,

wherein the indicator strip is configured to allow the liquid to migrate along a length of the display surface from the first portion to the second portion, causing the dye to dissolve in the liquid; and then diffuse the dye along the length of the display surface from the second portion toward the first portion.
13. The device of claim 12, further comprising a scale located adjacent the indicator strip to provide an indication of elapsed time.
14. The device according to claim 12, wherein the dye is disposed along the second portion of the indicator strip.
15. The device according to claim 12, wherein the device is configured to introduce the liquid from the capsule to the dye along the indicator strip.
16. The device according to claim 12, wherein the liquid comprises water.
17. The device according to claim 12, wherein the dye comprises Erythrosin B or Coomassie Brilliant Blue.
18. The device according to claim 12 wherein the indicator strip comprises cellulose filter paper.
19. The device according to claim 12, further comprising a protective cladding substantially surrounding the indicator strip and the capsule.
20. The device according to claim 19, further comprising a mechanical pressure device arranged on an opposite side of the indicator strip facing away from the display surface configured to actuate and burst the capsule.
21. The device of claim 12 wherein the porous substrate is impregnated with the dye prior to release of the liquid.
22. The device of claim 12 wherein the porous substrate is printed with the dye prior to release of the liquid.
23. A toothbrush comprising:
a capsule to store a liquid and comprising a seal for controllable release of the liquid; and
a porous indicator strip disposed adjacent to the capsule, the indicator strip having:
a first portion adjacent the capsule,
a second portion opposite the first portion, the second portion having a dye pre-applied thereto, and
a display surface extending between the first and second portions,

wherein the indicator strip is configured to allow the liquid to migrate along a length of the display surface from the first portion to the second portion, causing the dye to dissolve in the liquid; and then diffuse the dye along the length of the display surface from the second portion toward the first portion.
24. The toothbrush of claim 23, wherein the porous indicator strip is disposed on a handle of the toothbrush.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method for receiving OFDM signals via at least two antennae, in which each OFDM signal includes a plurality of OFDM symbols, the method comprising:
converting OFDM symbols received via each antenna to a plurality of sub carrier signals, wherein each sub carrier signal corresponds to one of a plurality of sub carriers;
for a specified sub carrier, combining the sub carrier signals, which are obtained via each antenna and corresponds to the specified sub carrier, based on a combining coefficient vector to form a combined signal;
recovering a desired signal based on the combined signal corresponding to the specified sub carrier; and
updating the combining coefficient vector based on the desired signal corresponding to the specified sub carrier and the sub carrier signals, which correspond to the specified sub carrier and are obtained via each antennae.
2. The method of claim 1, wherein the step of recovering the desired signal comprises:
demodulating the combined signal to form a demodulated signal corresponding to the specified sub carrier;
convolutional decoding the demodulated signal to form a decoded signal corresponding to the specified sub carrier;
convolutional encoding the decoded signal to form a coded signal corresponding to the specified sub carrier; and
modulating the coded signal to form the desired signal corresponding to the specified sub carrier.
3. The method of claim 2, wherein the step of convolutional decoding is performed by a Viterbi decoder.
4. The method of claim 1, wherein the step of recovering the desired signal is performed by a hard-decision maker.
5. The method of claim 1, wherein the step of updating the combining coefficient vector comprises:
constructing a first matrix based on an autocorrelation of the sub carrier signals corresponding to the specified sub carrier obtained via each antennae;
calculating an inversed first matrix according to the first matrix;
constructing a second matrix based on a cross-correlation of the desired signal corresponding to the specified sub carrier and the sub carrier signals corresponding to the specified sub carrier obtained via each antennae; and
calculating to update the combining coefficient vector by multiplying the inversed first matrix and second matrix.
6. The method of claim 5, wherein the first matrix is constructed by a plurality of first elements, wherein each first element is obtained according to an average, over a plurality of OFDM symbols, of an inner product of a pair of the sub carrier signals, wherein each one of a pair of the sub carrier signals is the sub carrier signal corresponding to the specified sub carrier obtained via one of the antennae; and
wherein the second matrix is constructed by a plurality of second elements, wherein each second element is obtained according to an average, over a plurality of OFDM symbols, of an inner product of the desired signal corresponding to the specified sub carrier, and the sub carrier signal corresponding to the specified sub carrier obtained via one of the antennae.
7. The method of claim 5, wherein the first matrix is constructed by a plurality of first elements, wherein each first element is obtained according to an average, over a plurality of specified sub carriers and a plurality of OFDM symbols, of an inner product of a pair of sub carrier signals, wherein each one of a pair of sub carrier signals is the sub carrier signal corresponding to one of the plurality of specified sub carriers obtained via one of the antennae; and
wherein the second matrix is constructed by a plurality of second elements, wherein each second element is obtained according an average, over a plurality of specified sub carriers and a plurality of OFDM symbols, of the inner product of the desired signal corresponding to one of the plurality of specified sub carriers and the sub carrier signal corresponding to one of the plurality of specified sub carrier obtained via one of the antennae.
8. The method of claim 2, wherein the step of recovering the desired signal further comprises:
de-interleaving the demodulated signal corresponding to the specified sub carrier to form a de-interleaved signal;
interleaving the coded signal corresponding to the specified sub carrier to form an interleaved signal; and
wherein the decoded signal is formed by decoding the de-interleaved signal; and
the desired signal is formed by modulating the interleaved signal.
9. An apparatus for receiving OFDM signals via at least two antennae, in which each OFDM signal includes a plurality of OFDM symbols, the apparatus comprising:
a converter for converting the OFDM symbols received via each antenna to a plurality of sub carrier signals, wherein each sub carrier signal corresponds to one of a plurality of sub carriers;
a combining unit for combining the sub carrier signals, which are obtained via each antenna and correspond to a specified sub carrier, based on a combining coefficient vector to form a combined signal;
a recovery unit for recovering a desired signal based on the combined signal corresponding to the specified sub carrier; and
a combining coefficient estimation unit for updating the combining coefficient vector corresponding to the specified sub carrier based on the desired signal corresponding to the specified sub carrier and the sub carrier signals, which correspond to the sub carrier and are obtained via each antennae.
10. The apparatus of claim 9, wherein the recovery unit comprises:
a demodulator for demodulating the combined signal to form a demodulated signal corresponding to the specified sub carrier;
a decoder for convolutional decoding the demodulated signal to form a decoded signal corresponding to the specified sub carrier;
a coder for convolutional coding the decoded signal to form a coded signal corresponding to the specified sub carrier; and
a modulator for modulating the coded signal to form the desired signal corresponding to the specified sub carrier.
11. The apparatus of claim 10, wherein the decoder is a Viterbi decoder.
12. The apparatus of claim 9, wherein the recovery unit is a hard decision maker.
13. The apparatus of claim 9, wherein the combining coefficient estimation unit comprises:
a first matrix constructer for constructing a first matrix based on an autocorrelation of the sub carrier signals corresponding to the specified sub carrier obtained via each antenna;
a matrix inverter for inversing the first matrix to form an inversed first matrix;
a second matrix constructer for constructing a second matrix based on a cross-correlation of the desired signal corresponding to the specified sub carrier and the sub carrier signals corresponding to the specified sub carrier obtained via each antenna; and
a multiplier for generating to update the combining coefficient vector by multiplying the inversed first matrix and the second matrix.
14. The apparatus of claim 13, wherein the first matrix comprises a plurality of first elements, wherein each first element is obtained according to an average, over a plurality of OFDM symbols, of an inner product of a pair of sub carrier signals, wherein each one of a pair of sub carrier signals is the sub carrier signal corresponding to the specified sub carrier obtained via one of the antennae; and
wherein the second matrix comprises a plurality of second elements, wherein each second element is obtained according an average, over a plurality of OFDM symbols, of an inner product of the desired signal corresponding to the specified sub carrier and the sub carrier signal corresponding to the specified sub carrier obtained via one of the antennae.
15. The apparatus of claim 13, wherein the first matrix comprises a plurality of first elements, wherein each first element is obtained according to an average, over a plurality of specified sub carriers and a plurality of OFDM symbols, of an inner product of a pair of sub carrier signals, wherein each of a pair of sub carrier signals is the sub carrier signal corresponding to one of the plurality of specified sub carriers obtained via one of the antennae; and
wherein the second matrix comprises a plurality of second elements, wherein each second element is obtained according an average, over a plurality of specified sub carriers and a plurality of OFDM symbols, of an inner product of the desired signal corresponding to one of the plurality of specified sub carriers and the sub carrier signal corresponding to one of the plurality of specified sub carrier obtained via one of the antennae.
16. The apparatus of claim 9, wherein the recovery unit further comprises:
a de-interleaver for de-interleaving the demodulated signal to form a de-interleaved signal corresponding to the specified sub carrier; and
an interleaver for interleaving the coded signal to form a interleaved signal corresponding to the specified sub carrier;
wherein the decoder is for decoding the de-interleaved signal to form the decoded signal; and
wherein the modulator is for modulating the interleaved signal to form the desired signal.

1. A semiconductor device structure, comprising:
a substrate;
at least one via hole extending partially through the substrate;
a dielectric coating over surfaces of the at least one via hole, the dielectric coating including:
at least one adhesion material; and
a dielectric material comprising a low-K dielectric material; and

a base layer comprising an aluminum film on at least a portion of the dielectric coating.
2. The semiconductor device structure of claim 1, wherein the at least one adhesion material of the dielectric coating comprises an oxide.
3. The semiconductor device structure of claim 1, wherein the at least one adhesion material contacts surfaces of the at least one via hole.
4. The semiconductor device structure of claim 3, wherein the dielectric material coats the at least one adhesion material.
5. The semiconductor device structure of claim 4, further comprising:
another adhesion material coating the dielectric material.
6. The semiconductor device structure of claim 1, wherein the at least one adhesion material coats the dielectric material.
7. The semiconductor device structure of claim 1, wherein the at least one via hole extends through a bond pad carried by the substrate.
8. The semiconductor device structure of claim 7, wherein the dielectric coating extends onto at least a portion of an edge of the bond pad that is continuous with the at least one via hole.
9. A semiconductor device structure, comprising:
a substrate;
at least one via hole extending partially through the substrate and including at least one surface with high surface area features; and
a dielectric coating over the at least one surface.
10. The semiconductor device structure of claim 9, wherein the dielectric coating comprises a low-K dielectric material.
11. The semiconductor device structure of claim 9, wherein the at least one via hole extends through a bond pad carried by the substrate.
12. The semiconductor device structure of claim 11, wherein the dielectric coating extends onto at least a portion of an edge of the bond pad that is continuous with the at least one via hole.
13. A semiconductor device structure, comprising:
a substrate;
at least one via hole extending at least partially through the substrate;
a base material comprising aluminum on at least a portion of a surface of the at least one via hole; and
a conductive material coating the base material.
14. (canceled)
15. The semiconductor device structure of claim 14, further comprising:
a barrier material between the base material and at least the portion of the surface of the at least one via hole.
16. The semiconductor device structure of claim 15, wherein the barrier material comprises at least one of titanium, titanium nitride, tantalum, and tantalum nitride.
17. The semiconductor device structure of claim 14, wherein the conductive material comprises copper.
18. The semiconductor device structure of claim 13, wherein the at least a portion of the surface of the at least one via hole comprises high surface area features.
19. The semiconductor device structure of claim 18, wherein the at least one via hole extends through a bond pad carried by the substrate.
20. The semiconductor device structure of claim 19, wherein the bond pad comprises an unplated bond pad.
21. The semiconductor device structure of claim 20, wherein the base material contacts an unplated surface of the unplated bond pad.
22. The semiconductor device structure of claim 18, wherein the conductive material comprises nickel.
23. The semiconductor device structure of claim 13, further comprising: a void between opposed surfaces of the conductive material.
24. The semiconductor device structure of claim 23, further comprising: a dielectric filler material within the void.
25. The semiconductor device structure of claim 24, wherein a surface of the dielectric filler material is substantially coplanar with a surface of the substrate.
26. The semiconductor device structure of claim 9, further comprising an aluminum material over the dielectric coating.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method implemented on a data processing system for circuit design, the method comprising:
determining for a first design of a circuit a first temperature solution and a first power dissipation solution, the first power dissipation solution and the first temperature solution being interdependent; and
transforming the first design of the circuit into a second design of the circuit using the first temperature solution to reduce leakage power of the circuit under one or more design constraints.
2. The method of claim 1, wherein the one or more design constraints comprises a timing constraint.
3. The method of claim 1, wherein the transforming comprises:
replacing a first element of the first design of the circuit with a second element of the second design of the circuit;
wherein the first and second elements are functionally equivalent; and
wherein the second element has power dissipation lower than the first element at a same temperature, and wherein the first element has a first transistor threshold voltage; the second element has a second transistor threshold voltage; and the first transistor threshold voltage is lower than the second transistor threshold voltage.
4. The method of claim 1, further comprising:
determining a timing critical path; and
selecting a first element from a low temperature portion of the timing critical path based on at least the first temperature solution;
wherein the transforming comprises replacing the first element with a second element to improve timing on the timing critical path; and
wherein the second element has a transistor threshold voltage lower than the first element.
5. The method of claim 1, further comprising:
determining sensitivities of leakage for a plurality of transformations; and
based on the sensitivities of leakage, selecting one from the plurality of transformations to transform the first design of the circuit to the second design of the circuit.
6. A non-transitory machine readable medium containing executable computer program instructions which when executed by a digital processing system cause the system to perform operations comprising:
determining for a first design of a circuit a first temperature solution and a first power dissipation solution, the first power dissipation solution and the first temperature solution being interdependent; and
transforming the first design of the circuit into a second design of the circuit using the first temperature solution to reduce leakage power of the circuit under one or more design constraints.
7. The non-transitory machine readable medium of claim 6, wherein the one or more design constraints comprises a timing constraint.
8. The non-transitory machine readable medium of claim 6, wherein the transforming comprises:
replacing a first element of the first design of the circuit with a second element of the second design of the circuit;
wherein the first and second elements are functionally equivalent; and
wherein the second element has power dissipation lower than the first element at a same temperature.
9. The non-transitory machine readable medium of claim 6, further comprising instructions which when executed by the digital processing system cause the system to perform operations comprising determining a timing critical path; and
selecting a first element from a low temperature portion of the timing critical path based on at least the first temperature solution;
wherein the transforming comprises replacing the first element with a second element to improve timing on the timing critical path; and
wherein the second element has a transistor threshold voltage lower than the first element.
10. The non-transitory machine readable medium of claim 6, further comprising instructions which when executed by the digital processing system cause the system to perform operations comprising
determining sensitivities of leakage for a plurality of transformations; and
based on the sensitivities of leakage, selecting one from the plurality of transformations to transform the first design of the circuit to the second design of the circuit.
11. A data processing system for circuit design, comprising:
a memory; and a processor coupled to the memory, the processor configured to determine for a first design of a circuit a first temperature solution and a first power dissipation solution, the first power dissipation solution and the first temperature solution being interdependent; and
the processor configured to transform the first design of the circuit into a second design of the circuit using the first temperature solution to reduce leakage power of the circuit under one or more design constraints.
12. The data processing system of claim 11, wherein the one or more design constraints comprises a timing constraint.
13. The data processing system of claim 11, wherein the processor is further configured to:
replace a first element of the first design of the circuit with a second element of the second design of the circuit;
wherein the first and second elements are functionally equivalent; and
wherein the second element has power dissipation lower than the first element at a same temperature, and wherein the first element has a first transistor threshold voltage; the second element has a second transistor threshold voltage; and the first transistor threshold voltage is lower than the second transistor threshold voltage.
14. A method implemented on a data processing system for circuit design, the method comprising:
determining a temperature solution and a power dissipation solution for a first design of a circuit, the power dissipation solution and the temperature solution interdependent, the power dissipation solution and the temperature solution consistent with each other; and
transforming the first design of the circuit into a second design of the circuit using the temperature solution to improve performance of first design of the circuit.
15. The method of claim 9, further comprising:
selecting an element of the first design from a location with an elevated temperature according to the temperature solution;
wherein the first design is transformed into a second design through replacing a first implementation of the element with a second implementation to reduce leakage power, and
wherein the first implementation has a transistor threshold voltage lower than the second implementation.
16. The method of claim 9, further comprising:
selecting an element of the first design from a location with a low temperature according to the temperature solution;
wherein the first design is transformed into a second design through replacing a first implementation of the element with a second implementation to improve timing on a path while limiting an increase in leakage power, and wherein the second implementation has a transistor threshold voltage lower than the first implementation.
17. The method of claim 9, further comprising:
determining sensitivities of leakage and delay for a plurality of transformations; and
based on the sensitivities of leakage and delay, selecting one from the plurality of transformations to transform the first design of the circuit to the second design of the circuit.
18. The method of claim 9, further comprising:
determining sensitivities of leakage to temperature change at a plurality of locations in the circuit;
determining sensitivities of delay to temperature change at a plurality of locations in the circuit; and
based on the sensitivities of leakage to temperature change and the sensitivities of delay to temperature change, determining a transformation from the first design of the circuit to the second design of the circuit.
19. A data processing system for circuit design, the data processing system comprising:
a memory; and a processor coupled to the memory, the processor configured to determine a temperature solution and a power dissipation solution for a first design of a circuit, the power dissipation solution and the temperature solution interdependent, the power dissipation solution and the temperature solution consistent with each other; and
the processor configured to transform the first design of the circuit into a second design of the circuit using the temperature solution to improve performance of first design of the circuit.
20. The data processing system of claim 19, wherein the processor is further configured to
select an element of the first design from a location with an elevated temperature according to the temperature solution;
wherein the first design is transformed into a second design through replacing a first implementation of the element with a second implementation to reduce leakage power.