1461120151-98fb14ba-ee2c-4382-8944-598ea0802b7b

1. A method of testing a semiconductor device, comprising the steps of:
receiving a digital data stream from the semiconductor device;
analyzing the data stream in real time to identify a symbol boundary;
subsequent to identifying the symbol boundary, analyzing the data stream in real time in order to identify at least two predetermined symbols, the at least two predetermined symbols do not alias in any combination of two other symbols;
determining whether or not the semiconductor device has passed a test if the at least two predetermined symbols are identified, and the remainder of the data stream matches a set of expected values; and
indicating whether or not the semiconductor device has passed the test.
2. The method of claim 1, further comprising the step of generating signatures for the data stream for comparison against expected signatures for the semiconductor device.
3. The method of claim 1 generating further comprising the step of generating signatures for the data stream for comparison against expected signatures for the semiconductor device, wherein the expected signatures include signatures that correspond to a data stream containing out of order data.
4. The method of claim 1, further comprising the step of identifying and eliminating padding and alignment symbols from the data stream.
5. A method of testing a semiconductor device, comprising the steps of:
receiving a digital data stream from the semiconductor device;
analyzing the data stream in real time to identify a symbol boundary;
subsequent to identifying the symbol boundary, analyzing the data stream in real time in order to identify at least two predetermined symbols, the at least two predetermined symbols do not alias in any combination of two other symbols;
determining whether or not the semiconductor device has passed a test if the at least two predetermined symbols are identified, and the remainder of the data stream matches a set of expected values;
indicating whether or not the semiconductor device has passed the test; and
identifying and eliminating padding and alignment symbols from the data stream using a symbol map.
6. The method of claim 5, further comprising the step of correcting running disparity non-determinism in the data stream.
7. The method of claim 5, wherein the symbol map comprises a look up table containing predetermined padding and alignment symbols and is configured to selectively send remapped symbols to a signature generator.
8. A method of testing a semiconductor device, comprising the steps of:
receiving a digital data stream from the semiconductor device;
analyzing the data stream in real time to identify a symbol boundary;
subsequent to analyzing the symbol boundary, analyzing the data stream in real time in order to identify at least two predetermined symbols, the at least two predetermined symbols do not alias in any combination of two other symbols;
determining whether or not the semiconductor device has passed a test if the at least two predetermined symbols are identified, and the remainder of the data stream matches a set of expected values; and
indicating whether or not the semiconductor device has passed the test, wherein each symbol comprises ten bits conforming to a predetermined encoding standard.
9. An apparatus configured to test a data stream of digital packets from a semiconductor device under test, comprising:
an alignment comparator in electrical communication with the semiconductor device under test;
a functional data packet match comparator in electrical communication with the alignment comparator, wherein the functional data packet match comparator is configured to identify a starting data packet of predetermined length from the data stream and analyze the data stream once the staffing packet has been identified in order to identify at least two supplemental data packets of predetermined length, the at least two supplemental data packets do not alias in any combination of two other data packets; and
a memory storing expected test data in electrical communication with the functional data packet match comparator.
10. The apparatus of claim 9, wherein the functional data packet match comparator is further configured to compare additional packets from the data stream to those stored in the expected data memory.
11. The apparatus of claim 9 further comprising, a symbol map in electrical communication with the functional data packet match comparator and configured to identify and eliminate padding and alignment packets from the data stream and to output remapped data packets.
12. The apparatus of claim 11, further comprising a signature generator, in electrical communication with the symbol map, configured to generate a unique signature based upon the remapped data packets.
13. A system for testing a semiconductor device, the system comprising:
a means for receiving a digital data stream from the semiconductor device;
a means for analyzing the data stream in order to identify a symbol boundary;
a means for analyzing the data stream in order to identify at least two predetermined symbols, once the symbol boundary has been identified;
a means for deeming the semiconductor device to have passed the test, if at least two predetermined symbols are identified, the at least two predetermined symbols do not alias in any combination of two other symbols, and a remainder of the data stream matches a set of expected values; and
a signal indicating whether or not the semiconductor device has passed the test.
14. The system of claim 13 further comprising a means for identifying and eliminating padding and alignment symbols from the data stream, if the semiconductor device is deemed to have not passed the test.
15. The system of claim 14 wherein the means for identifying and eliminating padding and alignment symbols from the data stream uses a symbol map.
16. The system of claim 15 further comprising a means for correcting running disparity in the data stream.
17. The system of claim 15, wherein the symbol map comprises a look up table containing known padding and alignment symbols and is configured to selectively forward remapped symbols to a signature generator.
18. The system of claim 14 further comprising a means for generating signatures for the data stream and compare them against expected signatures for the semiconductor device.
19. The system of claim 13, wherein each symbol conforms to a predetermined encoding standard.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A system comprising:
a plurality of wireless communication elements for providing wireless service to a geographic area of interest, each wireless communication element comprising at least an antenna port and at least one antenna, one or more of the plurality of wireless communication elements including a plurality of antenna ports; and
a controller for controlling the wireless communication elements, wherein the controller is configured to determine respective ones of the wireless communication elements that are to be activated or not activated; and
wherein the controller is configured to determine respective ones of the plurality of antenna ports of a respective wireless communication element that are to be activated or not activated;
wherein one or more of the plurality of wireless communication elements includes a plurality of antennas; and
wherein the plurality of antennas of at least one of the plurality of wireless communication elements are arrayed horizontally and aligned tangentially to a tier of wireless communication elements around a periphery of a circumference of the geographic area of interest, with a main beam of one or more of the wireless communication elements configured to point along a radius to an interior of a space defined by the plurality of wireless communication elements.
2. The system of claim 1 wherein the wireless communication elements are transmitters, receivers, or transceivers.
3. The system of claim 1 wherein the controller is configured to determine the respective ones of the wireless communication elements that are to be activated or not activated based on traffic density of the geographic area of interest.
4. The system of claim 1 wherein:
the at least one antenna port of one or more of the plurality of wireless communication elements includes at least one antenna element; and
the controller is configured to determine respective ones of the at least one antenna element of a respective wireless communication element that are to be activated or not activated.
5. The system of claim 1 wherein the controller is configured to change an activation state of at least one of a number of wireless communication elements, a number of antenna ports, a number of antenna elements, or a combination thereof when the controller determines a change in traffic density of the geographic area of interest.
6. The system of claim 1 wherein the controller is configured to change from an inactive state to an active state at least one of a number of wireless communication elements, a number of antenna ports, a number of antenna elements, or a combination thereof when the controller determines a change in traffic density of the geographic area of interest.
7. The system of claim 1 wherein the controller is configured to render inactive at least one of a number of communication elements, a number of antenna ports, a number of antenna elements, or a combination thereof when the controller determines a change in traffic density of the geographic area of interest.
8. The system of claim 1 wherein the controller is configured to control of at least one of amplitude and phase of the at least one antenna element of a respective wireless communication element such that the controller is able to adjust a radiating pattern of the wireless communication element.
9. The system of claim 1 wherein the controller is a centralized controller for the plurality of wireless communication elements.
10. The system of claim 1 wherein the controller is a distributed controller with portions of the controller distributed among subsets of the plurality of wireless communication elements, a respective portion of the distributed controller for controlling a respective subset of the plurality of wireless communication elements.
11. The system of claim 1 wherein the controller is configured to coordinate future configuration information for at least one of a subset of the wireless communication elements, a subset of the at least one antenna ports of a respective wireless communication element, a subset of the antenna elements of a respective wireless communication element or a combination thereof based on configuration information for the wireless communication elements in the subset.
12. The system of claim 1 wherein one or more subsets of the plurality of wireless communication elements are configured to exchange information concerning a configuration for the wireless communication elements within a respective subset.
13. The system of claim 12 wherein the configuration information comprises one or more of wireless communication element activation status, antenna port activation status, antenna element activation status, design element information, power level setting information, antenna pattern setting information, antenna orientation setting information, and information concerning resources in use by a first wireless communication element.
14. The system of claim 1 wherein the plurality of wireless communication elements are configured to utilize mechanisms for mitigating inter-wireless communication element interference.
15. The system of claim 1 wherein the plurality of wireless communication elements are configured to utilize Radio Frequency (RF) carrier reuse for mitigating inter-wireless communication element interference.
16. The system of claim 1 wherein the plurality of wireless communication elements are configured to support at least one of RF carrier reuse 1, RF carrier reuse 2, RF carrier reuse 3, RF carrier reuse 6, and RF carrier reuse 12.
17. The system of claim 1 wherein the plurality of wireless communication elements are configured in one or more tiers around a periphery of a circumference of the geographic area of interest, each tier including a subset of the plurality of wireless communication elements, the wireless communication elements of adjacent tiers separated by a vertical distance.
18. The system of claim 1 wherein a front face of the at least one antenna of at least one of the plurality of wireless communication elements is deployed facing approximately straight down to the earth.
19. The system of claim 1 wherein a front face of the at least one antenna of at least one of the plurality of wireless communication elements is deployed with an approximately 90\xb0 down tilt to the horizontal.

1461120140-28a596fd-18b1-46b2-85c7-71b2ffd9732a

1. A memory device comprising:
a volatile memory portion; and
a nonvolatile memory portion being electrically connected to the volatile memory portion, the nonvolatile memory portion comprising a memory element comprising a first terminal and a second terminal,
wherein the memory element is configured to store data stored in the volatile memory portion, and
wherein a resistance value of the memory element is variable in accordance with voltage applied between the first terminal and the second terminal.
2. The memory device according to claim 1, the nonvolatile memory portion comprising:
a first circuit being configured to switch voltage applied to the memory element in accordance with the data; and
a first element being configured to output the data in accordance with a resistance value of the memory element.
3. The memory device according to claim 1,
wherein the first terminal is an electrode,
wherein the second terminal is an electrode, and
wherein the memory element comprises a transition metal oxide between the first terminal and the second terminal.
4. A data processing device including the memory device according to claim 1, the data processing device comprising:
an address management portion;
a program memory;
an instruction register;
an instruction decoder;
a control portion;
a register group;
an arithmetic unit; and
an arithmetic register,
wherein the instruction register, the register group, and the arithmetic register each include the memory device.
5. The memory device according to claim 2 comprising:
a first line being operationally connected to the memory element; and
a second line being operationally connected to the memory element,
wherein the first line is configured to transmit a first signal for controlling storage of the data and output of the data to the volatile memory portion, and
wherein the second line is configured to transmit a second signal for controlling storage of the data and output of the data to the volatile memory portion.
6. The memory device according to claim 1, the nonvolatile memory portion comprising:
a volatile switching circuit electrically connected to the first terminal;
a first switch directly connected to the first terminal; and
a second switch directly connected to the second terminal.
7. An electronic device comprising the memory device according to claim 1.
8. A driving method of a memory device comprising:
a volatile memory portion; and
a nonvolatile memory portion being electrically connected to the volatile memory portion, the nonvolatile memory portion comprising a memory element comprising a first terminal and a second terminal,
wherein the memory element is configured to store data stored in the volatile memory portion, and
wherein a resistance value of the memory element is variable in accordance with voltage applied between the first terminal and the second terminal,
the driving method comprising the steps of:
storing data stored in the volatile memory portion into the nonvolatile memory portion, and
controlling stop and restart of power supply to the volatile memory portion and the nonvolatile memory portion.
9. The driving method of a memory device according to claim 8,
wherein the storing step is operated by switching voltage applied to the memory element.
10. The driving method of a memory device according to claim 8, comprising the steps of:
converting the data stored in the nonvolatile memory portion as a resistance value of the memory element into a first voltage; and
outputting the first voltage to the volatile memory portion.
11. The driving method of a memory device according to claim 8, further comprising the steps of:
switching whether voltage is applied to the memory element or not by a first signal; and
switching a polarity of the voltage applied to the memory element by the data and a second signal.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A child vehicle, comprising:
a front portion having at least one front wheel coupled thereto and a first handlebar operatively configured to change the direction of the at least one front wheel;
a rear portion coupled to the front portion and having at least one rear wheel coupled thereto, the front portion capable of rotating relative to the rear portion about a first pivot axis;
a pivot joint coupled to the vehicle;
a pivot member coupled to the pivot joint, the pivot joint operatively configured to provide rotation of the pivot member relative to the vehicle between at least a first position and a second position about a second pivot axis, the pivot member operating as a seat for supporting a rider thereon when in the first position to define a ride-on configuration of the vehicle, and the pivot member operating as a handlebar when in the second position to define a scooter configuration of the vehicle.
2. The child vehicle of claim 1, wherein the pivot joint includes a push button, the pivot member being movable between the first and second positions when the push button is depressed, and the pivot member prohibited from rotating about the second pivot axis when the push button is not depressed.
3. The child vehicle of claim 1, wherein the first pivot axis and the second pivot axis are generally orthogonal to each other.
4. The child vehicle of claim 1, wherein the first pivot axis and the second pivot axis intersect one another.
5. The child vehicle of claim 1, wherein the pivot joint is capable of rotating relative to the vehicle about the first pivot axis.
6. The child vehicle of claim 5, wherein the pivot member engages the rear portion of the vehicle so as to limit rotation of the pivot member relative to the vehicle about the first pivot axis when the pivot member is in the first position.
7. The child vehicle of claim 5, wherein the pivot member includes a second handlebar operatively configured to change the direction of the at least one front wheel when the pivot member is in the second position.
8. The child vehicle of claim 1, wherein the pivot member includes a compartment for storing items.
9. The child vehicle of claim 7, wherein the pivot member comprises:
a main body member coupled to the pivot joint and defining the compartment; and
a lid member coupled to the pivot joint and rotatable relative to the main body member between an open position, wherein the compartment is accessible, and a closed position, wherein the compartment is inaccessible.
10. The child vehicle of claim 8, further comprising a cover member fixedly coupled to the main body member and having a second handlebar.
11. A child vehicle, comprising:
a front portion having at least one front wheel coupled thereto;
a rear portion coupled to the front portion and having at least one rear wheel coupled thereto, the front portion capable of rotating relative to the rear portion about a first pivot axis;
a pivot joint coupled to the vehicle so as to be rotatable about the first pivot axis;
a pivot member coupled to the pivot joint, the pivot joint operatively configured to provide rotation of the pivot member relative to the vehicle about a second pivot axis to define at least a first position and a second position of the pivot member;
a first handlebar coupled to the front portion and operatively configured to change the direction of the at least one front wheel;
a second handlebar coupled to the pivot member, wherein the second handlebar is operatively configured to change the direction of the at least one front wheel when the pivot member is in the second position, and operatively ineffective to change the direction of the at least one front wheel when the pivot member is in the first position.
12. The child vehicle of claim 11, wherein the first pivot axis and the second pivot axis are generally orthogonal to each other.
13. The child vehicle of claim 11, wherein the first pivot axis and the second pivot axis intersect one another.
14. The child vehicle of claim 11, wherein the front portion includes a recess having a first shape and the pivot member includes a projection having a shape corresponding to the first shape, wherein when the pivot member is in the second position, the projection engages the recess such that rotation of the pivot member about the first pivot axis causes a corresponding rotation of the first portion relative to the rear portion about the first pivot axis.
15. The child vehicle of claim 11, wherein the pivot member engages the rear portion of the vehicle so as to limit rotation of the pivot member relative to the vehicle about the first pivot axis when the pivot member is in the first position.
16. A child vehicle, comprising:
a front portion having at least one front wheel coupled thereto;
a rear portion coupled to the front portion and having at least one rear wheel coupled thereto, the front portion capable of rotating relative to the rear portion about a first pivot axis;
a pivot member coupled to the vehicle so as to be rotatable about the first pivot axis and a second pivot axis, rotation about the second pivot axis defining at least a first position and a second position of the pivot member, the pivot member operating as a seat for supporting a rider thereon when in the first position to define a ride-on configuration of the vehicle, the pivot member operating as a handlebar when in the second position to define a scooter configuration of the vehicle, and the pivot member operatively configured to change the direction of the at least one front wheel when in the second position.
17. A child vehicle, comprising:
a front portion having at least one front wheel coupled thereto;
a rear portion coupled to the front portion and having at least one rear wheel coupled thereto, the front portion capable of rotating relative to the rear portion about a first pivot axis;
a pivot member coupled to the vehicle so as to be rotatable about a second pivot axis between at least a first position and a second position, the pivot member operating as a seat for supporting a rider thereon when in the first position to define a ride-on configuration of the vehicle, the pivot member operating as a handlebar when in the second position to define a scooter configuration of the vehicle; and
at least one graphical interface coupled to the vehicle and configured to be marked on by a marking utensil.
18. The child vehicle of claim 17, wherein the graphical interface is integrally formed on an exposed surface of the vehicle.
19. The child vehicle of claim 18, wherein the graphical interface includes a surface roughness sufficient to allow a marking utensil to mark thereon when in movable contact therewith.
20. The child vehicle of claim 17, further comprising a substrate removably coupled to the vehicle, the substrate defining the graphical interface.