Author: claimsbot

1. An apparatus, comprising:
a plurality of detection modules to detect a leading number of \u20180’s in a range value of an input stream of symbols, a run of \u2018’s in an offset value of the input stream of symbols, and a run of \u20180’s following the run of \u20181\u2019in the offset value; and
a bitstream generation module to output a bitstream based on an iteration window for a number of renormalization iterations, the iteration window comprising a bit range after the run of \u20181’s in the offset value, the number of renormalization iterations based on the leading number of \u20180’s in the range value.
2. The apparatus of claim 1, the apparatus to renormalize the range value by shifting the range value by the leading number of \u20180\u2019s.
3. The apparatus of claim 1, the apparatus to determine a new range value and a new offset value based on the number of renormalization iterations.
4. The apparatus of claim 1, the apparatus to determine that the offset value falls in an upper range if significant bits of the offset value comprise a run of \u20181’s in the iteration window and to output a value of \u20181\u2019to the bitstream.
5. The apparatus of claim 4, the apparatus to reduce the offset value by the lowest value of the upper range after an iteration and to multiply the reduced offset value to put the offset value back into the upper range.
6. The apparatus of claim 1, the apparatus to determine that the offset value falls below an upper range during the run of \u20180’s and to output a value of \u20180\u2019 to the bitstream.
7. The apparatus of claim 1, the apparatus to latch the iteration window into a register and to increment a number of bits outstanding if a last bit in the register comprises a \u20181\u2019 and to otherwise output a value of \u20180\u2019 to the bitstream.
8. The apparatus of claim 7, the apparatus to shift the register by one bit each time the number of bits outstanding is incremented.
9. The apparatus of claim 1, further comprising a pattern detection module to identify a run of \u20181’s followed by one or more \u20180’s as a particular pattern.
10. The apparatus of claim 9, the bitstream generation module to output a bitstream at a throughput of 1 bit per cycle.
11. A system, comprising:
a plurality of multi-cycle renormalization units, each multi-cycle renormalization unit comprising:
a plurality of detection modules to detect a leading number of \u20180’s in a range value of an input stream of symbols, a run of \u20181’s in an offset value of the input stream of symbols, and a run of \u20180’s following the run of \u20181\u2019 in the offset value; and
a bitstream generation module to output a bitstream based on an iteration window for a number of renormalization iterations, the iteration window comprising a bit range after the run of \u20181’s in the offset value, the number of renormalization iterations based on the leading number of \u20180’s in the range value.
12. The system of claim 11, the plurality of multi-cycle renormalization units to renormalize the range value by shifting the range value by the leading number of \u20180’s.
13. The system of claim 11, plurality of multi-cycle renormalization units to determine a new range value and a new offset value based on the number of renormalization iterations.
14. The system of claim 11, the plurality of multi-cycle renormalization units to determine that the offset value falls in an upper range if significant bits of the offset value comprise a run of \u20181’s in the iteration window and to output a value of \u20181\u2019 to the bitstream.
15. The system of claim 14, the plurality of multi-cycle renormalization units to reduce the offset value by the lowest value of the upper range after an iteration and to multiply the reduced offset value to put the offset value back into the upper range.
16. The system of claim 11, the plurality of multi-cycle renormalization units to determine that the offset value falls below an upper range during the run of \u20180’s and to output a value of \u20180\u2019 to the bitstream.
17. The system of claim 11, the plurality of multi-cycle renormalization units to latch the iteration window into a register and to increment a number of bits outstanding if a last bit in the register comprises a \u20181\u2019 and to otherwise output a value of \u20180\u2019 to the bitstream.
18. The system of claim 17, the plurality of multi-cycle renormalization units to shift the register by one bit each time the number of bits outstanding is incremented.
19. The system of claim 11, further a drainer and bitstream composer coupled to the plurality of multi-cycle renormalization units, the drainer and bitstream composer to output a bitstream at a throughput of 1 bit per cycle.
20. The system of claim 11, further comprising a media source to couple to the plurality of multi-cycle renormalization units.
21. A method, comprising:
detecting a leading number of \u20180’s in a range value of an input stream of symbols, a run of \u20181’s in an offset value of the input stream of symbols, and a run of \u20180’s following the run of \u20181\u2019 in the offset value; and
outputting a bitstream based on an iteration window for a number of renormalization iterations, the iteration window comprising a bit range after the run of \u20181’s in the offset value, the number of renormalization iterations based on the leading number of \u20180’s in the range value.
22. The method of claim 21, further comprising renormalizing the range value by shifting the range value by the leading number of \u20180’s.
23. The method of claim 21, further comprising determining a new range value and a new offset value based on the number of renormalization iterations.
24. The method of claim 21, further comprising determining that the offset value falls in an upper range if significant bits of the offset value comprise a run of \u20181’s in the iteration window and outputting a value of \u20181\u2019 to the bitstream.
25. The method of claim 24, further comprising reducing the offset value by the lowest value of the upper range after an iteration and multiplying the reduced offset value to put the offset value back into the upper range.
26. The method of claim 21, further comprising determining that the offset value falls below an upper range during the run of \u20180’s and to output a value of \u20180\u2019 to the bitstream.
27. The method of claim 21, further comprising latching the iteration window into a register and incrementing a number of bits outstanding if a last bit in the register comprises a \u20181\u2019 and otherwise outputting a value of \u20180\u2019 to the bitstream.
28. The method of claim 27, further comprising shifting the register by one bit each time the number of bits outstanding is incremented.
29. The method of claim 21, further comprising identifying a run of \u20181’s followed by one or more \u20180’s as a particular pattern.
30. The method of claim 29, further comprising outputting a bitstream at a throughput of 1 bit per cycle.
31. An article comprising a computer-readable storage medium containing instructions that if executed enable a system to:
detect a leading number of \u20180’s in a range value of an input stream of symbols, a run of \u20181’s in an offset value of the input stream of symbols, and a run of \u20180’s following the run of \u20181\u2019 in the offset value; and
output a bitstream based on an iteration window for a number of renormalization iterations, the iteration window comprising a bit range after the run of \u20181’s in the offset value, the number of renormalization iterations based on the leading number of \u20180’s in the range value.
32. The article of claim 31, further comprising instructions that if executed enable the system to renormalize the range value by shifting the range value by the leading number of \u20180’s.
33. The article of claim 31, further comprising instructions that if executed enable the system to determine a new range value and a new offset value based on the number of renormalization iterations.
34. The article of claim 31, further comprising instructions that if executed enable the system to determine that the offset value falls in an upper range if significant bits of the offset value comprise a run of \u20181’s in the iteration window and to output a value of \u20181\u2019 to the bitstream.
35. The article of claim 34, further comprising instructions that if executed enable the system to reduce the offset value by the lowest value of the upper range after an iteration and multiply the reduced offset value to put the offset value back into the upper range.
36. The article of claim 31, further comprising instructions that if executed enable the system to determine that the offset value falls below an upper range during the run of \u20180’s and to output a value of \u20180\u2019 to the bitstream.
37. The article of claim 31, further comprising instructions that if executed enable the system to latch the iteration window into a register and increment a number of bits outstanding if a last bit in the register comprises a \u20181\u2019 and otherwise output a value of \u20180\u2019 to the bitstream.
38. The article of claim 37, further comprising instructions that if executed enable the system to shift the register by one bit each time the number of bits outstanding is incremented.
39. The article of claim 31, further comprising instructions that if executed enable the system to identify a run of \u20181’s followed by one or more \u20180’s as a particular pattern.
40. The article of claim 39, further comprising instructions that if executed enable the system to output a bitstream at a throughput of 1 bit per cycle.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A steering apparatus comprising:
a steering drive shaft capable of moving in an axial direction in response to a steering operation;
a housing accommodating the steering drive shaft and having a tube part; and
a bracket having a fitting hole into which said tube part is fitted and attaching said housing to a car body,
wherein said bracket has a recess in said fitting hole and said tube part has an escape preventing protrusion bent into said recess.
2. The steering apparatus according to claim 1, wherein said recess is a circular groove.
3. The steering apparatus according to claim 1, wherein said tube part is metal.
4. A method of manufacturing a steering apparatus provided with a steering drive shaft capable of moving in an axial direction in response to a steering operation and with a housing accommodating the steering drive shaft and having a metal tube part, characterized by comprising:
a fitting step of fitting said metal tube part into a fitting hole of a bracket provided with said fitting hole into which said metal tube part is fitted and which has a recess in an inner side thereof, and with an attached part attached to the car body; and
a step of pressing said metal tube part outward in a radial direction from an inner side of the metal tube part after the fitting step, and thereby bending a part of said metal tube part into said recess.

I claim:

1. An observation and recording system for an airplane comprising:
camera means carried by the airplane, said camera means being directed at the airspace in front of the airplane and the pilot of the airplane and
means for recording images of the airspace in front of the airplane and of the pilot of the airplane observed by said camera means.
2. The observation and recording system for an airplane of claim 1 further including means for recording information from the instrument panel of the airplane.
3. The observation and recording system for an airplane of claim 2 wherein said information is provided by said camera means.
4. An observation and recording system for a train comprising:
camera means carried by the train, said camera means being directed at the track in front of the train and the operator of the train and
means for recording images of the track in front of the train and of the operator of the train observed by said camera means.
5. The observation and recording system for a train of claim 4 further including means for recording information from the instrument panel of the train.
6. The observation and recording system for a train of claim 5 wherein said information is provided by said camera means.
7. An observation and recording system for a boat comprising:
camera means carried by the boat, said camera means being directed at the waterway in front of the boat and the operator of the boat and
means for recording images of the waterway in front of the boat and of the operator of the boat observed by said camera means.
8. The observation and recording system for a boat of claim 7 further including means for recording information from the instrument panel of the boat.
9. The observation and recording system for a boat of claim 8 wherein said information is provided by said camera means.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A device for driving an active matrix electro-optical panel in which a plurality of pixels in an image display region each have an electro-optical element and active element means for actively controlling the electro-optical element to selectively supply electric charge to the electro-optical element through a source line in response to a write selection signal that selects a horizontal scanning period for storing the electric charge in each row of pixel units, the driving device comprising:
first driving circuit for, in a first period of the horizontal scanning period for storing the electric charge in an n-th row of pixel units (where, n is a natural number), simultaneously supplying the write selection signal to k rows of pixel units (where, k is a natural number greater than or equal to 2) including the n-th row of pixel units through write scanning lines arranged to correspond to the respective rows of the pixel units, and for supplying the write selection signal to the n-th row of pixel units in a second period of the horizontal scanning period for storing the electric charge; and
second driving circuit for simultaneously performing first electric charge supply on the k rows of pixel units arranged along any one of the source lines through the one source line in the first period, and for performing second electric charge supply on the n-th row of pixel units through the one source line in the second period,
wherein after the second period, the second electric charge is stored in the n-th row of pixel units and the first electric charge is stored in the k rows of pixel units other than the n-th row of pixel units.
2. The device for driving an electro-optical panel according to claim 1,
wherein, after the second period, the active element means supplies the electric charge to the electro-optical element belonging to the n-th row of pixel units according to the second electric charge supply in response to a display selection signal that selects the horizontal scanning period for displaying each row of pixel units, after the second period, the first driving circuit supplies the display selection signal to the n-th row of pixel units through a selection scanning line arranged to correspond to each row of pixel units, and
wherein the second driving circuit performs pseudo data signal supply as the first electric charge supply in the first period and performs the data signal supply to the n-th row of pixel units as the second electric charge supply in the second period.
3. The device for driving an electro-optical panel according to claim 2,
wherein, after the horizontal scanning period for storing the electric charge in the k rows of pixel units is over, the first driving circuit supplies the display selection signal to the n-th row of pixel units included in the k rows of pixel units to select the horizontal scanning period for display.
4. The device for driving an electro-optical panel according to claim 2,
the active element means further comprising:
one or more first active elements for starting the first and second electric charge supplies in response to the write selection signal; and
one or more second active elements for supplying the electric charge to the electro-optical element belonging to the n-th row of pixel units according to the second electric charge supply in response to the display selection signal.
5. The device for driving an electro-optical panel according to claim 1, the plurality of pixels each further comprise a storage capacitor for storing the electric charge supplied by the second charge supply so as to define the amount of electric charge applied to the electro-optical element through some of the active element means, and
wherein, in the first and second periods, the second driving circuit performs the first and second electric charge supplies on the source lines and the storage capacitors, respectively.
6. The device for driving an electro-optical panel according to claim 5,
wherein, in the second period, the second driving circuit performs the second electric charge supply on the source lines and the storage capacitors to write a voltage corresponding to the data signal with respect to the n-th row of pixel units to the storage capacitor.
7. The device for driving an electro-optical panel according to claim 1,
wherein the k rows of pixel units include the n-th row of pixel units, an (n+1)-th row of pixel units, and an (n+2)-th row of pixel units.
8. An electro-optical device comprising the device for driving an electro-optical panel and the electro-optical panel according to claim 1.
9. An electronic apparatus comprising the electro-optical device according to claim 8.
10. A method of driving an active matrix electro-optical panel in which a plurality of pixels in an image display region each have an electro-optical element and active element means for actively controlling the electro-optical element to selectively supply electric charge to the electro-optical element through a source line in response to a write selection signal that selects a horizontal scanning period for storing the electric charge in each row of pixel units, the method comprising:
a first driving step of, in a first period of the horizontal scanning period for storing the electric charge in an n-th row of pixel units (where, n is a natural number), simultaneously supplying the write selection signal to k rows of pixel units (where, k is a natural number greater than or equal to 2) including the n-th row of pixel units through write scanning lines arranged to correspond to the respective rows of the pixel units, and of supplying the write selection signal to the n-th row of pixel units in a second period of the horizontal scanning period for storing the electric charge; and
a second driving step of simultaneously performing first electric charge supply on the k rows of pixel units arranged along any one of the source lines through the one source line in the first period, and of performing second electric charge supply on the n-th row of pixel units through the one source line in the second period,
wherein after the second period, the second electric charge is stored in the n-th row of pixel units and the first electric charge is stored in the k rows of pixel units other than the n-th row of pixel units.