Author: claimsbot

1. A method for implementing a class of N\xd7N circular expanders each serving a connection request to route m incoming signals, m\u2266N, and for enabling the service of any connection request in a nonblocking way on the condition that the connection request is compliant to certain constraints, the method for each of the circular expanders comprising
configuring a switch defined by a set of connection states and having an array of N input ports with N distinct input addresses 0, 1, . . . , N\u22121 and an array of N output ports with N distinct output addresses 0, 1, . . . , N\u22121 wherein the m incoming signals arrive at m input ports determining m active input addresses and are destined for a total of n, m\u2266n\u2266N, distinct output ports determining n active output addresses, and wherein said constraints on the connection request are that: for any two active input addresses i and j and any two active output addresses p and q such that i is being connected to p and j is being connected to q,\u2225i\u2212j\u2225N\u2266|p\u2212q|, where \u2225i\u2212j\u2225N=min {|i\u2212j|, N\u2212|i\u2212j|} is the distance between i and j on the discrete circle of length N, and
routing the incoming signals from said m input ports to said n distinct output ports by activating one of the connection states such that the activated one of the connection states accommodates the connection request subject to said constraints on the connection request,
said class excluding (i) those having a switch constructed from the banyan network of expander cells prepended with the shuffle exchange and (ii) those having a switch constructed from the shuffle-exchange network of expander cells prepended with the shuffle exchange.
2. The method as recited in claim 1 wherein the configuring includes constructing the switch as an N\xd7N k-stage switching network composed of k stages of nodes, an interstage exchange between any succeeding two of the k stages, an input exchange and an output exchange, and wherein each node is filled with another switch.
3. The method as recited in claim 1 wherein the configuring includes constructing the switch as an N\xd7N k-stage switching network composed of k stages of nodes, an interstage exchange between any succeeding two of the k stages, an input exchange and an output exchange, and wherein each node is filled with an circular expander.
4. The method as recited in claim 1 wherein the configuring includes constructing the switch as a two-stage interconnection network composed of a first stage of nodes being the input nodes and a second stage of nodes being the output nodes, an interstage exchange, and an input exchange corresponding to the interstage exchange prepended to the network, and wherein each node is filled with an circular expander.
5. The method as recited in claim 1 wherein the configuring includes constructing the switch as an X2 interconnection network having nodes and wherein each node is filled with an circular expander.
6. The method as recited in claim 1 wherein the configuring includes constructing the switch as an X2 interconnection network having nodes and wherein the nodes are filled with a plurality of circular expanders.
7. The method as recited in claim 1 wherein the configuring includes constructing the switch as a recursive X2 interconnection network having nodes and wherein each node is filled with an circular expander.
8. The method as recited in claim 1 wherein the configuring includes constructing the switch as a recursive X2 interconnection network having nodes and wherein the nodes are filled with a plurality of circular expanders.
9. The method as recited in claim 1 wherein the configuring includes constructing the switch as a recursive X2 intereonnection network having nodes and wherein each of the nodes is a cell and each cell is filled with a 2\xd72 circular expander.
10. The method as recited in claim 9 wherein the 2\xd72 circular expander is an expander cell.
11. The method as recited in claim 1 wherein the configuring includes constructing the switch as a recursive X2 interconnection network of cells with each cell filled with a 2\xd72 circular expander.
12. The method as recited in claim 11 wherein the 2\xd72 circular expander is an expander cell.
13. The method as recited in claim 1 wherein the configuring includes constructing the switch as a banyan-type network whose trace and guide are both monotonically increasing and wherein each of the 2\xd72 nodes of the banyan-type network is filled with a 2\xd72 circular expander.
14. The method as recited in claims from 13 wherein the 2\xd72 circular expander is an expander cell.
15. The method as recited in claim 1 wherein the configuring includes constructing the switch as a recursive plain 2-stage interconnection network of cells prepended with a swap exchange and wherein each cell of the network is filled with a 2\xd72 circular expander.
16. The method as recited in claim 15 wherein the 2\xd72 circular expander is an expander cell.
17. The method as recited in claim 1 wherein the configuring includes constructing the switch as a divide-and-conquer network of cells prepended with a swap exchange and wherein each cell of the network is filled with a 2\xd72 circular expander.
18. A class of N\xd7N circular expanders each serving a connection request to route in incoming signals, m\u2266N, and for enabling the service of any connection request in a nonblocking way on the condition that the connection request is compliant to certain constraints, each of the circular expanders comprising
a switch defined by a set of connection states and having an array of N input ports with N distinct input addresses 0, 1, . . . , N\u22121 and an array of N output ports with N distinct output addresses 0, 1, . . . , N\u22121 wherein the in incoming signals arrive at in input ports determining in active input addresses and are destined for a total of n, m\u2266n\u2266N, distinct output ports determining n active output addresses, and wherein said constraints on the connection request are that: for any two active input addresses i and j and any two active output addresses p and q such that i is being connected to p and j is being connected to q, \u2225I\u2212j\u2225N\u2266|p\u2212q|, where \u2225i\u2212j\u2225N=min {|i\u2212j|, N\u2212|i\u2212j|} is the distance between i and j on the discrete circle of length N, and
control circuitry, coupled to the switch, for routing the incoming signals from said in input ports to said n distinct output ports by activating one of the connection states such that the activated one of the connection states accommodates the connection request subject to said constraints on the connection request,
said class excluding (i) those having a switch constructed from the banyan network of expander cells prepended with the shuffle exchange and (ii) those having a switch constructed from the shuffle-exchange network of expander cells prepended with the shuffle exchange.
19. The circular expander as recited in claim 18 wherein the switch is constructed by an N\xd7N k-stage switching network composed of k stages of nodes, an interstage exchange between any succeeding two of the k stages, an input exchange and an output exchange, and wherein each node is filled with another switch.
20. The circular expander as recited in claim 18 wherein the switch is constructed by an N\xd7N k-stage switching network composed of k stages of nodes, an interstage exchange between any succeeding two of the k stages, an input exchange and an output exchange, and wherein each node is filled with another circular expander.
21. The circular expander as recited in claim 18 wherein the switch is constructed from a two-stage interconnection network composed of a first stage of nodes being the input nodes and a second stage of nodes being the output nodes, an interstage exchange, and an input exchange corresponding to the interstage exchange prepended to the network, and wherein each node is filled with another circular expander.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A charged particle beam apparatus, comprising:
a charged particle gun that emits a primary charged particle beam for irradiating a sample;
a stage for placing the sample thereon;
an objective lens having an opening for allowing the primary charged particle beam to pass therethrough, the objective lens including:
a first magnetic pole member that is disposed around the opening and to which a positive voltage is applied, the first magnetic pole member having a terminal portion at a sample side thereof that functions as an upper magnetic pole member of the objective lens;
a second magnetic pole member that supplies a magnetic flux to the first magnetic pole member and is formed with a hollowed interior;
a coil that is disposed within the second magnetic pole member and that supplies a magnetic flux to the second magnetic pole member; and
a third magnetic pole member in which the opening is formed, the third magnetic pole member being disposed between the stage and the second magnetic pole member, the third magnetic pole member functioning as a lower magnetic pole member of the objective lens;

a detector that is disposed above the first magnetic pole member and detects a secondary charged particle released from the sample or a tertiary charged particle that is emitted as a result of the secondary charged particle; and
an image output unit for outputting a top-view image based on a detection result of the detector.
2. The charged particle beam apparatus according to claim 1, further comprising a power supply that enables a landing energy of the primary charged particle beam at the sample to be set in a range from 50 eV to 10 keV.
3. The charged particle beam apparatus according to claim 1, further comprising means for applying a retarding voltage to the sample, and wherein a voltage of the third magnetic pole member is controlled so as to be higher than the retarding voltage and lower than a voltage of the second magnetic pole member.
4. The charged particle beam apparatus according to claim 3, wherein the means for applying the retarding voltage changes the retarding voltage based on an amount of electrification of the sample.
5. The charged particle beam apparatus according to claim 1, wherein the detector comprises an axial detector.
6. The charged particle beam apparatus according to claim 1, wherein the second magnetic pole member is grounded.
7. A charged particle beam apparatus comprising:
a charged particle gun that emits a primary charged particle beam for irradiating a sample;
a stage for placing the sample thereon;
an objective lens having an opening for allowing the primary charged particle beam to pass therethrough, the objective lens including:
a first magnetic pole member that is disposed around the opening and to which a positive voltage is applied, the first magnetic pole member having a terminal portion at a sample side thereof that functions as an upper magnetic pole member of the objective lens;
a second magnetic pole member that supplies a magnetic flux to the first magnetic pole member and is formed with a hollowed interior;
a coil that is disposed within the second magnetic pole member and that supplies a magnetic flux to the second magnetic pole member; and
a third magnetic pole member in which the opening is formed, the third magnetic pole member being disposed between the stage and the second magnetic pole member, the third magnetic pole member functioning as a lower magnetic pole member of the objective lens;

a left detector and a right detector that are disposed above the first magnetic pole member and detect a secondary charged particle released from the sample or a tertiary charged particle that is emitted as a result of the secondary charged particle; and
an image output unit for outputting a shaded image based on detection results of the left and right detectors.
8. The charged particle beam apparatus according to claim 7, further comprising means for applying a retarding voltage to the sample, and wherein a voltage of the third magnetic pole member is controlled so as to be higher than the retarding voltage and lower than a voltage of the second magnetic pole member.
9. The charged particle beam apparatus according to claim 8, wherein the means for applying the retarding voltage changes the retarding voltage based on an amount of electrification of the sample.
10. The charged particle beam apparatus according to claim 7, further comprising a power supply that enables a landing energy of the primary charged particle beam at the sample to be set in a range from 50 eV to 10 keV.
11. The charged particle beam apparatus according to claim 7, wherein each of the left and right detectors comprises an axial detector.
12. The charged particle beam apparatus according to claim 7, wherein the second magnetic pole member is grounded.
13. The charged particle beam apparatus according to claim 7, wherein the shaded image is obtained based on information of azimuth angles or elevation angles of the secondary charged particle or the tertiary charged particle with respect to the primary charged particle beam.

1. A solid-state imaging device comprising:
a pixel circuit; and
a pixel signal readout circuit including a comparator, the comparator comprising:
a first circuit including a first transistor that receives a pixel signal from the pixel circuit, and a second transistor that receives a reference signal, and
a second circuit including a third transistor coupled to the first circuit and a first predetermined voltage line, a fourth transistor coupled to the third transistor in series and to a second predetermined voltage line, a fifth transistor coupled to a gate of the fourth transistor and one of a drain or a source of the fourth transistor, and a sixth transistor coupled to the first predetermined voltage line and the fifth transistor in series.
2. The solid-state imaging device according to claim 1, wherein a gate of the third transistor is coupled to the first circuit.
3. The solid-state imaging device according to claim 1, wherein the first circuit is configured to perform a comparison operation of the pixel signal and the reference signal.
4. The solid-state imaging device according to claim 3, wherein the second circuit is configured to output a determination signal according to a result of the comparison operation performed by the first circuit.
5. The solid-state imaging device according to claim 1, wherein a gate of the first transistor is configured to receive the pixel signal.
6. The solid-state imaging device according to claim 5, wherein a gate of the second transistor is configured to receive the reference signal.
7. The solid-state imaging device according to claim 1, wherein the second circuit includes a seventh transistor disposed between a gate of the fourth transistor and a drain or a source of the fourth transistor.
8. The solid-state imaging device according to claim 7, wherein the third transistor has a first conductivity type; and the fourth, sixth, and seventh transistors respectively have a second conductivity type.
9. The solid-state imaging device according to claim 8, wherein the first conductivity type is a p-type and the second conductivity type is an n-type.
10. The solid-state imaging device according to claim 1, wherein a drain of the third transistor is coupled to a drain of the fourth transistor.
11. The solid-state imaging device according to claim 1, wherein a source of the third transistor is coupled to a source of the fourth transistor.
12. An electronic apparatus comprising:
an optical system;
a solid-state imaging device including;
a pixel circuit; and
a pixel signal readout circuit including a comparator, the comparator comprising:
a first circuit including a first transistor that receives a pixel signal from the pixel circuit, and a second transistor that receives a reference signal, and
a second circuit including a third transistor coupled to the first circuit and a first predetermined voltage line, a fourth transistor coupled to the third transistor in series and to a second predetermined voltage line, a fifth transistor coupled to the a gate of the fourth transistor and one of a drain or a source of the fourth transistor, and a sixth transistor coupled to the first predetermined voltage line and the fifth transistor in series.
13. The electronic apparatus according to claim 12, wherein a gate of the third transistor is coupled to the first circuit.
14. The electronic apparatus according to claim 13, wherein the first circuit is configured to perform a comparison operation of the pixel signal and the reference signal.
15. The electronic apparatus according to claim 13, wherein the second circuit is configured to output a determination signal according to a result of the comparison operation performed by the first circuit.
16. The electronic apparatus according to claim 12, wherein a gate of the first transistor is configured to receive the pixel signal.
17. The electronic apparatus according to claim 16, wherein a gate of the second transistor is configured to receive the reference signal.
18. The electronic apparatus according to claim 12, wherein the second circuit includes a seventh transistor disposed between a gate of the fourth transistor and a drain or a source of the fourth transistor.
19. The electronic apparatus according to claim 18, wherein the third transistor has a first conductivity type; and the fourth, sixth, and seventh transistors respectively have a second conductivity type.
20. The electronic apparatus according to claim 19, wherein the first conductivity type is a p-type and the second conductivity type is an n-type.
21. The electronic apparatus according to claim 12, wherein a drain of the third transistor is coupled to a drain of the fourth transistor.
22. The electronic apparatus according to claim 12, wherein a source of the third transistor is coupled to a source of the fourth transistor.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1) A temple for eyeglasses provided with a wire or a portion of a wire used to hold glasses, comprising:
two coupled parts which are shaped in such a way as to form complementary parts of a peripheral wall which delimitates a cavity forming a housing for at least part of the wire, said housing being substantially shaped as a serpentine;
holding means for blocking an end of the wire into the housing;
an opening which is disposed at the end of at least one of two parts; through said opening the wire passing and coming out outwardly when pulled down, with possibility of be adjusted;
means for returning the wire inside its housing when it is not used, as an elastic band, a spring or other means which allows the recovery of the wire.
2) The temple of claim 1, wherein the temple is provided with releasable means for blocking the wire once extracted, as a flange, a groove, a lock or similar, which blocks the wire and stops moving and prevent the return within its housing.
3) The temple of claim 1, wherein the two parts are coupled by ultrasonic welding.
4) The temple of claim 1, wherein the holding means for blocking an end of the wire into the housing comprises a tooth which reduces the width of the housing so that when the two parts are coupled the end of the wire disposed above the tooth is crushed and then firmly retained in position near an end of the temple.
5) The temple of claim 1, wherein the housing has a sharp double change of direction for facilitatingenabling the locking of the end of the wire.
6) The temple of claim 1, wherein the supporting wire of the eyeglasses consists of a first single portion made of rope, thin chain, or other suitable material, joined with a second portion of elastic wire disposed at an end of the housing, so that, for extracting the wire, it is sufficient to pull the same wire till the second portion is tightened and maintained in a stretched configuration blocking the wire in the inner of the housing or in another way.
7) The temple of claim 1, wherein the wire is pulled inside the housing by the force exerted by the elastic wire which reduces the initial stretch.
8) The temple of claim 1, wherein the serpentine has a single loop, said loop being disposed substantially near the end of the temple opposite to the end in which are located the holding means, the housing being suitable for containing the wire for a length of about twice the length of the temple.
9) The temple of claim 1, wherein the serpentine has many loops arranged transversely in respect of the longitudinal extent of the temple, the holding means of the wire being placed distally in respect to the end of the temple provided with the opening from which the wire comes out.
10) The temple of claim 1, wherein the serpentine has many loops arranged longitudinally so that the wire may be disposed on portions which are parallel in respect to the longitudinal extent of the temple.
11) The temple of claim 1, wherein it is provided with a block, disposed in the point or in the points of curvature of the serpentine, for preventing the wire (2, 2\u2032) to escape from the curvature when the same wire is inserted in the loop.