1461113525-0f3adb4e-a211-441b-bac3-49322df082f6

1. A multi-input power supply circuit comprising:
a plurality of power supplies;
a transformer including windings corresponding to said plurality of power supplies;
switching devices for performing switching operations and transistors for preventing inverse currents, said switching devices and transistors being connected in series to said windings, respectively; and
a control circuit for controlling switching operations of said switching devices and on and off operations of said transistors.
2. The multi-input power supply circuit according to claim 1, wherein,
in switching from one of said plurality of power supplies to another one of said plurality of power supplies, said control circuit turns on one of said transistors corresponding to the another one of said plurality of power supplies after stopping a switching operation of one of said switching devices corresponding to the one of said plurality of power supplies.
3. The multi-input power supply circuit according to claim 1, wherein,
in switching from one of said plurality of power supplies to another one of said plurality of power supplies, said control circuit starts a switching operation of one of said switching devices corresponding to the another one of said plurality of power supplies after turning off one of said transistors corresponding to the one of said plurality of power supplies.
4. The multi-input power supply circuit according to claim 1, wherein,
in switching from one of said plurality of power supplies to another one of said plurality of power supplies, said control circuit performs, for a predetermined time period, switching operations of both one of said switching devices corresponding to the one of said plurality of power supplies and another one of said switching devices corresponding to the another one of said plurality of power supplies.
5. The multi-input power supply circuit according to claim 1, wherein
said plurality of power supplies include a battery and at least one of an alternating-current power supply and a direct-current power supply.
6. A power supply switching-method for switching power supplies of a multi-input power supply circuit that includes a plurality of power supplies, a transformer including windings corresponding to said plurality of power supplies, and switching devices for performing switching operations and transistors for preventing inverse currents, said switching devices and transistors being connected in series to said windings, respectively, said power supply switching-method comprising the step of:
switching from one of said plurality of power supplies to another one of said plurality of power supplies by turning on one of said transistors corresponding to the another one of said plurality of power supplies after stopping a switching operation of one of said switching devices corresponding to the one of said plurality of power supplies.
7. A power supply switching-method for switching power supplies of a multi-input power supply circuit that includes a plurality of power supplies, a transformer including windings corresponding to said plurality of power supplies, and switching devices for performing switching operations and transistors for preventing inverse currents, said switching devices and transistors being connected in series to said windings, respectively, said power supply switching-method comprising the step of:
switching from one of said plurality of power supplies to another one of said plurality of power supplies by starting a switching operation of one of said switching devices corresponding to the another one of said plurality of power supplies after turning off one of said transistors corresponding to the one of said plurality of power supplies.
8. A power supply switching-method for switching power supplies of a multi-input power supply circuit that includes a plurality of power supplies, a transformer including windings corresponding to said plurality of power supplies, and switching devices for performing switching operations and transistors for preventing inverse currents, said switching devices and transistors being connected in series to said windings, respectively, said power supply switching-method comprising the step of:
switching from one of said plurality of power supplies to another one of said plurality of power supplies by performing, for a predetermined time period, switching operations of both one of said switching devices corresponding to the one of said plurality of power supplies and another one of said switching devices corresponding to the another one of said plurality of power supplies.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. (canceled)
2. A computer-implemented method comprising:
using a computer processor for presenting to a buyer in a multi-unit auction a fixed-price purchase process for purchase of one or more units of an offering;
using the processor for selecting a threshold, the threshold other than the fixed-price; and
using the processor for removing said one or more units available for fixed-price purchase only if a current price after bid is more than said threshold and a number of units currently bid on is more than the total number of said one or more units.
3. The computer-implemented method of claim 2, wherein said threshold is in the range of 0 to 100 inclusive.
4. The computer-implemented method of claim 3, wherein said threshold is equal to 100, thereby maintaining the total number of said one or more units available for fixed-price purchase throughout the entirety of said auction.
5. The computer-implemented method of claim 3, wherein said threshold is equal to 0, thereby reducing the total number of said one or more units available for fixed-price purchase by the number of units bid for; and
comprising using the processor for removing said fixed-price purchase process from said auction when said number of units available for fixed-price purchase is less than or equal to zero.
6. The computer-implemented method of claim 2, comprising using the processor for displaying on a user interface the number of units available for fixed-price purchase.
7. The computer-implemented method of claim 2,
wherein said current price after bid is equal to or greater than said threshold as a percentage of said fixed-price;
and comprising using the processor for reducing said quantity available for fixed-price purchase on a one for one basis with said quantity of units bid on.
8. The computer-implemented method of claim 2, comprising using the processor for removing said fixed-price purchase process from said auction when the quantity of units bid on is greater than or equal to the number of units in said auction.
9. The computer-implemented method of claim 2, wherein said selection of said threshold permits the selection of a type of fixed-price process from a group consisting of a temporary fixed-price process, a semi-persistent fixed-price process, and a persistent fixed-price process.
10. A computer-readable medium comprising instructions that when executed by a processor execute a process comprising:
presenting to a buyer in a multi-unit auction a fixed-price purchase process for purchase of one or more units of an offering;
selecting a threshold, the threshold other than the fixed-price; and
removing said one or more units available for fixed-price purchase only if a current price after bid is more than said threshold and a number of units currently bid on is more than the total number of said one or more units.
11. The computer-readable medium of claim 10, wherein said threshold is in the range of 0 to 100 inclusive.
12. The computer-readable medium of claim 11, wherein said threshold is equal to 100, thereby maintaining the total number of said one or more units available for fixed-price purchase throughout the entirety of said auction.
13. The computer-readable medium of claim 11, wherein said threshold is equal to 0, thereby reducing the total number of said one or more units available for fixed-price purchase by the number of units bid for; and comprising instructions for removing said fixed-price purchase process from said auction when said number of units available for fixed-price purchase is less than or equal to zero.
14. The computer-readable medium of claim 10, comprising instructions for using the processor for displaying on a user interface the number of units available for fixed-price purchase.
15. The computer-readable medium of claim 10,
wherein said current price after bid is equal to or greater than said threshold as a percentage of said fixed-price;
and comprising instructions for reducing said quantity available for fixed-price purchase on a one for one basis with said quantity of units bid on.
16. The computer-readable medium of claim 10, comprising instructions for removing said fixed-price purchase process from said auction when the quantity of units bid on is greater than or equal to the number of units in said auction.
17. The computer-readable medium of claim 10, wherein said selection of said threshold permits the selection of a type of fixed-price process from a group consisting of a temporary fixed-price process, a semi-persistent fixed-price process, and a persistent fixed-price process.
18. A system comprising:
a computer processor operable for:
presenting to a buyer in a multi-unit auction a fixed-price purchase process for purchase of one or more units of an offering;
selecting a threshold, the threshold other than the fixed-price; and
removing said one or more units available for fixed-price purchase only if a current price after bid is more than said threshold and a number of units currently bid on is more than the total number of said one or more units.
19. The system of claim 18, wherein
said threshold is equal to 100, thereby maintaining the total number of said one or more units available for fixed-price purchase throughout the entirety of said auction; or
said threshold is equal to 0, thereby reducing the total number of said one or more units available for fixed-price purchase by the number of units bid for, wherein the computer processor is operable for removing said fixed-price purchase process from said auction when said number of units available for fixed-price purchase is less than or equal to zero.
20. The system of claim 18,
wherein said current price after bid is equal to or greater than said threshold as a percentage of said fixed-price;
and wherein the computer processor is operable for reducing said quantity available for fixed-price purchase on a one for one basis with said quantity of units bid on.
21. The system of claim 18, wherein said selection of said threshold permits the selection of a type of fixed-price process from a group consisting of a temporary fixed-price process, a semi-persistent fixed-price process, and a persistent fixed-price process.

1461113515-dcde6886-43c7-4db8-af8f-13b5cad190ee

1. A method of providing a sleep mode and a wake-up mode for a plurality of railway track circuit units, said method comprising:
adapting one of said track circuit units to communicate in a first direction to a first track circuit unit and in a different second direction to a different second track circuit unit;
employing a plurality of wireless messages between a train and a plurality of wayside units operatively associated with at least some of said track circuit units;
including with said wireless messages a first identifier of a corresponding one of said track circuit units and a second identifier of a direction of travel of said train;
receiving one of said wireless messages at one of said wayside units corresponding to said one of said track circuit units based upon said first identifier and responsively entering the wake-up mode from the sleep mode of said one of said track circuit units; and
responsively outputting based upon said second identifier from said one of said track circuit units a signal in the first direction to said first track circuit unit or in the different second direction to said different second track circuit unit.
2. The method of claim 1 further comprising:
employing a first track circuit in the first direction to said first track circuit unit and a second track circuit in the second direction to said second track circuit unit;
receiving another signal responsive to said outputting based upon said second identifier from said one of said track circuit units a signal;
broadcasting another one of said wireless messages from said one of said wayside units including said first identifier to identify said one of said track circuit units and a third identifier to indicate that said one of said first and second track circuits is clear; and
entering said sleep mode at said one of said track circuit units.
3. The method of claim 1 further comprising:
employing a first track circuit in the first direction to said first track circuit unit and a second track circuit in the second direction to said second track circuit unit;
receiving no response to said outputting based upon said second identifier from said one of said track circuit units a signal;
broadcasting another one of said wireless messages from said one of said wayside units including said first identifier to identify said one of said track circuit units and a third identifier to indicate that said one of said first and second track circuits is not clear; and
entering said sleep mode at said one of said track circuit units.
4. The method of claim 1 further comprising:
approaching said one of said wayside units with said train in said first direction;
sending said one of said wireless messages from said train including said second identifier for said first direction; and
receiving said one of said wireless messages at said one of said wayside units and responsively outputting from said one of said track circuit units said signal in only the first direction to only said first track circuit unit, in order to wake-up only said first track circuit unit.
5. The method of claim 1 further comprising:
based upon said second identifier, determining whether one of a first track circuit in the first direction to said first track circuit unit is clear or whether a second track circuit in the second direction to said second track circuit unit is clear; and
broadcasting another one of said wireless messages from said one of said wayside units including said first identifier to identify said one of said track circuit units and a third identifier to indicate whether said one of said first and second track circuits is clear.
6. The method of claim 1 further comprising:
employing as some of said wireless messages a plurality of first wireless messages from said train to another one of said wayside units; and
receiving one of said first wireless messages at said another one of said wayside units and responsively entering said wake-up mode of a corresponding one of said track circuit units.
7. The method of claim 6 further comprising:
periodically sending said first wireless messages from said train to said another one of said wayside units.
8. The method of claim 6 further comprising:
discontinuing to send said first wireless messages; and
determining that said first wireless messages have not been received at said another one of said wayside units for a predetermined time period and responsively entering said sleep mode of said corresponding one of said track circuit units.
9. The method of claim 1 further comprising:
employing as said train a first train;
employing said first train approaching said one of said track circuit units in a first direction;
employing as one of said wireless messages a first wireless message;
sending said first wireless message from said first train;
employing a second train approaching said one of said track circuit units in an opposite second direction;
sending a second wireless message from said second train; and
receiving at least one of said first and second wireless messages at said one of said wayside units corresponding to said one of said track circuit units and responsively entering the wake-up mode of said one of said track circuit units.
10. The method of claim 9 further comprising:
receiving said first wireless message, responsively determining that a first track circuit is clear and responsively sending a first track message on said first track circuit from said one of said track circuit units to said first train; and
receiving said second wireless message, responsively determining that a second track circuit is clear and responsively sending a second track message on said second track circuit from said one of said track circuit units to said second train.
11. The method of claim 1 further comprising
independent of a response to said signal, receiving an input indicating that said first track circuit is not clear;
broadcasting another one of said wireless messages from said one of said wayside units including said first identifier to identify said one of said track circuit units and a third identifier to indicate that said first track circuit is not clear, and
entering said sleep mode at said one of said track circuit units.
12. The method of claim 1 further comprising:
entering the sleep mode of said one of said track circuit units; and
receiving a wake-up request at said one of said wayside units and responsively entering the wake-up mode of said one of said track circuit units.
13. The method of claim 12 further comprising:
employing a track message as said wake-up request.
14. The method of claim 12 further comprising:
employing a wireless message as said wake-up request
15. The method of claim 12 further comprising:
after entering said wake-up mode, attempting communications on one of a first track circuit to said first track circuit unit or on a different second track circuit to said second track circuit unit.
16. The method of claim 15 further comprising:
determining that said attempted communications were successful with said first track circuit unit and responsively outputting a corresponding wireless message to said train.
17. The method of claim 15 further comprising:
determining that said attempted communications were not successful with said first track circuit unit and responsively outputting a corresponding wireless message to said train.
18. The method of claim 13 further comprising:
employing as said track message a request track message; and
receiving at said one of said wayside units a reply track message to said request track message and responsively entering said sleep mode of said one of said track circuit units.
19. The method of claim 13 further comprising:
employing as said track message a request track message; and
after sending said request track message, delaying for a predetermined time period and responsively determining that no reply track message to said request track message was received.
20. The method of claim 1 further comprising:
receiving a test signal at another one of said wayside units and responsively entering said wake-up mode of a corresponding one of said track circuit units;
initiating a test and debug mode of said corresponding one of said track circuit units; and
delaying for a predetermined time period and responsively entering said sleep mode of said corresponding one of said track circuit units.
21. The method of claim 1 further comprising:
employing said one of said track circuit units intermediate two different track circuits.
22. The method of claim 21 further comprising:
employing two of said track circuit units as end units; and
employing each of said end units adjacent one corresponding track circuit.
23. The method of claim 1 further comprising:
entering the wake-up mode from the sleep mode of only one of said first and second track circuit units responsive to said signal.
24. A railway system for a train including a wireless transmitter, said railway system comprising:
a plurality of railway track circuit units, one of said track circuit units being adapted to communicate in a first direction to a first one of said track circuit units and in a different second direction to a different second one of said track circuit units, each of said track circuit units including a power supply having a control input; and
a plurality of wayside units operatively associated with said track circuit units, each of said wayside units including a control circuit, a wireless receiver and a wireless transmitter, said wireless receiver being adapted to receive a plurality of wireless messages from the wireless transmitter of said train, each of said wireless messages including a first identifier of a corresponding one of said track circuit units and a second identifier of a direction of travel of said train, said control circuit being adapted to respond to receipt of one of said wireless messages and set the control input of a corresponding one of said track circuit units, in order to enable the power supply thereof and enter a wake-up mode thereof,
wherein one of said wayside units is adapted to receive one of said wireless messages corresponding to one of said track circuit units based upon said first identifier and to responsively enable output based upon said second identifier from said one of said track circuit units a signal in the first direction to said first track circuit unit or in the different second direction to said different second track circuit unit.
25. The railway system of claim 24 wherein said control unit of one of said first one and said different second one of said track circuit units, responsive to said signal, sets the control input of a corresponding one of said track circuit units to enable the power supply and enter a wake-up mode thereof.
26. The railway system of claim 24 wherein a first track circuit extends in the first direction from said one of said track circuit units to said first track circuit unit and a second track circuit extends in the second direction from said one of said track circuit units to said second track circuit unit; wherein said one of said track circuit units is adapted to receive another signal responsive to said signal; wherein said one of said wayside units is adapted to broadcast another one of said wireless messages including said first identifier to identify said one of said track circuit units and a third identifier to indicate that said one of said first and second track circuits is clear, and wherein said control circuit is adapted to reset the control input of the corresponding one of said track circuit units, in order to disable the power supply thereof and enter a sleep mode thereof.
27. The railway system of claim 24 wherein a first track circuit extends in the first direction from said one of said track circuit units to said first track circuit unit and a second track circuit extends in the second direction from said one of said track circuit units to said second track circuit unit; wherein said one of said track circuit units is adapted to detect no response to said signal; wherein said one of said wayside units is adapted to broadcast another one of said wireless messages including said first identifier to identify said one of said track circuit units and a third identifier to indicate that said one of said first and second track circuits is not clear, and wherein said control circuit is adapted to reset the control input of the corresponding one of said track circuit units, in order to disable the power supply thereof and enter a sleep mode thereof.
28. The railway system of claim 24 wherein some of said wireless messages include a plurality of first wireless messages from said train to another one of said wayside units; and wherein said another one of said wayside units is adapted to receive one of said first wireless messages and responsively set the control input of a corresponding one of said track circuit units, in order to enable the power supply thereof and enter a wake-up mode thereof.
29. The railway system of claim 24 wherein one of said wayside units is adapted to receive a wake-up request and responsively set the control input of a corresponding one of said track circuit units, in order to enable the power supply thereof and enter a wake-up mode thereof.
30. The railway system of claim 29 wherein said wake-up request is a track message.
31. The railway system of claim 29 wherein said wake-up request is one of said wireless messages.
32. The railway system of claim 29 wherein some of said wireless messages include a plurality of first wireless messages from said train to another one of said wayside units; and wherein said another one of said wayside units is adapted to receive one of said first wireless messages and responsively set the control input of a corresponding one of said track circuit units, in order to enable the power supply thereof and enter the wake-up mode thereof.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

What is claimed is:

1. A frequency synthesizer comprising:
a voltage controlled oscillator for generating an output signal having a synthesized frequency; and
a prescaler connected to the VCO for receiving the output signal and providing a feedback signal; wherein:
the prescaler programmatically selects between an integer divider value and a fractional divider value to divide the synthesized frequency of the output signal.
2. A frequency synthesizer as recited in claim 1 wherein the prescaler corrects an error introduced by the fractional divider.
3. A frequency synthesizer as recited in claim 1 wherein the prescaler corrects an error introduced by the fractional divider by adjusting an output clock period.
4. A frequency synthesizer as recited in claim 1 wherein the prescaler corrects an error introduced by the fractional divider by extending an output clock period.
5. A frequency synthesizer as recited in claim 1 wherein integer divider value is a first integer divider value; and the prescaler corrects an error introduced by the fractional divider by programmatically selects between a second integer divider value and a third integer divider value.
6. A frequency synthesizer as recited in claim 1 wherein the prescaler includes a first counter having a first counter output and a second counter having a second counter output.
7. A frequency synthesizer as recited in claim 1 wherein the prescaler includes a first counter having a first counter output and a second counter having a second counter output; and the prescaler programmatically selects between the integer divider value and the fractional divider value based the first counter output and the second counter output.
8. A frequency synthesizer as recited in claim 1 wherein the prescaler includes a first counter having a first counter output and a second counter having a second counter output; and the prescaler corrects an error introduced by the fractional divider using the first counter output and the second counter output.
9. A frequency synthesizer as recited in claim 1 wherein the prescaler divides the synthesized frequency to produce a clock signal.
10. A frequency synthesizer as recited in claim 1 wherein the prescaler divides the synthesized frequency to produce a clock signal; and the prescaler corrects an error introduced by the fractional divider value by extending a period of the clock signal.
11. A frequency synthesizer as recited in claim 1 wherein:
the output frequency corresponds to a frequency channel within a frequency band;
the frequency band is determined by number of times the integer divider value is selected; and
the frequency channel is determined by number of times the fractional divider value is selected.
12. A frequency synthesizer as recited in claim 1 wherein the frequency synthesizer is included in a wireless transceiver device supporting IEEE 802.11a protocol.
13. A frequency synthesizer as recited in claim 1 wherein the frequency synthesizer is included in a wireless transceiver device supporting IEEE 802.11b protocol.
14. A prescaler comprising:
an input interface for receiving an input signal with a frequency;
a first divider configured to divide the input signal;
wherein:
the first divider programmatically selects between an integer divider value and a fractional divider value to divide the input signal.
15. A prescaler as recited in claim 14 further comprising a second divider; wherein:
the first divider outputs a clock signal;
the second divider is configured to correct the clock signal.
16. A prescaler as recited in claim 14 wherein the prescaler is used for generating a feedback signal in a frequency synthesizer.
17. A method for synthesizing an output signal having a synthesized frequency including:
receiving a voltage controlled oscillator output;
dividing frequency of the voltage controlled oscillator output by programmatically selecting between an integer divider value and a fractional divider value; and
producing a feedback signal for controlling frequency of the output signal.