Author: claimsbot

1. A user adaptive interface providing system comprising:
a camera configured to acquire an image of a user using a display;
an analyzer configured to analyze a physical use environment or use pattern of the user using the display on a basis of the image; and
an interface provider configured to select and provide an interface to be displayed by the display on a basis of the physical use environment or the use pattern.
2. The user adaptive interface providing system of claim 1, wherein the analyzer analyzes, from the image, a distance between the display and the user and a relative position of the user to the display.
3. The user adaptive interface providing system of claim 1, wherein the analyzer analyzes, from the image, a moving direction of the user based on a movement of the user and a relative position change of the user to the display.
4. The user adaptive interface providing system of claim 1, wherein the interface provider selects a size of the interface on a basis of a size of the display, and provides the interface having the selected size.
5. The user adaptive interface providing system of claim 1, wherein the interface provider selects a position of the interface on a basis of a relative position of the user to the display, and provides the interface to the selected position.
6. The user adaptive interface providing system of claim 1, wherein the interface provider changes a position of the interface displayed by the display according to a movement of the user.
7. The user adaptive interface providing system of claim 1, wherein the interface provider selects a kind of the interface according to the use pattern of the user, and provides the selected kind of interface.
8. The user adaptive interface providing system of claim 1, wherein the camera is built or equipped in the display.
9. A user adaptive interface providing method comprising:
acquiring an image of a user using a display;
analyzing, from the image, a physical use environment or use pattern of the user using the display; and
selecting and providing an interface to be displayed by the display on a basis of at least one of the physical use environment and the use pattern.
10. The user adaptive interface providing method of claim 9, wherein the acquiring of an image comprises acquiring the image of the user by using a camera built or equipped in the display.
11. The user adaptive interface providing method of claim 9, wherein the analyzing of a physical use environment comprises analyzing, from the image, at least one of a distance between the display and the user and a relative position of the user to the display.
12. The user adaptive interface providing method of claim 9, wherein the analyzing of a physical use environment comprises analyzing, from the image, a relative position change of the user to the display.
13. The user adaptive interface providing method of claim 9, wherein the selecting and providing of an interface comprises selecting a size of the interface on a basis of a size of the display to provide the interface having the selected size.
14. The user adaptive interface providing method of claim 9, wherein the selecting and providing of an interface comprises selecting a position of the interface on a basis of a relative position of the user to the display to provide the interface to the selected position.
15. The user adaptive interface providing method of claim 9, wherein the selecting and providing of an interface comprises selecting a kind of the interface on a basis of the use pattern of the user acquired from the image to provide the selected kind of interface.
16. The user adaptive interface providing method of claim 9, wherein the selecting and providing of an interface comprises continuously changing a position of the interface according to a movement of the user.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An operational amplifier comprising:
an input stage circuit comprising a first differential pair and a second differential pair which are complementary to each other;
a first current mirror circuit connected with said first differential pair and configured to function as an active load;
a second current mirror circuit connected with said second differential pair and configured to function as an active load;
an output stage circuit having a pair of output transistors connected in series between a higher power supply and a lower power supply;
an operation point setting circuit configured to set an operation point of said output transistors; and
a floating constant current source connected to a first connection node between an input terminal of said first current mirror circuit and said first differential pair, and a second connection node between an input terminal of said second current mirror circuit and said second differential pair, and configured to supply a constant current,
wherein said first current mirror circuit and said second current mirror circuit superimpose an output of said input stage circuit on a current corresponding to the constant current by said floating constant current source to supply to said operation point setting circuit.
2. The operational amplifier according to claim 1, wherein said operation point setting circuit comprises:
a pair of complementary transistors; and
a bias setting circuit configured to set a bias to each of said complementary transistors of said pair,
wherein a current flowing out from said first current mirror circuit flows into said second current mirror circuit through said pair of complementary transistors, and
wherein operating points of said output transistors are set based on a gate-source voltage in said complementary transistors through said current flowing out from said first current mirror.
3. The operational amplifier according to claim 1,
wherein said first differential pair comprises a first N-channel MOS transistor and a second N-channel MOS transistor, whose sources are connected to each other in common,
wherein a gate of said first N-channel MOS transistor and a gate of said second N-channel MOS transistor are connected with differential input terminals, respectively,
wherein a drain of said first N-channel MOS transistor is connected with an input terminal of said first current mirror circuit, and a drain of said second N-channel MOS transistor is connected with an output terminal of said first current mirror circuit,
wherein said second differential pair comprises a first P-channel MOS transistor and a second P-channel MOS transistor whose sources are connected with in common,
wherein a gate of said first P-channel MOS transistor of and a gate of said second P-channel MOS transistor are connected with said differential input terminals, respectively,
wherein a drain of said first P-channel MOS transistor is connected with an input terminal of said second current mirror circuit, and
wherein a drain of said second P-channel MOS transistor is connected with an output terminal of said second current mirror circuit.
4. The operational amplifier according to claim 1, wherein said floating constant current source comprises:
a P-channel MOS transistor;
an N-channel MOS transistor;
a first constant voltage source configured to give a bias to a gate of said P-channel MOS transistor; and
a second constant voltage source configured to give a bias to a gate of said N-channel MOS transistor,
wherein a source of said P-channel MOS transistor and a drain of said N-channel MOS transistor are connected to form one of terminals of said floating constant current source, and
wherein a drain of said P-channel MOS transistor and a source of said N-channel MOS transistor are connected to form the other terminal of said floating constant current source.
5. The operational amplifier according to claim 4, wherein said first constant voltage source comprises two P-channel MOS transistors connected in series, and
wherein said second constant voltage source comprises two N-channel MOS transistors connected in series.
6. The operational amplifier according to claim 4, wherein said first constant voltage source comprises:
a third P-channel MOS transistor;
a fourth P-channel MOS transistor; and
a first constant current source, which are connected between higher and lower power supply lines in series,
wherein said second constant voltage source comprises:
a third N-channel MOS transistor;
a fourth N-channel MOS transistor; and
a second constant current source, which are connected between the higher and lower power supply lines in series,

wherein a source of said fourth P-channel MOS transistor is connected with a node to which a gate and a drain of said third P-channel MOS transistor are connected, and one of terminals of said first constant current source is connected with a node to which a gate and a drain of said fourth P-channel MOS transistor are connected, and
wherein a source of said fourth N-channel MOS transistor is connected with a node to which a gate and a drain of said third N-channel MOS transistor are connected, and one of terminals of said second constant current source is connected with a node to which a gate and a drain of said fourth N-channel MOS transistor are connected.
7. The operational amplifier according to claim 1, wherein said floating constant current source comprises:
fifth and sixth P-channel MOS transistors whose gates are connected with each other;
fifth and sixth N-channel MOS transistors whose gates are connected with each other;
a third constant voltage source; and
a third constant current source,
wherein said third constant voltage source, said sixth P-channel MOS transistor, said sixth N-channel MOS transistor and said third constant current source are connected between the higher and lower power supply lines in series,
wherein a drain and a gate of said sixth P-channel MOS transistor are connected with each other, and
wherein a drain and a gate of said sixth N-channel MOS transistor are connected with each other.
8. An operational amplifier comprising:
an N-channel differential transistor pair connected with input terminals;
a P-channel differential transistor pair connected with the input terminals;
a first current mirror circuit provided between a higher power supply line and said N-channel differential transistor pair to have input and output terminals connected with differential outputs of said N-channel differential transistor pair;
a second current mirror circuit provided between a lower power supply line and said P-channel differential transistor pair to have input and output terminals connected with differential outputs of said P-channel differential transistor pair;
a floating constant current source having one terminal connected with the input terminal of said first current mirror circuit and the other terminal connected with the input terminal of said second current mirror circuit;
a P-channel MOS transistor having a source connected with the output terminal of said first current mirror circuit, a gate connected with a first constant voltage source, and a drain connected with the output terminal of said second current mirror circuit;
an N-channel MOS transistor having a source connected with the output terminal of said second current mirror circuit, a gate connected with a second constant voltage source and a drain connected with the output terminal of said first current mirror circuit;
an output stage P-channel MOS transistor connected between an external output terminal and the higher power supply line and having a gate connected with the output terminal of said first current mirror circuit; and
an output stage N-channel MOS transistor connected between the external output terminal and the lower power supply line and having a gate connected with the output terminal of said second current mirror circuit.
9. The operational amplifier according to claim 8, wherein said floating constant current source comprises:
a first constant voltage source connected with the higher power supply line;
a second constant voltage source connected with the lower power supply line;
a P-channel MOS transistor having a source connected with the input terminal of said first current mirror circuit, a gate connected with said first constant voltage source, a drain connected with the input terminal of said second current mirror circuit; and
an N-channel MOS transistor having a gate connected with said second constant voltage source, a source connected with the input terminal of said second current mirror circuit and a drain connected with the input terminal of said first current mirror circuit.
10. The operational amplifier according to claim 8, wherein said floating constant current source comprises:
a first N-channel MOS transistor having a gate and a drain connected with in common;
a first P-channel MOS transistor having a source connected with a source of said first N-channel MOS transistor and a gate and a drain connected with in common;
a second N-channel MOS transistor having a gate connected with the gate of said first N-channel MOS transistor and a drain connected with the input terminal of said first current mirror circuit;
a second P-channel MOS transistor having a gate connected with the gate of said first P-channel MOS transistor, a drain connected with the input terminal of said second current mirror circuit and a source connected with the source of said second N-channel MOS transistor;
a constant current source connected between the higher power supply line and the gate and drain of said first N-channel MOS transistor; and
a constant voltage source connected with the gate and drain of said first P-channel MOS transistor.
11. The operational amplifier according to claim 1, wherein said operational amplifier further comprises a plurality of constant voltage sources.
12. An operational amplifier comprising:
an input stage circuit comprising a first differential pair and a second differential pair which are complementary to each other;
a first current mirror circuit connected with said first differential pair and configured to function as an active load;
a second current mirror circuit connected with said second differential pair and configured to function as an active load;
an output stage circuit having a pair of output transistors connected in series between a higher power supply and a lower power supply;
an operation point setting circuit configured to set an operation point of said output transistors;
a floating constant current source connected between an input terminal of said first current mirror circuit and an input terminal of said second current mirror circuit, and configured to supply a constant current; and
a plurality of constant voltage sources.
13. The operational amplifier according to claim 12, wherein the floating constant current source comprises:
a P-channel MOS transistor;
an N-channel MOS transistor;
a first constant voltage source configured to give a bias to a gate of the P-channel MOS transistor; and
a second constant voltage source configured to give a bias to a gate of the N-channel MOS transistor.
14. The operational amplifier according to claim 13,
wherein a source of the P-channel MOS transistor and a drain of the N-channel MOS transistor are connected to form a first terminal of the floating constant current source, and
wherein a drain of the P-channel MOS transistor and a source of the N-channel MOS transistor are connected to form a second terminal of the floating constant current source.
15. The operational amplifier according to claim 13, wherein the plurality of constant voltage sources comprises:
a first constant voltage source having two P-channel MOS transistors connected in series; and
a second constant voltage source having two N-channel MOS transistors connected in series.
16. The operational amplifier according to claim 15, wherein the first constant voltage source comprises:
a third P-channel MOS transistor;
a fourth P-channel MOS transistor; and
a first constant current source,
wherein the third P-channel MOS transistor, the fourth P-channel MOS transistor, and the first constant current source are connected between the higher and the lower power supply lines in series.
17. The operational amplifier according to claim 16, wherein the second constant voltage source comprises:
a third N-channel MOS transistor;
a fourth N-channel MOS transistor; and
a second constant current source,
wherein the third N-channel MOS transistor, the fourth N-channel MOS transistor, and the second constant current source are connected between the higher and lower power supply lines in series.
18. The operational amplifier according to claim 17,
wherein a source of the fourth P-channel MOS transistor is connected with a node to which a gate and a drain of the third P-channel MOS transistor are connected,
wherein one of terminals of the first constant current source is connected with a node to which a gate and a drain of the fourth P-channel MOS transistor are connected,
wherein a source of the fourth N-channel MOS transistor is connected with a node to which a gate and a drain of the third N-channel MOS transistor is connected, and
wherein one of terminals of the second constant current source is connected with a node to which a gate and a drain of the fourth N-channel MOS transistor is connected.
19. The operational amplifier according to claim 12, wherein the floating constant current source comprises:
a fifth and a sixth P-channel MOS transistors;
a fifth and a sixth N-channel MOS transistors;
a third constant voltage source; and
a third constant current source.
20. The operational amplifier according to claim 19, wherein the third constant voltage source, the sixth P-channel MOS transistor, the sixth N-channel MOS transistor, and the third constant current source are connected between the higher and lower power supply lines in series.

1. A sense amplifier comprising:
a pre-charge sub-circuit configured to provide a pre-charge voltage to a sense enable sub-circuit, wherein said pre-charge voltage is a voltage between zero volts and the voltage of a positive power supply node;
said sense enable sub-circuit configured to sense a voltage difference between a pair of bit lines to which the sense enable sub-circuit is coupled, to adjust the received pre-charge voltage based on said voltage difference between the pair of bit lines, and to output the adjusted voltage to a sense output sub-circuit; and
said sense output sub-circuit configured to receive the adjusted voltage via a coupling capacitor and to invert and to amplify said adjusted voltage.
2. The sense amplifier of claim 1 wherein said pre-charge sub-circuit comprises an inverter disposed in parallel with a switch, with both inverter and switch connected to a common node linking said pre-charge sub-circuit with said sense enable sub-circuit and said sense output sub-circuit.
3. The sense amplifier of claim 1 wherein said pre-charge sub-circuit comprises a transistor whose drain and gate is connected to the positive power supply node and whose source is connected to a switch, said switch further connected to a common node coupling said pre-charge sub-circuit to said sense enable sub-circuit and to said sense output sub-circuit.
4. The sense amplifier of claim 3 wherein said transistor is a NMOS-type transistor.
5. The sense amplifier of claim 1 wherein said pre-charge sub-circuit comprises a transistor, an inverter, and a switch, configured such that the transistor drain is connected to the positive power supply node, the transistor source is connected to the input of said inverter and said switch, and the transistor gate is connected to the output of said inverter; the output of said switch is further connected to a common node coupling said pre-charge sub-circuit to said sense enable sub-circuit and to said sense output sub-circuit.
6. The sense amplifier of claim 5 wherein said transistor is a NMOS-type transistor.
7. The sense amplifier of claim 1 wherein said sense enable sub-circuit comprises a first transistor of a first type, and a first transistor of a second type, the first transistor of the first type configured such that its source is connected to the positive power supply node, its gate is connected to an inverse sense enable line, and its drain is connected to a common node coupling said sense enable sub-circuit to said pre-charge sub-circuit and to said sense output sub-circuit; the first transistor of the second type configured such that its drain is connected to said common node, its gate is connected to a sense enable line, and its source is coupled to ground.
8. The sense amplifier of claim 1 wherein said sense output sub-circuit comprises an inverter, a switch, and the coupling capacitor, configured such that the coupling capacitor is disposed in series between said sense enable sub-circuit and said inverter, and said inverter is disposed in parallel with said switch.
9. A sense amplifier comprising:
a pre-charge sub-circuit for providing a pre-charge voltage to a sense enable sub-circuit, wherein said pre-charge voltage is a voltage between zero volts and the voltage of a positive power supply node;
said sense enable sub-circuit for reading bit lines values, adjusting the received pre-charge voltage based on said bit line values, and sending the adjusted voltage to a sense output sub-circuit;
said sense output sub-circuit for inverting and amplifying said adjusted voltage; and
a capacitor providing capacitive coupling between said sense enable sub-circuit and said sense output sub-circuit.
10. The sense amplifier of claim 9 wherein said pre-charge sub-circuit comprises an inverter disposed in parallel with a switch, with both inverter and switch connected to a common node linking said pre-charge sub-circuit with said sense enable sub-circuit and said sense output sub-circuit.
11. The sense amplifier of claim 9 wherein said pre-charge sub-circuit comprises a transistor whose drain and gate is connected to the positive power supply node and whose source is connected to a switch, said switch further connected to a common node coupling said pre-charge sub-circuit to said sense enable sub-circuit and to said sense output sub-circuit.
12. The sense amplifier of claim 11 wherein said transistor is a NMOS-type transistor.
13. The sense amplifier of claim 9 wherein said pre-charge sub-circuit comprises a transistor, an inverter, and a switch, configured such that the transistor drain is connected to the positive power supply node, the transistor source is connected to the input of said inverter and said switch, and the transistor gate is connected to the output of said inverter; the output of said switch is further connected to a common node coupling said pre-charge sub-circuit to said sense enable sub-circuit and to said sense output sub-circuit.
14. The sense amplifier of claim 13 wherein said transistor is a NMOS-type transistor.
15. The sense amplifier of claim 9 wherein said sense enable sub-circuit comprises a first transistor of a first type, a first transistor of a second type, and a capacitor, the first transistor of the first type configured such that its source is connected to the positive power supply node, its gate is connected to an inverse sense enable line, and its drain is connected to a common node coupling said sense enable sub-circuit to said pre-charge sub-circuit and to said sense output sub-circuit; the first transistor of the second type configured such that its drain is connected to said common node, its gate is connected to a sense enable line, and its source is coupled to ground; and said capacitor is disposed in parallel with said first transistor of the second type.
16. The sense amplifier of claim 9 wherein said sense output sub-circuit comprises an inverter, a switch, the coupling capacitor, and second and third capacitors, configured such that the coupling capacitor is disposed in series between said sense enable sub-circuit and said inverter, said inverter is disposed in parallel with said switch, and the second and third capacitor are connected to the input and output of the inverter, respectively.
17. A method comprising:
providing a pre-charge voltage from a pre-charge sub-circuit to a sense enable sub-circuit, wherein said pre-charge voltage is a voltage between zero volts and the voltage of a positive power supply node;
raising or lowering the received pre-charge voltage at said sense enable sub-circuit based on bit line values sensed at said sense enable sub-circuit;
providing the adjusted voltage to a sense output sub-circuit; and
inverting and amplifying said adjusted voltage at said sense output sub-circuit.
18. The method of claim 17 where the inverted and amplified voltage of said sense output sub-circuit is buffered and provided to the output bus.
19. A sense amplifier comprising:
a pre-charge sub-circuit configured to provide a pre-charge voltage to a sense enable sub-circuit, wherein said pre-charge sub-circuit comprises an inverter disposed in parallel with a switch, with both inverter and switch connected to a common node linking said pre-charge sub-circuit with said sense enable sub-circuit and said sense output sub-circuit;
said sense enable sub-circuit configured to sense a voltage difference between a pair of bit lines to which the sense enable sub-circuit is coupled, to adjust the received pre-charge voltage based on said voltage difference between the pair of bit lines, and to output the adjusted voltage to a sense output sub-circuit; and
said sense output sub-circuit configured to receive the adjusted voltage via a coupling capacitor and to invert and to amplify said adjusted voltage.
20. A sense amplifier comprising:
a pre-charge sub-circuit configured to provide a pre-charge voltage to a sense enable sub-circuit;
said sense enable sub-circuit configured to sense a voltage difference between a pair of bit lines to which the sense enable sub-circuit is coupled, to adjust the received pre-charge voltage based on said voltage difference between the pair of bit lines, and to output the adjusted voltage to a sense output sub-circuit, wherein said sense enable sub-circuit comprises a first transistor of a first type, and a first transistor of a second type, the first transistor of the first type configured such that its source is connected to a positive power supply node, its gate is connected to an inverse sense enable line, and its drain is connected to a common node coupling said sense enable sub-circuit to said pre-charge sub-circuit and to said sense output sub-circuit;
the first transistor of the second type configured such that its drain is connected to said common node, its gate is connected to a sense enable line, and its source is coupled to ground; and
said sense output sub-circuit configured to receive the adjusted voltage via a coupling capacitor and to invert and to amplify said adjusted voltage.
21. A sense amplifier comprising:
a pre-charge sub-circuit configured to provide a pre-charge voltage to a sense enable sub-circuit;
said sense enable sub-circuit configured to sense a voltage difference between a pair of bit lines to which the sense enable sub-circuit is coupled, to adjust the received pre-charge voltage based on said voltage difference between the pair of bit lines, and to output the adjusted voltage to a sense output sub-circuit; and
said sense output sub-circuit configured to receive the adjusted voltage via a coupling capacitor and to invert and to amplify said adjusted voltage, wherein said sense output sub-circuit comprises an inverter, a switch, and the coupling capacitor, configured such that the coupling capacitor is disposed in series between said sense enable sub-circuit and said inverter, and said inverter is disposed in parallel with said switch.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A knockdown pump containment assembly adapted for communication with a stator having a rotor disposed therein, the pump containment assembly comprising:
a pump housing defining a containment chamber for receiving, containing and directing the flow of a liquid material, the pump housing having an inlet port disposed for directing a flow of liquid material into the containment chamber, and an exit port for directing a flow of liquid material out of the containment chamber, into a stator, wherein the containment chamber of the pump housing is adapted to receive a drive shaft assembly therein;
a pump housing base for releasably receiving and supporting the pump housing;
a pump housing retainer releasably engagable with the pump housing base to releasably secure the pump housing to the pump housing base; and
the pump housing base further comprising a coupling seat, and a base frame that extends outward from the coupling seat, to a retainer mounting portion thereof that receives and releasably fixes the pump housing retainer to the pump housing base so that the pump housing is releasably secured to the pump housing base between the coupling seat and the pump housing retainer.
2. A pump containment assembly as recited in claim 1 further comprising means for fixing the alignment of the pump housing within the pump housing base.
3. A pump containment assembly as recited in claim 1 wherein the base frame defines a receiving slot extending along the base frame between the coupling seat and the retainer mounting portion for receiving the pump housing, and
wherein the pump housing is formed to mate within the receiving slot of the base frame so that the pump housing alignment with the pump housing base is fixed, and relative rotational movement is restricted.
4. A pump containment assembly as recited in claim 3 wherein the pump housing retainer is formed to mate within the receiving slot of the base frame so that the alignment of the pump housing retainer with the pump housing base, and the pump housing is fixed.
5. A pump containment assembly as recited in claim 4 wherein the receiving slot of the base frame is defined by a circular bottom portion disposed between a first step and a second step that extends along the base frame between the coupling seat and the retainer mounting portion.
6. A pump containment assembly as recited in claim 5 wherein the pump housing is formed to define a circular housing portion disposed between a first lip and a second lip, wherein the first lip is disposed for sliding engagement with the first step of the base frame, and the second lip is disposed for sliding engagement with the second step of the base frame, wherein relative rotational movement between the pump housing and the pump housing base is restricted so that their relative alignment is fixed.
7. A pump containment assembly as recited in claim 5 wherein the pump housing retainer is formed to define spaced apart retainer lips disposed to respectively engage the first and second steps of the base frame to restrict relative rotational movement between the pump housing retainer and the pump housing base so that their relative alignment is fixed.
8. A pump containment assembly as recited in claim 1 wherein the pump housing base is adapted to engage a drive mechanism that delivers a rotational driving force to a drive shaft assembly disposed within the containment chamber between a stator and the pump housing base.
9. A pump containment assembly as recited in claim 1 wherein wherein the pump housing further comprises a drive shaft aperture adapted to receive a drive shaft assembly therethrough.
10. A pump containment assembly as recited in claim 1 wherein the pump housing retainer comprises a threaded bore for threadedly engaging a stator.
11. A pump containment assembly as recited in claim 1 wherein at least one lever cam loc is disposed on the retainer mounting portion for engagement with the pump housing retainer to releasably fix the pump housing retainer to the pump housing base so that the pump housing is releasably secured to the pump housing base between the coupling seat and the pump housing retainer.
12. A method for making knockdown pump containment assembly adapted for communication with a stator having a rotor disposed therein, the method comprising the steps:
forming a pump housing that defines a containment chamber for receiving, containing and directing the flow of a liquid material, the pump housing having an inlet port disposed for directing a flow of liquid material into the containment chamber, and an exit port for directing a flow of liquid material out of the containment chamber, into a stator, wherein the containment chamber of the pump housing is adapted to receive a drive shaft assembly therein;
providing a pump housing base for releasably receiving and supporting the pump housing;
providing a pump housing retainer releasably engagable with the pump housing base to releasably secure the pump housing to the pump housing base; and
wherein the step of providing a pump housing base further comprises the steps of forming a coupling seat, and a base frame that extends outward from the coupling seat to a retainer mounting portion formed to receive and releasably fix the pump housing retainer to the pump housing base so that the pump housing is releasably secured to the pump housing base between the coupling seat and the pump housing retainer.
13. A method of making a pump containment assembly as recited in claim 1 further comprising the step of providing means for fixing the alignment of the pump housing within the pump housing base.
14. A method of making a pump containment assembly as recited in claim 13 wherein the step of forming a base frame further comprises the step of forming a receiving slot extending along the base frame between the coupling seat and the retainer mounting portion for receiving the pump housing, and
wherein the pump housing is formed to mate within the receiving slot of the base frame so that the pump housing alignment with the pump housing base is fixed, and relative rotational movement is restricted.
15. A method of making a pump containment assembly as recited in claim 14 wherein the pump housing retainer is formed to mate within the receiving slot of the base frame so that the alignment of the pump housing retainer with the pump housing base, and the pump housing is fixed.
16. A knockdown pump containment assembly adapted for communication with a stator having a rotor disposed therein, the pump containment assembly comprising:
a pump housing defining a containment chamber for receiving, containing and directing the flow of a liquid material, the pump housing having an inlet port disposed for directing a flow of liquid material into the containment chamber, and an exit port for directing a flow of liquid material out of the containment chamber, into a stator, wherein the containment chamber of the pump housing is adapted to receive a drive shaft assembly therein;
a pump housing base for releasably receiving and supporting the pump housing;
a pump housing retainer releasably engagable with the pump housing base to releasably secure the pump housing to the pump housing base;
the pump housing base further comprising a coupling seat, and a base frame that extends outward from the coupling seat, to a retainer mounting portion thereof that receives and releasably fixes the pump housing retainer to the pump housing base so that the pump housing is releasably secured to the pump housing base between the coupling seat and the pump housing retainer;
means for fixing the alignment of the pump housing within the pump housing base; and
wherein the pump housing further comprises a drive shaft aperture adapted to receive a drive shaft assembly therethrough.
17. A pump containment assembly as recited in claim 16 wherein the pump housing retainer comprises a threaded bore for threadedly engaging a stator.
18. A pump containment assembly as recited in claim 16 wherein a lever cam loc disposed on the retainer mounting portion engages the pump housing retainer to releasably fixe the pump housing retainer to the pump housing base so that the pump housing is releasably secured to the pump housing base between the coupling seat and the pump housing retainer.
19. A pump containment assembly as recited in claim 18 wherein the drive shaft aperture forms a seal with the coupling seat of the pump housing base.
20. A pump containment assembly as recited in claim 16 wherein the inlet port of the containment chamber defines a threaded bore for threadedly engaging a liquid supply hopper.
21. A pump containment assembly as recited in claim 16 wherein the pump housing retainer includes a retainer lug for engagement with a stator to prevent rotation of the stator in relation to the pump housing retainer.
inlet port of the containment chamber defines a threaded bore for threadedly engaging a liquid supply hopper.