Author: claimsbot

1. A method of performing face recognition, which method comprises the steps of
generating an average face model (MAV)\u2014comprising a matrix of states representing regions of the face\u2014from a number of distinct face images (I1, I2, . . . Ij);
training a reference face model (M1, M2, . . . , Mn) for each one of a number of known faces, where the reference face model (M1, M2, . . . , Mn) is based on the average face model (MAV);
acquiring a test image (IT) for a face to be identified;
calculating a best path through the average face model (MAV) based on the test image (IT);
evaluating a degree of similarity for each reference face model (M1, M2, . . . , Mn) against the test image (IT) by applying the best path of the average face model (MAV) to each reference face model (M1, M2, . . . . , Mn);
identifying the reference face model (M1, M2, . . . . , Mn) most similar to the test image (IT);
accepting or rejecting the identified reference face model (M1, M2, . . . , Mn) on the basis of the degree of similarity.
2. A method according to claim 1, wherein the best path through the average face model (MAV) is optimised with respect to a reference face model (M1, M2, . . . , Mn) for evaluation of the degree of similarity for that reference face model (M1, M2, . . . , Mn) against the test image (IT).
3. A method according to claim 1, wherein the step of evaluating a degree of similarity between a reference face model (M1, M2, . . . , Mn) and a test image (IT) comprises applying the best path of the average face model (MAV) to the reference face model (M1, M2, . . . , Mn) to calculate a reference face model score for that test image (IT), calculating the average face model score for that test image (IT), and obtaining the degree of similarity in the form of the ratio of the reference face model score to the average face model score and wherein the step of accepting or rejecting the identified reference face model (M1, M2, . . . , Mn) comprises comparing the degree of similarity to a predefined similarity threshold value.
4. A method according to claim 3, wherein a unique similarity threshold value is used for each reference face model (M1, M2, . . . , Mn) in making the decision to accept or reject the identified reference model (M1, M2, . . . , Mn).
5. A method of training a reference face model (M1) for use in a face recognition system, comprising the steps of
acquiring an average face model (MAV) based on a number of face images (I1, I2, . . . Ij) of different faces;
acquiring a number of test image (T1, T2, . . . , Tm) of the face for which the reference face model (M1) is to be trained;
applying a training algorithm to the average face model and information obtained from the test images (T1, T2, . . . , Tm) to give the reference face model (M1).
6. A method according to claim 5, wherein the reference face model (M1) is improved by applying the training algorithm to the average face model (MAV), information obtained from a further test image (Tnew) of the same face and a copy of the reference model (M1\u2032) to give an improved reference model (M1).
7. A method of calculating a similarity threshold value for a reference face model (Mn) for use in a face recognition system, which method comprises the steps of
acquiring a reference face model (Mn) based on a number of distinct images of the same face;
acquiring a control group of unrelated face images (G1, G2, . . . Gj);
evaluating the reference face model (Mn) against each of the unrelated face images (G1, G2, . . . Gj) in the control group;
calculating an evaluation score for each of the unrelated face images (G1, G2, . . . Gj);
using the evaluation scores to determine a similarity threshold value for this reference face model (Mn) which would cause a predefined majority of these unrelated face images (G1, G2, . . . Gj) to be rejected were they to be evaluated against this reference face model (Mn).
8. A method of performing face recognition, which method comprises the steps of
acquiring a number of reference face models (M1, M2, . . . , Mn) for a number of different faces, where each reference face model (M1, M2, . . . , Mn) is based on a number of distinct images of the same face;
determining a similarity threshold value for each reference face model (M1, M2, . . . , Mn) using the method according to claim 7;
acquiring a test image (IT);
identifying the reference face model (M1, M2, . . . , Mn) most similar to the test image (IT);
accepting or rejecting the identified reference face model (M1, M2, . . . , Mn) on the basis of the similarity threshold value.
9. A method of performing face recognition according to claim 1, wherein the reference face models (M1, M2, . . . , Mn) are trained using a method of training a reference face model (M1) for use in a face recognition system, comprising the steps of
acquiring an average face model (MAV) based on a number of face image (I1, I2, . . . Ij) of different faces;
acquiring a number of test image (T1, T2, . . . , Tm) of the face for which the reference face model (M1) is to be trained;

applying a training algorithm to the average face model and information obtained from the test images (T1, T2, . . . , Tm) to give the reference face model (M1).
10. A method of optimizing an image (I) for use in face recognition, wherein the illumination intensity of the image (I) is equalised by sub-dividing the image (I) into smaller sub-images, calculating a feature vector for each sub-image, and modifying the feature vector of a sub-image by dividing each coefficient of that feature vector by a value representing the overall intensity of that sub-image, andor by discarding a coefficient of the feature vector, andor by converting that feature vector to a normalised vector.
11. A method of performing face recognition according to claim 1, wherein the images (I, IT, IT, G1, G2, . . . . Gj, T1, T2, . . . , Tm, Tnew) used for training reference face models (M1, M2, . . . , Mn) andor for face recognition are first optimized according to the method of optimizing an image (I) for use in face recognition, wherein the illumination intensity of the image (I) is equalised by sub-dividing the image (I) into smaller sub-images, calculating a feature vector for each sub-image, and modifying the feature vector of a sub-image by dividing each coefficient of that feature vector by a value representing the overall intensity of that sub-image, andor by discarding a coefficient of the feature vector, andor by converting that feature vector to a normalised vector.
12. A system (1) for performing face recognition, comprising
a number of reference face models (M1, M2, . . . , Mn) and an average face model (MAV) where each face model (M1, M2, . . . , Mn, MAV) comprises a matrix of states representing regions of the face;
an acquisition unit (2) for acquiring a test image (IT);
a best path calculator (3) for calculating a best path through the average face model (MAV);
an evaluation unit (4) for applying the best path of the average face model (MAV) to each reference face model (M1, M2, . . . , Mn) in order to evaluate a degree of similarity between each reference face model (M1, M2, . . . , Mn) and the test image (IT);
a decision making unit (5) for accepting or rejecting the reference face model (M1, M2, . . . , Mn) with the greatest degree of similarity.
13. A system for training a reference face model (MR) comprising
a means for acquiring an average face model (MAV);
a means for acquiring a number of training images (T1, T2, . . . , Tn) of the same face;
and a reference face model generator (22) for generating a reference face model (M1) from the training images (T1, T2, . . . , Tn), whereby the reference face model (M1) is based on the average face model (MAV).
14. A system for calculating a similarity threshold value for a reference face model (Mn) for use in a face recognition system comprising
a means for acquiring a reference face model (Mn) based on a number of distinct images of the same face;
a means of acquiring a control group of unrelated face images (G1, G2, . . . Gk);
an evaluation unit (41) for evaluating the reference face model (Mn) against each of the unrelated face images (G1, G2, . . . Gk) of the control group;
an evaluation score calculation unit (40) for calculating an evaluation score for each of the unrelated face images (G1, G2, . . . Gk);
a similarity threshold value determination unit (45) for determining a similarity threshold value for the reference face model (Mn), on the basis of the evaluation scores, which would cause a predefined majority of these unrelated face images (G1, G2, . . . Gk) to be rejected were they to be evaluated against this reference face model (Mn).
15. A system for optimizing an image (I) for use in face recognition, comprising
a subdivision unit (50) for sub-dividing the image (I) into number of sub-images;
a feature vector determination unit (51) for determining a local feature vector associated with each sub-image;
a feature vector modification unit (52) for modifying the local feature vector associated with a sub-image by dividing each coefficient of that local feature vector by a value representing the overall intensity of that sub-image, andor by discarding a coefficient of the feature vector, andor by converting that local feature vector to a normalised vector.
16. A system for performing face recognition, comprising a system for training a reference face model (MR) according to claim 13.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A field effect transistor for chemical sensing, comprising
a drain electrode,
a source electrode,
an electrically insulating graphene layer substrate,
a continuous monocrystalline graphene layer arranged on said graphene layer substrate, the monocrystalline graphene layer at least partially defining an electrically conducting and chemically sensitive channel, said monocrystalline graphene layer and said chemically sensitive channel extending between and being electrically connected to said drain electrode and source electrode, and
a gate electrode being arranged at a distance from and opposite to said chemically sensitive conducting channel so that the gate electrode and the monocrystalline graphene layer together with the drain and source electrodes define a gap in which the gate electrode and chemically sensitive conducting channel face one another on opposite sides of the gap in a first direction, and in which the drain and source electrodes face one another on opposite sides of the gap in a second direction perpendicular to the first direction, and through which a chemical to be sensed is introducible to reach the chemically sensitive channel within the gap,
wherein the gate electrode is arranged on an electrically insulating surface of a gate substrate, and the chemically sensitive channel and the graphene layer substrate are spaced apart from the gate substrate by the drain and source electrodes, and wherein the chemically sensitive channel and the graphene layer substrate belong to a first separate part that is mounted to a second separate part comprising at least the gate electrode.
2. The field effect transistor as claimed in claim 1, wherein the graphene layer has uniform thickness, preferably a predetermined thickness of one or more monolayers of graphene.
3. The field effect transistor as claimed in claim 1, wherein the graphene layer is an epitaxial layer.
4. The field effect transistor as claimed in claim 3, wherein the graphene layer substrate is the substrate on which the graphene layer was epitaxially grown.
5. The field effect transistor as claimed in claim 1, wherein the graphene layer substrate is a silicon carbide substrate.
6. The field effect transistor as claimed in claim 5, wherein the graphene layer was epitaxially grown on the silicon carbide substrate by sublimation of silicon from the silicon carbide substrate.
7. The field effect transistor as claimed in claim 1, wherein the graphene layer has been surface treated for chemical selectivity so that only selected types of chemicals are detected by the graphene layer so that certain types of chemicals are prevented from reaching the chemically sensitive channel.
8. The field effect transistor as claimed in claim 7, wherein the surface treatment comprises deposition of metal particles andor polymers.
9. The field effect transistor as claimed in claim 1, wherein the gap is arranged directly adjacent to the chemically sensitive channel and is in connection with an ambient environment so that the chemical to be sensed can reach the gap from the ambient environment, wherein said ambient environment is a gaseous ambient environment, such as an air environment, or a liquid ambient environment.
10. The field effect transistor as claimed in claim 1, wherein the gate electrode and the chemically sensitive channel are separated by said gap only.
11. The field effect transistor as claimed in claim 1, wherein the gate electrode is made of metal, such as of gold or platinum.
12. The field effect transistor as claimed in claim 1, wherein the gap is designed as a flow-through channel, the height of which is defined by the distance between the gate electrode and the chemically sensitive channel.
13. The field effect transistor as claimed in claim 12, wherein the second part further comprises the drain electrode and the source electrode arranged on the insulating surface of the gate substrate, and which by the mounting are brought in physical contact with the first part, thereby establishing the electrical connection between the graphene layer and the source electrode and the drain electrode.
14. The field effect transistor as claimed in claim 12, wherein said flow-through channel has a closed cross-section.
15. A chemical sensor comprising the field effect transistor as claimed in claim 1, wherein the chemical sensor comprises circuitry arranged to electrically bias the field effect transistor so that a chemical to be sensed which comes in contact with the chemically sensitive channel results in a change of an electrical signal, wherein the change is indicative of the chemical being sensed.
16. The chemical sensor as claimed in claim 15, wherein the circuitry comprises a current source arranged to flow a constant current between the source electrode and the drain electrode and by comprising a voltage source arranged to supply a constant voltage to the gate electrode, wherein the electrical signal indicative of the sensed chemical is a voltage between the source electrode and the drain electrode.
17. The chemical sensor as claimed in claim 15, wherein the circuitry comprises a voltage source arranged to apply a constant voltage between the source electrode and the drain electrode, wherein the electrical signal indicative of the sensed chemical is a gate electrode voltage required to maintain a constant current between the source electrode and the drain electrode.
18. Use of a field effect transistor as claimed in claim 1, for chemical sensing.
19. The use as claimed in claim 18, wherein the chemical sensing comprises guiding a chemical to be sensed from an ambient environment to the gap.
20. A method for producing the field effect transistor as claimed in claim 1, wherein the method comprises the steps of:
providing a wafer that comprises an epitaxial graphene layer on a silicon carbide wafer substrate; and
forming the continuous monocrystalline graphene layer of the field effect transistor from the epitaxial graphene layer;
providing the continuous monocrystalline graphene layer arranged on the graphene layer substrate as a first separate part;
providing a second separate part comprising the gate electrode arranged on an insulating surface of a gate substrate; and
forming the field effect transistor for chemical sensing by mounting the first and second separate parts to each other.
21. The method as claimed in claim 20, wherein the step of providing the wafer comprises:
providing a silicon carbide wafer substrate; and
growing the epitaxial graphene layer on the silicon carbide wafer substrate by sublimation of silicon from the silicon carbide wafer substrate.
22. The method as claimed in claim 20, wherein the step of forming the continuous monocrystalline graphene layer comprises:
cutting the wafer so that the continuous monocrystalline graphene layer arranged on the graphene layer insulating substrate is formed from a cut piece of the epitaxial graphene layer with underlying part of the silicon carbide wafer substrate.
23. The method as claimed in claim 20, wherein the second separate part also comprises the drain electrode and the source electrode arranged on the insulating surface of the gate substrate.

1. A method comprising:
consecutively receiving at and writing into a memory a sequence of groupings of bits from a data stream, the groupings of bits having a predetermined size;
reading from the memory a subset of the sequence of the groupings of bits written into the memory, the subset having fewer groupings of bits than the sequence of groupings of bits written into the memory;
applying the subset to a first multiplexer (MUX);
applying another data stream to a third MUX, the another data stream comprising bits representing a virtual local area network (VLAN) tag; and
selectively applying to a second MUX the subset applied to the first MUX and the another data stream applied to the third MUX.
2. The method of claim 1, wherein:
the memory comprises a first in, first out (FIFO) memory; and
the reading is based upon a read pointer generated by a state machine.
3. The method of claim 2, wherein:
the state machine also generates a first MUX select signal, a second MUX select signal, and a third MUX select signal applied to the first MUX, the second MUX, and the third MUX, respectively.
4. An apparatus comprising:
a memory capable of consecutively receiving and storing a sequence of groupings of bits from a data stream, the groupings of bits having a predetermined size, the memory also being capable of retrieving a subset of the sequence of the groupings of bits written into the memory, the subset having fewer groupings of bits than the sequence of groupings of bits written into the memory; and
a first multiplexer (MUX), a second MUX, and a third MUX;
the apparatus being capable of applying the subset to the first MUX, applying another data stream to the third MUX, and selectively applying to a second MUX the subset applied to the first MUX and another data stream applied to the third MUX, the another data stream comprising bits representing a virtual local area network (VLAN) tag.
5. The apparatus of claim 4, wherein:
the memory comprises a first in, first out (FIFO) memory; and the apparatus also comprises a state machine to generate a read pointer, the memory being capable of retrieving the subset based upon the read pointer.
6. The apparatus of claim 5, wherein:
the state machine is also capable of generating a first MUX select signal, a second MUX select signal, and a third MUX select signal to be applied to the first MUX, the second MUX, and the third MUX, respectively.
7. A system comprising:
an integrated circuit comprising:
a memory capable of consecutively receiving and storing a sequence of groupings of bits from a data stream, the groupings of bits having a predetermined size, the memory also being capable of retrieving a subset of the sequence of the groupings of bits written into the memory, the subset having fewer groupings of bits than the sequence of groupings of bits written into the memory; and
a first multiplexer (MUX), a second MUX, and a third MUX;
the integrated circuit being capable of applying the subset to the first MUX, applying another data stream to the third MUX, and selectively applying to the second MUX the subset applied to the first MUX and another data stream applied to the third MUX, the another data stream comprising bits representing a virtual local area network (VLAN) tag.
8. The system of claim 7, further comprising:
an input data bus coupled to the memory.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An expandable spinal stabilization device comprising:
a. a plurality of plates arranged in a stack; and
b. a connecting rod connecting the plurality of plates; wherein the plates are connected to the connecting rod such that the plurality of plates adopt a helical configuration about the longitudinal axis of the connecting rod when the plates are turned about the longitudinal axis of the connecting rod; and further wherein the dimensions of the device render it suitable for insertion into an intervertebral space.
2. The device according to claim 1 wherein the plurality of plates comprise a top plate, a bottom plate, and one or more interstitial plates disposed between the top plate and bottom plate, each plate comprising an obverse face and a reverse face, further wherein the connecting rod extends through the obverse and reverse faces of the top plate and the interstitial plates at a position offset from the geometric center of the plates.
3. The device according to claim 1 wherein the plates are circular.
4. The device according to claim 1 wherein the plates are oval.
5. The device according to claim 1 wherein the circumferential edges of the plates are multi-sided.
6. The device according to claim 5 wherein the plates are square.
7. The device according to claim 5 wherein the plates are star-shaped.
8. The device according to claim 5 wherein the plates are triangular.
9. The device according to claim 1 wherein the circumferential edges of the plates provide sharp cutting edges.
10. The device according to claim 9 wherein the plates are saw-shaped.
11. The device according to claim 1 wherein the plates and the connecting rod are comprised of a biocompatible material.
12. The device according to claim 1 wherein the plates have integrated passages.
13. The device according to claim 1 comprising a top plate, a bottom plate, and one or more interstitial plates disposed between the top plate and the bottom plate, each plate comprising an obverse face and a reverse face such that a pair of adjacent faces comprising the obverse face of one plate and the reverse face of an adjacent plate is provided for each pair of adjacent plates in the stack, wherein:
a. one face in at least one pair of adjacent faces comprises a catch;
b. the other face in the at least one pair of adjacent faces comprises an abutment; and further wherein
c. every abutment is positioned in a manner to engage the catch of an adjacent face when the plates are rotated about the longitudinal axis of the connecting rod.
14. The device according to claim 13 wherein one face in every pair of adjacent faces except the final pair comprises a catch and the other face in every pair of adjacent faces except the final pair comprises an abutment.
15. The device according to claim 13 wherein one face of each pair of adjacent faces comprises a catch and the other face of each pair of adjacent faces comprises an abutment.
16. The device according to claim 13 wherein the reverse face of each pair of adjacent faces comprises an abutment and the obverse face of the at least one pair of adjacent faces comprises a catch.
17. The device according to claim 13 wherein each catch comprises a slot running along the obverse or reverse face of a plate in a direction substantially tangential with respect to the circumference of the connecting rod and each abutment comprises a post extending away from the obverse or reverse face of a plate.
18. The device according to claim 17 wherein the slots are raised from the obverse or reverse faces of the plates.
19. The device according to claim 17 wherein the slots are recessed in the obverse or reverse faces of the plates.
20. The device according to claim 13 wherein the bottom plate is unable to move independently of the connecting rod and the top plate and interstitial plates are connected to the connecting rod in a manner that allows them to rotate about the longitudinal axis of the connecting rod.
21. The device according to claim 20 wherein the obverse face of the top plate comprises a sleeve connector disposed thereon and the connecting rod comprises an end extending beyond the obverse face of the top plate, the device further comprising a turning tool, the turning tool comprising:
a. an outer sleeve having an end adapted to engage the sleeve connector; and
b. an inner sleeve nested within the outer sleeve, the inner sleeve having an end adapted to engage the end of the connecting rod extending beyond the top plate such that when the inner sleeve engages the connecting rod and the outer sleeve engages the sleeve connector, the helical configuration is achieved by turning at least one of the inner and outer sleeves.
22. The device according to claim 21 wherein the sleeve connector is a nut and the end of the outer sleeve is adapted to engage the nut, and further wherein the end of the connecting rod extending beyond the top plate is threaded and the end of the inner sleeve is adapted to engage the threads.
23. A method of stabilizing a spinal column, the method comprising inserting the expandable spinal stabilization device according to claim 1 into an intervertebral space in the spinal column and turning the plates about the longitudinal axis of the connecting rod until the plurality of plates adopt a helical configuration.
24. The method according to claim 23 further comprising inserting a bone growth-promoting material in the intervertebral space around the expandable spinal stabilizing device.
25. The method according to claim 23 wherein the device is inserted using a posterior or posterial lateral approach.
26. The method according to claim 25 wherein the device is inserted with the aid of a tube or cannula.
27. The method according to claim 23 wherein the device is inserted using an anterior approach.