Author: claimsbot

1. A hot-melt adhesive agent comprising a thermoplastic block copolymer (A) which is a copolymer of vinyl class aromatic hydrocarbons and conjugated diene compounds,
wherein the thermoplastic block copolymer (A) comprises:
(A1) a radial type styrene block copolymer having a styrene content of 35 to 45% by weight and a diblock content of 50 to 90% by weight, and having a viscosity at 25\xb0 C. as a 25% (by weight) toluene solution of not more than 250 mPa\xb7s; and
(A2) a styrene block copolymer having a styrene content of less than 30% by weight, and having a viscosity at 25\xb0 C. as a 25% (by weight) toluene solution of more than 250 mPa\xb7s.
2. The hot-melt adhesive agent according to claim 1, wherein the radial type styrene block copolymer (A1) comprises a styrene block copolymer of three branched type.
3. The hot-melt adhesive agent according to claim 1, wherein the thermoplastic block copolymer (A2) comprises a styrene-isoprene block copolymer.
4. The hot-melt adhesive agent according to claim 1, further comprising a tackifier resin.
5. The hot-melt adhesive agent according to claim 4, wherein the tackifier resin is a \u03b1-methylstyrene resin.
6. The hot-melt adhesive agent according to claim 1, further comprising a plasticizer.
7. The hot-melt adhesive agent according to claim 4, further comprising a stabilizer.
8. An article comprising the hot-melt adhesive agent according to claim 1.
9. The article of claim 8, which is a disposable product.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A piston assembly for an engine of a vehicle, the piston assembly comprising:
an annular body having an outer side surface defining a groove; and
a ring assembly disposed within the groove, the ring assembly including:
a first compression ring including a first ring outer face defining an outer first ring diameter; and
a second compression ring overlaid adjacent the first compression ring and including a second ring outer face defining an outer second ring diameter;
wherein the outer second ring diameter is larger than the outer first ring diameter when both the first compression ring and the second compression ring are disposed in a radially uncompressed condition; and
wherein the first compression ring includes a first ring cut defining a first ring gap extending radially across the first compression ring, and the second compression ring includes a second ring cut defining a second ring gap extending radially across the second compression ring, wherein the second ring gap is larger than the first ring gap when both of the first compression ring and the second compression ring are disposed in the radially uncompressed condition.
2. A piston assembly as set forth in claim 1 wherein the first compression ring includes a radial spring tension related to a width of the first spring gap when the first compression ring is disposed in the radially uncompressed condition, the second compression ring includes a radial spring tension related to a width of the second spring gap when the second compression ring is disposed in the radially uncompressed condition, and wherein the spring tension of the first compression ring and the second compression ring increases with an increase in the width of the first gap and the width of the second gap respectively.
3. A piston assembly as set forth in claim 2 wherein the second compression ring includes a higher radial spring tension than the first compression ring.
4. A piston assembly as set forth in claim 1 wherein the first ring gap is equal to the second ring gap when both the first compression ring and the second compression ring are disposed in the radially compressed condition.
5. A piston assembly as set forth in claim 4 wherein the outer second ring diameter is equal to the outer first ring diameter when both the first compression ring and the second compression ring are disposed in a radially compressed condition.
6. A piston assembly as set forth in claim 1 wherein the first ring gap and the second ring gap are angularly offset relative to each other in a non-overlapping orientation.
7. A piston assembly as set forth in claim 6 wherein the ring assembly includes a positioning mechanism securing the non-overlapping orientation between the first ring gap and the second ring gap.
8. A piston assembly as set forth in claim 7 wherein the positioning mechanism is configured for allowing relative radially movement between the first compression ring and the second compression ring, and is configured for limiting relative angular movement between the first compression ring and the second compression ring.
9. A piston assembly as set forth in claim 1 wherein the first compression ring defines a first radial width, and the second compression ring defines a second radial width, wherein the first radial width is greater than the second radial width.
10. A ring assembly for a piston of an internal combustion engine, the ring assembly comprising;
a first compression ring including a first ring outer face defining an outer first ring diameter; and
a second compression ring overlaid adjacent the first compression ring and including a second ring outer face defining an outer second ring diameter;
wherein both the first compression ring and the second compression ring are configured for disposition within a singular groove defined by an annular body of a piston;
wherein the outer second ring diameter is larger than the outer first ring diameter when both the first compression ring and the second compression ring are disposed in a radially uncompressed condition; and
wherein the first compression ring includes a first ring cut defining a first ring gap extending radially across the first compression ring, and the second compression ring includes a second ring cut defining a second ring gap extending radially across the second compression ring, wherein the second ring gap is larger than the first ring gap.
11. A ring assembly as set forth in claim 10 wherein the first compression ring includes a radial spring tension related to a width of the first spring gap when the first compression ring is disposed in the radially uncompressed condition, the second compression ring includes a radial spring tension related to a width of the second spring gap when the second compression ring is disposed in the radially uncompressed condition, and wherein the spring tension of the first compression ring and the second compression ring increases with an increase in the width of the first gap and the width of the second gap respectively.
12. A ring assembly as set forth in claim 11 wherein the second compression ring includes a higher radial spring tension than the first compression ring.
13. A ring assembly as set forth in claim 10 wherein the first ring gap is equal to the second ring gap when both the first compression ring and the second compression ring are disposed in the radially compressed condition.
14. A ring assembly as set forth in claim 13 wherein the outer second ring diameter is equal to the outer first ring diameter when both the first compression ring and the second compression ring are disposed in a radially compressed condition.
15. A ring assembly as set forth in claim 10 wherein the first ring gap and the second ring gap are angularly offset relative to each other in a non-overlapping orientation.
16. A ring assembly as set forth in claim 15 wherein the ring assembly includes a positioning mechanism securing the non-overlapping orientation between the first ring gap and the second ring gap.
17. A ring assembly as set forth in claim 16 wherein the positioning mechanism is configured for allowing relative radially movement between the first compression ring and the second compression ring, and is configured for limiting relative angular movement between the first compression ring and the second compression ring.
18. A ring assembly as set forth in claim 10 wherein the first compression ring defines a first radial width, and the second compression ring defines a second radial width, wherein the first radial width is greater than the second radial width.

1. A method of producing a steel sheet, the method comprising:
providing a steel slab of an alloy composition comprising iron (Fe), carbon (C), niobium (Nb) and aluminum (Al);
rolling the steel slab into a steel sheet; and
controlling temperature of the steel slab for rolling such that niobium carbide (NbC) precipitates during rolling while inhibiting precipitation of niobium carbide.
2. The method of claim 1, wherein controlling comprises:
heating the steel slab, before rolling, to a temperature higher than NbC precipitation temperature of the alloy composition; and
letting the steel slab cooled to a temperature lower than the NbC precipitation temperature as the steel slab enters and is rolled.
3. The method of claim 1, wherein providing the steel slab comprises continuously casting the alloy into the steel slab.
4. The method of claim 3, further comprising: continuously supplying the steel slab to a roller for rolling.
5. The method of claim 4, wherein controlling comprises heating the steel slab while being supplied for rolling to a temperature higher than NbC precipitation temperature of the alloy composition such that when the steel slab is rolled, the steel slab is cooled to a temperature lower than the NbC precipitation temperature.
6. The method of claim 1, wherein the thin slab is reheated to be in an austenite state.
7. The method of claim 1, wherein the carbon (C) is present in an amount of 0.20 to 0.28 wt %.
8. The method of claim 1, wherein the thin slab is reheated in a furnace and discharged from the furnace at a temperature of 1060 to 1100\xb0 C.
9. The method of claim 1, wherein the thin slab is reheated in a furnace and discharged from the furnace at a temperature of 1080 to 1100\xb0 C.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method of operating a device, the method comprising:
passing a clock signal provided by a phase locked loop (PLL) circuit of the device through an internal feedback path of the PLL circuit to provide a first input signal to the PLL circuit during a low power operation mode of the device;
detecting a lock between the first input signal and a reference signal during the low power operation mode, wherein the lock indicates that the clock signal is operating at a frequency used during a normal operation mode of the device;
providing a first lock detection signal to indicate the lock between the first input signal and the reference signal;
providing power to operate the PLL circuit during the normal operation mode;
passing the clock signal through an external feedback path to provide a second input signal to the PLL circuit and through a signal path of the device to an output node of the device during the normal operation mode;
switching from detecting a lock between the first input signal and the reference signal to detecting a lock between the second input signal and the reference signal;
providing a second lock detection signal to indicate the lock between the second input signal and the reference signal;
receiving an operation mode signal to switch the device from the normal operation mode to the low power operation mode;
disabling the signal path to prevent glitches from appearing at the output node during the switch from the normal operation mode to the low power operation mode; and
continuing providing power to the PLL circuit until after the signal path is disabled.
2. The method of claim 1, further comprising:
continuing providing the first lock detection signal if the lock between the second input signal and the reference signal is at least a frequency lock.
3. The method of claim 1, wherein the external feedback path is part of a clock tree of the device.
4. The method of claim 1, wherein the disabling is performed in response to a transition of the clock signal to a logic value, the method further comprising maintaining the output node at the logic value during the low power operation mode.
5. The method of claim 4, wherein the disabling further comprises:
capturing the logic value in response to the transition of the clock signal;
passing the captured logic value through a transmission gate;
disabling the signal path in response to the passed captured logic value; and
closing the transmission gate to prevent further logic values from passing through the transmission gate during the low power operation mode.
6. The method of claim 1, further comprising:
interrupting power to disable the PLL circuit during the low power operation mode;
receiving the operation mode signal to switch the device back from the low power operation mode to the normal operation mode;
providing power to operate the PLL circuit in response to the operation mode signal;
continuing disabling the signal path until after the PLL circuit begins operating to prevent glitches from appearing at the output node during the switch from the low power operation mode to the normal operation mode; and
enabling the signal path when the device returns to the normal operation mode.
7. The method of claim 6, wherein the enabling is performed in response to a transition of the clock signal to a logic value.
8. The method of claim 7, wherein the enabling comprises:
capturing the logic value in response to the transition of the clock signal; and
enabling the signal path in response to the captured logic value.
9. The method of claim 1, wherein the device is a programmable logic device (PLD).
10. A device comprising:
a phase locked loop (PLL) circuit;
an internal feedback path adapted to pass a clock signal to provide a first input signal to the PLL circuit during a low power operation mode of the device;
a lock detector; and
an external feedback path comprising at least one external circuit adapted to pass the clock signal to provide a second input signal to the PLL circuit during a normal operation mode of the device;
wherein the PLL circuit includes a multiplexer for selecting between the first input signal and the second input signal; and
wherein the lock detector is adapted to:
detect a lock between the first input signal and a reference signal during the low power operation mode;
provide a first lock detection signal to indicate the lock between the first input signal and the reference signal;
detect a lock between the second input signal and the reference signal during the normal operation mode; and
provide a second lock detection signal to indicate the lock between the second input signal and the reference signal.
11. The device of claim 10, wherein the lock detector is further adapted to:
continue to provide the first lock detection signal if the lock between the second input signal and the reference signal is at least a frequency lock.
12. The device of claim 10, further comprising a clock tree, wherein the external feedback path is part of the clock tree.
13. The device of claim 10, further comprising:
a power switch;
an output node;
a signal path adapted to pass the clock signal from the PLL circuit to the output node during the normal operation mode of the device; and
a power control block adapted to:
operate the power switch to provide power to operate the PLL circuit during the normal operation mode,
receive an operation mode signal to switch the device from the normal operation mode to the low power operation mode,
disable the signal path to prevent glitches from appearing at the output node during the switch from the normal operation mode to the low power operation mode, and
operate the power switch to continue to provide power to operate the PLL circuit until after the signal path is disabled.
14. The device of claim 13, wherein the power control block is adapted to disable the signal path in response to a transition of the clock signal to a logic value and adapted to maintain the output node at the logic value during the low power operation mode.
15. The device of claim 14, wherein the power control block comprises:
a flip flop adapted to capture the logic value in response to the transition of the output signal;
a transmission gate adapted to pass the captured logic value to disable the signal path using the passed captured logic value; and
logic adapted to close the transmission gate to prevent further logic values from passing through the transmission gate during the low power operation mode.
16. The device of claim 13, wherein the power control block is adapted to:
operate the power switch to interrupt power to disable the PLL circuit during the low power operation mode;
receive the operation mode signal to transition the device back from the low power operation mode to the normal operation mode;
operate the power switch to provide power to operate the PLL circuit in response to the operation mode signal;
keep the signal path disabled until after the PLL circuit begins operating to prevent glitches from appearing at the output node during the switch from the low power operation mode to the normal operation mode; and
enable the signal path when the device returns to the normal operation mode.
17. A phase locked loop (PLL) circuit comprising:
an internal feedback path adapted to pass a clock signal to provide a first input signal to the PLL circuit during a low power operation mode of a device;
an external feedback path adapted to pass the clock signal to provide a second input signal to the PLL circuit during a normal operation mode of the device;
a multiplexer for selecting between the first input signal and the second input signal; and
a lock detector adapted to:
detect a lock between the first input signal and a reference signal during the low power operation mode;
provide a first lock detection signal to indicate the lock between the first input signal and the reference signal;
detect a lock between the second input signal and the reference signal during the normal operation mode; and
provide a second lock detection signal to indicate the lock between the second input signal and the reference signal.
18. The PLL circuit of claim 17 including a multiplexer for selecting between at least two reference signals for the lock detector.