All The Claims

1. A message display system disposed in a vehicle comprising:
a display unit mounted in a manner such that a message displayed in said unit is viewable from outside of said vehicle;
a control mechanism integral with said vehicle for customizing the message displayed on the display unit;
said control mechanism having a message text box for displaying selected messages either input by said user or selected by scrolling arrows adjacent said message text box;
a remote control for uploading message selections and customizations made in said control mechanism by said user; and
said remote control having buttons for making a selection of a message to be displayed on the display unit from the message selections stored therein.
2. The message display system of claim 1 in which said control mechanism includes a group box in said display unit for displaying a group name, and group box scrolling arrows for scrolling through groups of messages in said group box.
3. The message display system of claim 1 in which said control mechanism includes customization buttons for selecting scroll characteristics, blinking characteristics, and text characteristics of the display unit.
4. The message display system of claim 3 in which said remote control has said selected messages arranged in columns with a button for each message for selection by the user for display on the display unit.
5. The message display system of claim 4 in which said remote control has auto-off and manual buttons, use of said auto-off button providing for termination of a displayed message after a predetermined period of time.
6. The message display system of claim 5 in which said remote control emits an audio alert when a message display time has expired.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A space vector modulation method for a multi-phase AC-AC direct conversion device that PWM-controls bidirectional switches with space vector modulation by a direct ACAC conversion system, the space vector modulation method for the AC-AC direct conversion device comprising:
defining a vector state in which a line voltage of multi-phase AC output is expanded onto a two-phase static \u03b1\u03b2 coordinates;
defining a phase-lagging simple harmonic oscillation vector axis and a phase-leading simple harmonic oscillation vector axis in a sector where an output voltage command value vector Vo* exists as an X axis and a Y axis respectively;
setting maximum voltage vectors XL, YL, middle vectors XM, YM and minimum vectors XS, YS in the each axis, a zero vector Z that is an intermediate voltage phase of a power source, and a rotation vector R that is one rotation vector existing in the sector, as base vectors;
determining a switching selection pattern formed by a combination of four vectors among the eight varieties of vectors, which satisfies predetermined conditions for reducing higher harmonics of an input current andor an output voltage,
deriving a duty coefficient matrix associated with the input and output for the four vectors of this selection pattern on the basis of power source voltage information and output current information;
calculating its inverse matrix and determining a duty solution of the four vectors; and
converting input and output waveforms into sine waves simultaneously by the determined duty solution.
2. The space vector modulation method for the AC-AC direct conversion device as claimed in claim 1, wherein:
the predetermined conditions have at least one or more conditions from the following conditions;
the input waveform and the output waveform can be simultaneously converted into the sine waves.
a vector whose voltage difference from a command value when viewed toward a line voltage vector direction is a maximum is not selected.
a switching transition every one phase is possible.
a direct commutation between a maximum voltage phase and a minimum voltage phase of the power source does not occur upon the switching transition.
the zero vector of the intermediate voltage phase of the power source is used all the time.
3. The space vector modulation method for the AC-AC direct conversion device as claimed in claim 1, wherein:
of all the space vectors of the AC-AC direct conversion device, an output side space vector is listed in tabular form as coefficients of a three-phase two-phase converted \u03b1 component Vi\u03b1 of a power source phase voltage detection value and a three-phase two-phase converted \u03b2 component Vi\u03b2 of the power source phase voltage detection value,
an input side space vector is listed in tabular form as coefficients of a three-phase two-phase converted \u03b1 component Io\u03b1 of an output load current detection value and a three-phase two-phase converted \u03b2 component Io\u03b2 of the output load current detection value, and
the duty solution of the four vectors is determined by using the table.
4. The space vector modulation method for the AC-AC direct conversion device as claimed in claim 1, wherein:
when determining the duty solution, a check is previously made whether the inverse matrix is present for the each selection pattern of the four vectors, and
a selection pattern, the duty solution of which can be obtained, is used as a final duty.
5. The space vector modulation method for the AC-AC direct conversion device as claimed in claim 1, wherein:
when determining the duty solution, the operation is performed with a row whose duty addition value becomes 1 eliminated in the duty coefficient matrix.
6. The space vector modulation method for the AC-AC direct conversion device as claimed in claim 1, wherein:
as the selection pattern, on the basis of magnitude of the output voltage command value,
in a case of a low output voltage area, a selection pattern containing the zero vector is used, and
in a case of a high output voltage area, a selection pattern containing no zero vector is used.
7. The space vector modulation method for the AC-AC direct conversion device as claimed in claim 1, wherein:
a determinant of the duty coefficient matrix whose inverse matrix is present is previously listed in tabular form for the selection patterns, and
the duty solution of the four vectors is determined by using the table.
8. The space vector modulation method for the AC-AC direct conversion device as claimed in claim 1, wherein:
the selection pattern is fixed according to lag or lead of a rotation vector phase in the sector of the output side space vector.
9. The space vector modulation method for the AC-AC direct conversion device as claimed in claim 1, wherein:
the selection pattern is fixed according to comparison of magnitude of a connection between the middle voltage vectors XM and YM of the simple harmonic oscillation vectors and the output voltage command value.
10. The space vector modulation method for the AC-AC direct conversion device as claimed in claim 1, wherein
as the selection pattern, a selection pattern having two levels is used in preference to the others.
11. The space vector modulation method for the AC-AC direct conversion device as claimed in claim 1, wherein
at a time when the current detection value is small or at an initial operating start-up, the operation for determining the duty solution of the four vectors is performed on the basis of the power source voltage information and an output current command value.

1. A PLC based optical component comprising:
a substrate;
a waveguide deposited above said substrate;
a notch etched to the depth of said waveguide, said notch defining a facet of said waveguide and exhibiting a width less than the optical mode width of light constrained within said waveguide; and
a trench cut in front of said notch, said trench being displaced from said defined waveguide facet by said notch.
2. A PLC based optical component in accordance with claim 1, further comprising an optical component placed within said trench, said optical component being aligned with said waveguide facet.
3. A PLC based optical component in accordance with claim 1, wherein said trench exhibits a wall opposing said waveguide facet, said wall presenting an oblique angle to an axis of said waveguide.
4. A PLC based optical component in accordance with claim 3, further comprising an optical component placed within said trench against said wall, said optical component being aligned with said waveguide facet.
5. A PLC based optical component in accordance with claim 1, further comprising an optical fiber exhibiting a core, said optical fiber core being optically aligned with said waveguide.
6. A PLC based optical component in accordance with claim 5, further comprising a v-groove, said optical fiber being placed in said v-groove.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method of manufacturing a light emitting device, the method comprising:
partially forming a first buffer layer on a growth substrate, the first buffer layer having a Young’s modulus smaller than that of the growth substrate; and
forming a light emitting structure layer on the growth substrate and the first buffer layer, the light emitting structure layer including a first conductive semiconductor layer, a second conductive semiconductor layer and an active layer interposed between the first and second conductive semiconductor layers.
2. The method of claim 1, further comprising forming a second buffer layer on the first buffer layer before the light emitting structure layer is formed.
3. The method of claim 2, further comprising forming an undoped nitride layer on the second buffer layer before the light emitting structure layer is formed.
4. The method of claim 2, wherein a thickness of the second buffer layer is smaller than a thickness of the first buffer layer.
5. The method of claim 2, wherein the first buffer layer makes contact with the growth substrate, and the second buffer layer makes contact with the growth substrate and the first buffer layer.
6. The method of claim 1, further comprising forming an undoped nitride layer on the first buffer layer before the light emitting structure layer is formed.
7. The method of claim 1, wherein the first buffer layer has a thickness of 0.1 nm\u02dc5.0 \u03bcm.
8. The method of claim 1, wherein the first buffer layer includes oxide or nitride including at least one selected from the group consisting of Al, Ta, Ti, Mo, W, Pd, Ir, Rb, Si, and Cr.
9. The method of claim 1, wherein the first buffer layer formed on the growth substrate has an area corresponding to 30% to 95% based on a total area of the growth substrate.
10. The method of claim 1, wherein the first buffer layer has a bandgap energy lower than a bandgap energy of the growth substrate and higher than a bandgap energy of the light emitting structure layer.
11. The method of claim 1, wherein the first buffer layer is continuously formed along an outer peripheral portion of the growth substrate while surrounding a central portion of the growth substrate, and partially formed on the central portion of the growth substrate.
12. A method of manufacturing a light emitting device, the method comprising:
partially forming a first buffer layer on a growth substrate, the first buffer layer having a Young’s modulus smaller than that of the growth substrate;
forming a light emitting structure layer on the growth substrate and the first buffer layer, the light emitting structure layer including a first conductive semiconductor layer, a second conductive semiconductor layer and an active layer interposed between the first and second conductive semiconductor layers;
forming a second electrode layer on the light emitting structure layer;
separating the growth substrate and the first buffer layer from the light emitting structure layer; and
forming a first electrode layer on a predetermined portion of the first conductive semiconductor layer, which is exposed as the growth substrate and the first buffer layer are separated from the light emitting structure layer.
13. The method of claim 12, wherein a plurality of protrusions are formed on the predetermined portion of the first conductive semiconductor layer, which is exposed as the growth substrate and the first buffer layer are separated from the light emitting structure layer.
14. The method of claim 13, wherein the first conductive semiconductor layer, which is exposed as the growth substrate and the first buffer layer are separated from the light emitting structure layer, includes a peripheral portion having a first height and a central portion surrounded by the peripheral portion and formed with the protrusions having a second height higher than the first height.
15. The method of claim 12, further comprising forming a second buffer layer on the first buffer layer before the light emitting structure layer is formed.
16. A light emitting device comprising:
a light emitting structure layer including a first conductive semiconductor layer, a second conductive semiconductor layer and an active layer interposed between the first and second conductive semiconductor layers,
wherein a first surface of the first conductive semiconductor layer faces the active layer and a plurality of protrusions are formed on a second surface of the first conductive semiconductor layer, and
wherein the second surface of the first conductive semiconductor layer includes a peripheral portion and a central portion surrounded by the peripheral portion, and the protrusions are formed on the central portion while being spaced apart from each other.
17. The light emitting device of claim 16, further comprising a first buffer layer under the first conductive semiconductor layer and a growth substrate under the first buffer layer, wherein at least a part of the first buffer layer is disposed between the protrusions.
18. The light emitting device of claim 17, wherein the first buffer layer is partially formed between the first conductive semiconductor layer and the growth substrate.
19. The light emitting device of claim 17, further comprising a second buffer layer between the first conductive semiconductor layer and the first buffer layer.
20. The light emitting device of claim 16, further comprising a first electrode under the first conductive semiconductor layer and a second electrode layer under the second conductive semiconductor layer.