1. A method for configuring a signal path within a digital integrated circuit, comprising:
transmitting an output from a first module;
receiving the output at a second module;
conveying the output from the first module to the second module by using a configurable signal path, wherein the configurable signal path is variable by selectively including at least one latch, and wherein the first module, the second module, and the configurable signal path use a common clock for a single time domain.
2. The method of claim 1, wherein a control module is used to selectively include the at least one latch onto the configurable signal path.
3. The method of claim 2, wherein the control module is configured to include the at least one latch onto the configurable signal path to increase a clock frequency of the configurable signal path.
4. The method of claim 3, wherein the control module is configured to include a variable number of latches onto the configurable signal path to accommodate a variable increase of the clock frequency of the configurable signal path.
5. The method of claim 1, wherein the digital integrated circuit comprises a logic unit having a plurality of logic modules, and wherein a corresponding plurality of configurable signal paths couple the logic modules into a pipeline.
6. The method of claim 1, wherein the latch comprises a storage element and a multiplexer configured to selectively couple the storage element to the configurable signal path in accordance with a control signal.
7. The method of claim 1, wherein the first module comprises a first portion of a cache memory and the second module comprises a second portion of the cache memory.
8. A digital integrated circuit having a configurable signal path, comprising:
a first module configured to transmit an output;
a second module configured to receive the output;
a configurable signal path for conveying the output from the first module to the second module, wherein the configurable signal path is variable by selectively including at least one latch, and wherein the first module, the second module, and the configurable signal path use a common clock comprising a single time domain.
9. The digital integrated circuit of claim 8, wherein a control module operates with a software based algorithm to dynamically include the at least one latch onto the configurable signal path.
10. The digital integrated circuit of claim 9, wherein the control module is configured to include the at least one latch onto the configurable signal path to increase a clock frequency of the configurable signal path.
11. The digital integrated circuit of claim 10, wherein the control module is configured to include a variable number of latches onto the configurable signal path to accommodate a variable increase of the clock frequency of the configurable signal path.
12. The digital integrated circuit of claim 8, wherein the digital integrated circuit comprises a logic unit having a plurality of logic modules, and wherein a corresponding plurality of configurable signal paths couple the logic modules into a pipeline.
13. The method of claim 8, wherein the first module comprises a first portion of a cache memory and the second module comprises a second portion of the cache memory.
14. A method for configuring a signal path within a digital integrated circuit, comprising:
transmitting an output from a first module;
receiving the output at a second module;
selectively including at least one storage element onto a configurable signal path, wherein a control module is used to selectively include the at least one storage element onto the configurable signal path;
conveying the output from the first module to the second module by using the configurable signal path, wherein the first module, the second module, and the configurable signal path use a common clock comprising a single time domain.
15. The method of claim 14, wherein a control module is configured to remove a variable number of storage elements from the configurable signal path to accommodate a variable decrease of the clock frequency of the configurable signal path.
16. The method of claim 14, wherein the digital integrated circuit comprises a cache memory.
17. The method of claim 14, wherein the digital integrated circuit comprises a logic unit having a plurality of logic modules, and wherein a corresponding plurality of configurable signal paths couple the logic modules into a pipeline.
18. The method of claim 14, wherein a software based algorithm is used to dynamically include the at least one storage element onto the configurable signal path to increase a clock frequency of the configurable signal path.
19. A circuit comprising configurable signal path circuit for implementing a configurable signal path to convey an output from a first module to a second module, wherein the configurable signal path is variable by selectively including at least one latch, and wherein the first module, the second module, and the configurable signal path circuit use a common clock comprising a single time domain.
20. The circuit of claim 19, further comprising a control module for operating in accordance with an algorithm to dynamically include the at least one latch onto the configurable signal path.
21. The circuit of claim 20, wherein the control module is configured to include the at least one latch onto the configurable signal path to increase a clock frequency of the configurable signal path.
22. The circuit of claim 20, wherein the control module is configured to include a variable number of latches onto the configurable signal path to accommodate a variable increase of the clock frequency of the configurable signal path.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An optoelectronic system for surface digitization of an object using spatiochromatic triangulation, said system comprising:
an illuminating subsystem for illuminating said object to be measured across a measuring space; and
a viewing subsystem for collecting the light reflected by said object in said measuring space and for generating a three-dimensional topography of said object using in depth chromatic coding of said object.
2. The optoelectronic system of claim 1 wherein said illuminating subsystem includes:
a polychromatic light source;
a source slit illuminated by said light source;
optics for imaging said light source onto said source slit; and
a dispersing element for passing said slit image into said measuring space with a continuum of monochromatic images, wherein said object located in said measuring space.
3. The optoelectronic system of claim 2 wherein said viewing subsystem includes an imaging spectrograph having a viewing slit for forming an image plane, whereby an image of the surface of said object aligns with said image plane, and an imaging array located in said image plane for registering said image.
4. The optoelectronic system of claim 3 further comprising relay optics positioned in said image plane for projecting said image onto said viewing slit.
5. The optoelectronic system of claim 3 further comprising an image processor coupled to said imaging array for processing said registered image into a digitized contour line.
6. The optoelectronic system of claim 1 further comprising a mechanical means for translating said object within said measuring space, wherein said object is fastened to said mechanical means, and an electronic controller for driving and synchronizing said mechanical means.
7. The optoelectronic system of claim 3 wherein a z-axis is defined in said measuring space along the depth dimension of said object, wherein said source slit and said viewing slit are in parallel alignment by rotating said viewing subsystem 90 about said z-axis, thereby utilizing the entire spectrum of wavelengths from said light source to determine a depth measurement of said object.
8. The optoelectronic system of claim 3 wherein said viewing subsystem includes:
a first beam splitter interposed in said image plane between said viewing slit and said dispersing element for generating a direct slit image; and
at least one imaging array for viewing both a dispersed image having passed through said dispersing element and said direct slit image, whereby said direct slit image is used to compensate for apparent wavelength shifts in said dispersed image.
9. An optoelectronic device for surface digitization of an object using spatiochromatic triangulation, said device comprising:
a polychromatic light source;
relay optics positioned in an illuminating plane of said light source for imaging said light source onto a source slit;
a concave diffraction grating for illuminating a measuring space with a continuum of monochromatic images along a measuring cutting plane providing in depth chromatic coding of said object, wherein said object located in said measuring space;
an imaging spectrograph having a viewing slit whose image plane aligns with an image generated by the intersection of said cutting plane and the surface of said object; and
a grayscale imaging array located in said image plane of said spectrograph for registering said image.
10. The optoelectronic system of claim 9 wherein said source slit is further defined as a pinhole for forming point images.
11. The optoelectronic system of claim 9 further comprising a telecentric relay lens for projecting said image onto said viewing slit.
12. The optoelectronic system of claim 9 further comprising a relay lens for projecting said image onto said viewing slit and an image processor for correcting perspective distortion.
13. The optoelectronic system of claim 9 further comprising an image processor coupled to said imaging array for processing said registered image using spectrophotometric analysis and generating a digitized contour line from said object.
14. The optoelectronic system of claim 9 further comprising a mechanical means for translating said object within said measuring space and an electronic controller for driving and synchronizing said mechanical means, wherein said object is fastened to said mechanical means and by translating said object a plurality of images are registered along successive parallel cutting planes to reconstruct a topography of said object.
15. A method for surface digitization of an object using spatiochromatic triangulation, comprising the steps of:
imaging a light source onto a source slit;
illuminating a measuring space with a continuum of monochrormatic images by passing said slit image through a dispersing element;
providing in depth chromatic coating of said object, wherein said object located in said measuring space; and
registering an image of the surface of said object which aligns with image plane of an image spectrograph.
16. The method of claim 15 wherein said imaging spectrograph includes an imaging array located in said image plane for registering said image.
17. The method of claim 15 further comprising the step of generating a digitized contour line from said object using spectrophotometric analysis.
18. The method of claim 17 wherein an image processor is coupled to said imaging array for processing said image into a digitized contour line.
19. The method of claim 15 further comprising the step of translating said object within a measuring space using a mechanical means, whereby translating said object a plurality of images are registered along successive parallel cutting planes to reconstruct a topography of said object.