All The Claims

1. A radiation-emitting semiconductor chip, comprising:
a semiconductor body having a semiconductor layer sequence comprising an active region for generating radiation, said active region being arranged between a first semiconductor layer and a second semiconductor layer;
a carrier comprising a major surface facing the semiconductor body;
a first contact;
a second contact; and
a protection diode formed in a current path extending between the first contact and the second contact through the carrier, the protection diode being a Schottky diode formed between the first contact and the carrier;
wherein the first semiconductor layer is arranged on a side of the active region facing the major surface of the carrier and is electrically contactable by the first contact; and
wherein the second semiconductor layer is electrically contactable by the second contact.
2. The semiconductor chip according to claim 1, wherein the protection diode is embodied as a metal-semiconductor junction, and wherein the major surface forms the metal-semiconductor junction.
3. The semiconductor chip according to claim 1, wherein the semiconductor body is cohesively connected to the carrier.
4. The semiconductor chip according to claim 1, wherein the first contact is arranged on the major surface of the carrier.
5. The semiconductor chip according to claim 1, wherein the first contact and the second contact are arranged on opposing sides of the carrier.
6. The semiconductor chip according to claim 1, wherein a first connection layer is arranged between the semiconductor body and the carrier; and wherein the first semiconductor layer is connected electrically conductively with the first connection layer.
7. The semiconductor chip according to claim 6, wherein the first connection layer comprises an injection layer and a transition layer, the injection layer adjoining the semiconductor body and the transition layer adjoining the carrier.
8. The semiconductor chip according to claim 7, wherein the protection diode is formed by the transition layer.
9. The semiconductor chip according to claim 1, wherein the semiconductor body comprises at least one recess extending through the active region and provided for electrical contacting the second semiconductor layer.
10. A radiation-emitting semiconductor chip, comprising:
a semiconductor body having a semiconductor layer sequence comprising an active region for generating radiation, said active region being arranged between a first semiconductor layer and a second semiconductor layer;
a carrier comprising a major surface facing the semiconductor body;
a first contact;
a second contact; and
a protection diode formed in a current path extending between the first contact and the second contact through the carrier;
wherein the first semiconductor layer is arranged on a side of the active region facing the major surface of the carrier and is electrically contactable by the first contact;
wherein the second semiconductor layer is electrically contactable by the second contact; and
wherein the semiconductor body comprises at least one recess extending through the active region and provided for electrical contacting the second semiconductor layer.
11. The semiconductor chip according to claim 10, wherein the second semiconductor layer is connected electrically conductively to a second connection layer; and wherein the second connection layer extends through the recess.
12. The semiconductor chip according to claim 11, wherein a first connection layer is arranged between the semiconductor body and the carrier;
wherein the first semiconductor layer is connected electrically conductively with the first connection layer; and
wherein the second connection layer is formed in places between the first connection layer and the carrier.
13. The semiconductor chip according to claim 1, wherein the protection diode overlaps with the first contact when the semiconductor chip is viewed in plan view.
14. The semiconductor chip according to claim 1, wherein the carrier contains a semiconductor material.
15. The semiconductor chip according to claim 1, wherein a growth substrate for the semiconductor layer sequence of the semiconductor body has been removed.
16. A radiation-emitting semiconductor chip, comprising:
a semiconductor body having a semiconductor layer sequence comprising an active region for generating radiation, said active region being arranged between a first semiconductor layer and a second semiconductor layer;
a carrier comprising a major surface facing the semiconductor body;
a first contact;
a second contact; and
a protection diode formed in a current path extending between the first contact and the second contact through the carrier;
wherein the first semiconductor layer is arranged on a side of the active region facing the major surface of the carrier and is electrically contactable by the first contact;
wherein the second semiconductor layer is electrically contactable by the second contact; and
wherein the first contact is arranged on the major surface of the carrier.
17. A radiation-emitting semiconductor chip, comprising:
a semiconductor body having a semiconductor layer sequence comprising an active region for generating radiation, said active region being arranged between a first semiconductor layer and a second semiconductor layer;
a carrier comprising a major surface facing the semiconductor body;
a first contact;
a second contact; and
a protection diode formed in a current path extending between the first contact and the second contact through the carrier;
wherein the first semiconductor layer is arranged on a side of the active region facing the major surface of the carrier and is electrically contactable by the first contact;
wherein the second semiconductor layer is electrically contactable by the second contact;
wherein a first connection layer is arranged between the semiconductor body and the carrier;
wherein the first semiconductor layer is connected electrically conductively with the first connection layer;
wherein the first connection layer comprises an injection layer and a transition layer, the injection layer adjoining the semiconductor body and the transition layer adjoining the carrier; and
wherein the protection diode is formed by the transition layer.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A receiving device for receiving an overlaid receiving signal corresponding to a superposition of a first and a second transmitting signals, respectively, transmitted by a first transmitter and a second transmitter arranged remote from the first transmitter, wherein the first and the second transmitting signals lie in the same frequency band, wherein the first transmitting signal is generated, using a first transmitting subgroup of code units, wherein the second transmitting signal is generated using a second transmitting subgroup of code units, wherein the first transmitting subgroup of code units and the second transmitting subgroup of code units together represent a plurality of code units which were generated by a redundancy-adding encoding from an information word with a plurality of information units, comprising:
a sampler for sampling the overlaid receiving signal synchronously to the first transmitter in order to obtain a first receiving signal associated with the transmitted first transmitting signal, and for sampling the overlaid receiving signal synchronously to the second transmitter in order to obtain a second receiving signal associated with the transmitted second transmitting signal;
a decoder for decoding the first and the second receiving signal in order to obtain a first receiving subgroup of code units associated with the first transmitting subgroup of code units, and to decode the first and the second receiving signal in order to obtain a second receiving subgroup of code units associated with the second transmitting subgroup of code units;
a calculator for calculating a first interference signal using the second receiving subgroup of code units and a second interference signal using the first receiving subgroup of code units;
an interference reducer for combining the first interference signal with the first receiving signal and for combining the second interference signal with the second receiving signal in order to obtain an improved first receiving signal and an improved second receiving signal; and
a controller for controlling the decoder so that the decoder decodes the improved first receiving signal and the improved second receiving signal and outputs the information word with the plurality of information units based on the improved first receiving signal and the improved second receiving signal.
2. The receiving device according to claim 1,
wherein the controller is implemented in order to control the interference reducer and the calculator so that the calculator calculates a further improved first and second information signal using the improved first receiving signal and the improved second receiving signal by means of one or several iteration steps, and in order to control the decoder in order to obtain the information word with the plurality of information unite using the further improved first receiving and the further improved second receiving signal.
3. The receiving device according to claim 1, wherein the decoder comprises:
a mapper for converting the first receiving signal or the second receiving signal into pre-decoding probabilities for the first receiving subgroup of code units and for the second receiving subgroup of code units;
a soft-in-soft-out decoder for calculating a post-decoding probability for the first and the second receiving subgroup of code units; and
an estimator for estimating the first and the second receiving subgroups on the basis of the post-decoding probability for the first and the second receiving subgroup of code units.
4. The receiving device according to claim 3, wherein the soft-in-soft-out decoder is a BCJR decoder (BCJR=Bahl Cocke Jelinek Raviv).
5. The receiving device according to claim 3,
wherein an interleaving function is present when generating the first and the second transmitting signal, and
wherein the decoder further comprises:
a de-interleaver for cancelling the interleaving function for the first or the second transmitting signal, wherein the de-interleaver is connected between the mapper and the decoder; and
an interleaver which is implemented in order to perform the same inter leaving function, wherein the interleaver is arranged between the decoder and the estimator.
6. The receiving device according to claim 3,
wherein the mapper is implemented in order to operate using page information from a preceding iteration step, and
wherein the page information is extrinsic probabilities derived from the post-decoding probabilities.
7. The receiving device according to claim 6,
wherein the sampler is implemented in order to be synchronized using a predetermined training sequence from the first transmitter and a predetermined training sequence from the second transmitter.
8. The receiving device according to claim 3,
wherein the calculator further comprises:
weighting unit for weighting the second receiving subgroup of code units or a modulation symbol with a channel characteristic derived from the second receiving subgroup of code units, in order to obtain a weighted second receiving subgroup or a weighted modulation symbol;
a second unit for weighting the first receiving subgroup of code units or a modulation symbol with a channel characteristic derived from the first receiving subgroup, in order to obtain a weighted first receiving subgroup or a weighted modulation symbol.
9. A receiving device according to claim 3,
wherein the mapper is a QPSK demapper (QPSK=Quaternary Phase Shift Keying), and
wherein the estimator is an MMSE estimator (MMSE=Minimum Mean Squared Error).
10. A method for receiving an overlaid receiving signal corresponding to an overlay of a transmitted first and second transmitting signals, respectively, by a first transmitter and by a second transmitter which is arranged remote from the first transmitter, wherein the first and the second transmitting signals lie in the same frequency band, wherein the first transmitting signal is generated using a first transmitting subgroup of code units, wherein the second transmitting signal is generated using a second transmitting subgroup of code units, wherein the first transmitting subgroup of code units and the second transmitting subgroup of code units together represent a plurality of code units which were generated by a redundancy-adding encoding from an information word with a plurality of information units, comprising:
sampling the overlaid receiving signal synchronously to the first transmitter in order to obtain a first receiving signal associated with the transmitted first transmitting signal;
sampling the overlaid receiving signal synchronously to the second transmitter in order to obtain a second receiving signal associated with the transmitted second transmitting signal;
decoding the first and the second receiving signal in order to obtain a first receiving subgroup of code units associated with the first transmitting subgroup of code units;
decoding the first and the second receiving signal in order to obtain a second receiving subgroup of code units associated with the second transmitting subgroup of code units;
calculating a first interference signal using the second receiving subgroup of code units and a second interference signal using the first receiving subgroup of code units;
combining the first interference signal with the first receiving signal and combining the second interference signal with the second receiving signal in order to obtain an improved first receiving signal and an improved second receiving signal in order to obtain an interference reduction; and
decoding the improved first receiving signal and the improved second receiving signal and outputting the information word of the plurality of information units based on the improved first receiving signal and the improved second receiving signal.

1-46. (canceled)
47. A method, comprising:
receiving input image data,
performing a first transform to said input image data in a first direction to obtain first transformed image data,
performing a transposing operation to said first transformed image data to obtain first transposed image data,
performing a second transform to said first transposed image data, said second transform in a second direction, to obtain second transformed image data.
48. A method according to claim 47, comprising:
performing said first transform and said second transform in a processor in a parallel manner, and
performing transposing operation at least partially using registers of said processor.
49. A method according to claim 48, comprising:
performing said transposing operation by swapping element values of registers in register pairs iteratively such that individual element values are moved to transpose positions with respect to the image block being processed.
50. A method according to claim 47, comprising:
performing a transposing operation to said second transformed image data.
51. A method according to claim 47, wherein said input image data is an image block of a larger image, and said larger image is processed in a block-by-block manner, and said method comprises:
performing a block transposing operation to said second transformed image data with respect to the larger image.
52. A method according to claim 47, comprising:
processing said second transformed image data thereby causing said input image data to be filtered, and
forming an inverse transform of the processed second transformed image data to obtain filtered image data.
53. A method according to claim 47, wherein said first and second transforms are performed in a processor having a single instruction multiple data (SIMD) architecture.
54. An apparatus comprising at least one processor, memory including computer program code, the memory and the computer program code configured to, with the at least one processor, cause the apparatus to perform at least the following:
receive input image data for processing in a computer system,
perform a first transform to said input image data, said transform in a first direction, to obtain first transformed image data,
perform a transposing operation to said first transformed image data to obtain first transposed image data,
perform a second transform to said first transposed image data, said second transform in a second direction, to obtain second transformed image data.
55. An apparatus according to claim 54, comprising computer program code to cause the apparatus to:
perform said first transform and said second transform in a processor each in a parallel manner, and
perform said transposing operation at least partially using registers of said processor.
56. An apparatus according to claim 55, comprising computer program code to cause the apparatus to:
perform said transposing operation by swapping element values of registers in register pairs iteratively such that individual element values are moved to transpose positions with respect to the image block being processed.
57. An apparatus according to claim 54, comprising computer program code to cause the apparatus to:
perform a transposing operation to said second transformed image data.
58. An apparatus according to claim 54, wherein said input image data is an image block of a larger image, and said larger image is processed in a block-by-block manner, and said apparatus comprises computer program code to cause the apparatus to:
perform a block transposing operation to said second transformed image data with respect to the larger image data.
59. An apparatus according to claim 54, comprising computer program code to cause the apparatus to:
process said second transformed image data and thereby to cause said input image data to be filtered, and
form an inverse transform of the processed second transformed image data to obtain filtered image data.
60. An apparatus according to claim 54, wherein said first and second transforms are arranged to be performed in a processor of the apparatus having a single instruction multiple data (SIMD) architecture.
61. A computer program product embodied on a non-transitory computer readable medium, comprising computer program code configured to, when executed on at least one processor, cause an apparatus or a system to:
receive input image data for processing in a computer system,
perform a first transform to said input image data, said transform in a first direction, to obtain first transformed image data,
perform a transposing operation to said first transformed image data to obtain first transposed image data,
perform a second transform to said first transposed image data, said second transform in a second direction, to obtain second transformed image data.
62. A computer program product according to claim 61, comprising computer program code to cause the apparatus or system to:
perform said first transform and said second transform in a processor each in a parallel manner, and
perform said transposing operation at least partially using registers of said processor.
63. A computer program product according to claim 62, comprising computer program code to cause the apparatus or system to:
perform said transposing operation by swapping element values of registers in register pairs iteratively such that individual element values are moved to transpose positions with respect to the image block being processed.
64. A computer program product according to claim 61, comprising computer program code to cause the apparatus or system to:
perform a transposing operation to said second transformed image data.
65. A computer program product according to claim 61, wherein said input image data is an image block of a larger image, and said larger image is processed in a block-by-block manner, and said computer program product comprises computer program code to cause the apparatus or system to:
perform a block transposing operation to said second transformed image data with respect to the larger image data.
66. A computer program product according to claim 61, comprising computer program code to cause the apparatus or system to:
process said second transformed image data and thereby to cause said input image data to be filtered, and
form an inverse transform of the processed second transformed image data to obtain filtered image data.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A power amplifier module comprising:
a power supply input configured to receive a supply voltage from a supply control module;
a first power amplifier die including a first supply input configured to receive the supply voltage, the first power amplifier die configured to amplify at least a first RF signal;
a second power amplifier die including a second supply input configured to receive the supply voltage, the second power amplifier die configured to amplify at least a second RF signal;
a first inductor and a first capacitor electrically connected in parallel, the first inductor and the first capacitor electrically connected between the power supply input and the first supply input of the first power amplifier die; and
a second inductor and a second capacitor electrically connected in parallel, the second inductor and the second capacitor electrically connected between the power supply input and the second supply input of the second power amplifier die.
2. The power amplifier module of claim 1 wherein the first capacitor and the first inductor have a resonance near a center frequency of the first RF signal.
3. The power amplifier module of claim 1 wherein the first inductor includes a surface mount inductor and the first capacitor includes a surface mount capacitor.
4. The power amplifier module of claim 1 wherein the first inductor includes a spiral inductor associated with a carrier substrate of the power amplifier module, and the first capacitor includes a surface mount capacitor.
5. The power amplifier module of claim 1 wherein the first power amplifier die includes an input stage including a first bipolar transistor and a power amplifier including a second bipolar transistor, the first and second bipolar transistors configured to provide amplification to the first RF signal, the first inductor and the first capacitor electrically connected between the power supply input and a collector of the second bipolar transistor.
6. The power amplifier module of claim 5 further comprising a third inductor and a third capacitor electrically connected in parallel, the third inductor and the third capacitor electrically connected between the power supply input and a collector of the first bipolar transistor.
7. A mobile device comprising:
a phone board;
a first power amplifier module disposed on the phone board and including a first supply input configured to receive a supply voltage, the first power amplifier module configured to amplify at least a first radio frequency (RF) signal;
a second power amplifier module disposed on the phone board and including a second supply input configured to receive the supply voltage, the second power amplifier module configured to amplify at least a second RF signal;
a supply control module disposed on the phone board and including a supply output configured to generate the supply voltage, the supply control module configured to control a voltage level of the supply voltage;
a first inductor and a first capacitor electrically connected in parallel, the first inductor and the first capacitor electrically connected between the supply output of the supply control module and the first supply input of the first power amplifier module; and
a second inductor and a second capacitor electrically connected in parallel, the second inductor and the second capacitor electrically connected between the supply output of the supply control module and the second supply input of the second power amplifier module.
8. The mobile device of claim 7 wherein the supply control module includes an envelope tracking module configured to control the voltage level of the supply voltage based at least on an envelope of the first RF signal and on an envelope of the second RF signal.
9. The mobile device of claim 7 wherein the first capacitor and the first inductor have a resonance near a center frequency of the first RF signal.
10. The mobile device of claim 9 wherein an impedance of the first capacitor and the first inductor is greater than about 200\u03a9 over a transmission band of the first RF signal.
11. The mobile device of claim 9 wherein the second capacitor and the second inductor have a resonance near a center frequency of the second RF signal.
12. The mobile device of claim 7 further comprising:
a third power amplifier module disposed on the phone board and including a third supply input configured to receive the supply voltage, the third power amplifier module configured to amplify at least a third RF signal; and
a third inductor and a third capacitor electrically connected in parallel, the third inductor and the third capacitor electrically connected between the supply output of the supply control module and the third supply input of the third power amplifier module.
13. The mobile device of claim 12 wherein the first RF signal includes a Band I signal or a Band II signal, the second RF signal includes a Band V signal or a Band VIII signal, and the third RF signal includes a Band IV signal.
14. The mobile device of claim 7 wherein the first inductor includes a surface mount inductor of the first power amplifier module, and the first capacitor includes a surface mount capacitor of the first power amplifier module.
15. The mobile device of claim 7 wherein the first inductor includes a spiral inductor of the first power amplifier module, and the first capacitor includes a surface mount capacitor of the first power amplifier module.
16. The mobile device of claim 7 further comprising an RF front end module disposed on the phone board, the RF front end module configured to generate a multiplexed signal based on multiplexing a plurality of RF signals including the first RF signal and the second RF signal.
17. The mobile device of claim 16 further comprising an antenna configured to receive the multiplexed signal.
18. A method of power supply control in a power amplifier system, the method comprising:
controlling a voltage level of a supply voltage using a supply control module;
amplifying a first RF signal using a first power amplifier module;
amplifying a second RF signal using a second power amplifier module;
delivering the supply voltage to a first supply input of the first power amplifier module through a first resonant circuit, the first resonant circuit including a first inductor and a first capacitor electrically connected in parallel; and
delivering the supply voltage to a second supply input of the second power amplifier module through a second resonant circuit, the second resonant circuit including a second inductor and a second capacitor electrically connected in parallel.
19. The method of claim 18 wherein controlling the voltage level of the supply voltage includes controlling the voltage level of the supply voltage based at least on an envelope of the first RF signal and on an envelope of the second RF signal.
20. The method of claim 18 further comprising resonating the first capacitor and the first inductor near a center frequency of the first RF signal.