All The Claims

1. In a direct-sequence CDMA system, apparatus having a processor to efficiently perform matrix multiplication, said apparatus comprising:
a pre-computation module that generates a matrix of partial results from an input matrix and an input vector by, in part, grouping elements along a second dimension of said input matrix; and
a post-computation module that sums along a first dimension of said matrix of partial results in a time-shared manner to form a vector of full matrix multiplication results as partial results in said matrix of partial results become available from said pre-computation module, wherein said vector of full matrix multiplication results comprises coded information for transmission over a wireless medium to one or more receivers.
2. The apparatus of claim 1, comprising a time-shared accumulator module, shared between said pre-computation module and said post-computation module, that accumulates said partial results and said full matrix multiplication results.
3. The apparatus of claim 1, comprising an analog-to-digital converter that digitizes said input vector before use by said pre-computation module.
4. The apparatus of claim 1, comprising an ingresschannel cancellation filter that filters said input vector before use by said pre-computation module.
5. The apparatus of claim 1, comprising a vector register that stores said vector of full matrix multiplication results.
6. The apparatus of claim 1, wherein said input matrix comprises a matrix of direct-sequence codes.
7. The apparatus of claim 1, wherein said input matrix comprises an inverse matrix of direct-sequence codes.
8. The apparatus of claim 1, wherein said input vector comprises a vector of uncoded symbols.
9. The apparatus of claim 1, wherein said input vector comprises a vector of coded symbols.
10. The apparatus of claim 1, wherein each element of said input matrix comprises a value of +1 or \u22121.
11. The apparatus of claim 1, wherein said grouping elements comprises performing an optimal grouping based on tradeoffs between performance, power, cost, and hardware for said CDMA system.
12. The apparatus of claim 1, wherein said first dimension corresponds to a row dimension of said input matrix and said matrix of partial results.
13. The apparatus of claim 1, wherein said second dimension corresponds to a column dimension of said input matrix and said matrix of partial results.
14. A method for matrix multiplication within a direct-sequence CDMA system, the method comprising:
generating, using a pre-computation module within the CDMA system, a matrix of partial results from an input matrix and an input vector by, in part, grouping elements along a second dimension of said input matrix, wherein said input vector comprises symbols to be coded for transmission over a wireless medium; and
summing, using a post-computation module within the CDMA system, along a first dimension of said matrix of partial results in a time-shared manner to form a vector of full matrix multiplication results as partial results in said matrix of partial results become available from said pre-computation module, wherein said vector of full matrix multiplication results comprises coded information for transmission over said wireless medium to one or more receivers.
15. The method of claim 14, comprising accumulating said partial results and said full matrix multiplication results using a time-shared accumulator module shared between said pre-computation module and said post-computation module.
16. The method of claim 14, comprising digitizing, using an analog-to-digital converter, said input vector before use by said pre-computation module.
17. The method of claim 14, comprising filtering, using an ingresschannel cancellation filter, said input vector before use by said pre-computation module.
18. The method of claim 14, comprising storing, using a vector register, said vector of full matrix multiplication results.
19. The method of claim 14, wherein said input matrix comprises a matrix of direct-sequence codes.
20. The method of claim 14, wherein said input matrix comprises an inverse matrix of direct-sequence codes.
21. The method of claim 14, wherein said input vector comprises a vector of uncoded symbols.
22. The method of claim 14, wherein said input vector comprises a vector of coded symbols.
23. The method of claim 14, wherein each element of said input matrix comprises a value of +1 or \u22121.
24. The method of claim 14, wherein said grouping elements comprises performing an optimal grouping based on tradeoffs between performance, power, cost, and hardware for said CDMA system.
25. The method of claim 14, wherein said first dimension corresponds to a row dimension of said input matrix and said matrix of partial results.
26. The method of claim 14, wherein said second dimension corresponds to a column dimension of said input matrix and said matrix of partial results.
27. A machine-readable storage having stored thereon, a computer program having at least one code section for matrix multiplication within a direct-sequence CDMA system, the at least one code section being executable by a machine for causing the machine to perform steps comprising:
generating, using a pre-computation module within the CDMA system, a matrix of partial results from an input matrix and an input vector by, in part, grouping elements along a second dimension of said input matrix, wherein said input vector comprises symbols to be coded for transmission over a wireless medium; and
summing, using a post-computation module within the CDMA system, along a first dimension of said matrix of partial results in a time-shared manner to form a vector of full matrix multiplication results as partial results in said matrix of partial results become available from said pre-computation module, wherein said vector of full matrix multiplication results comprises coded information for transmission over said wireless medium to one or more receivers.
28. The machine-readable storage of claim 27, wherein said at least one code section comprises code for accumulating said partial results and said full matrix multiplication results using a time-shared accumulator module shared between said pre-computation module and said post-computation module.
29. The machine-readable storage of claim 27, wherein said at least one code section comprises code for digitizing, using an analog-to-digital converter, said input vector before use by said pre-computation module.
30. The machine-readable storage of claim 27, wherein said at least one code section comprises code for filtering, using an ingresschannel cancellation filter, said input vector before use by said pre-computation module.
31. The machine-readable storage of claim 27, wherein said at least one code section comprises code for storing, using a vector register, said vector of full matrix multiplication results.
32. The machine-readable storage of claim 27, wherein said input matrix comprises a matrix of direct-sequence codes.
33. The machine-readable storage of claim 27, wherein said input matrix comprises an inverse matrix of direct-sequence codes.
34. The machine-readable storage of claim 27, wherein said input vector comprises a vector of uncoded symbols.
35. The machine-readable storage of claim 27, wherein said input vector comprises a vector of coded symbols.
36. The machine-readable storage of claim 27, wherein each element of said input matrix comprises a value of +1 or \u22121.
37. The machine-readable storage of claim 27, wherein said grouping elements comprises performing an optimal grouping based on tradeoffs between performance, power, cost, and hardware for said CDMA system.
38. The machine-readable storage of claim 27, wherein said first dimension corresponds to a row dimension of said input matrix and said matrix of partial results.
39. The machine-readable storage of claim 27, wherein said second dimension corresponds to a column dimension of said input matrix and said matrix of partial results.
40. In a direct-sequence CDMA system, apparatus having a processor to efficiently perform matrix multiplication, said apparatus comprising:
at least one module that generates a matrix of partial results from an input matrix and an input vector by, in part, grouping elements along a second dimension of said input matrix; and
said at least one module sums along a first dimension of said matrix of partial results in a time-shared manner to form a vector of full matrix multiplication results as partial results in said matrix of partial results become available from said at least one module, wherein said vector of full matrix multiplication results comprises coded information for transmission over a wireless medium to one or more receivers.
41. The apparatus of claim 40, wherein said at least one module comprises a first module that performs said generating of said matrix, and a second module that performs said summing.
42. The apparatus of claim 41, wherein said first module comprises a pre-computation module and said second module comprises a post-computation module.
43. The apparatus of claim 41, comprising a time-shared accumulator module, shared between said first module and said second module, that accumulates said partial results and said full matrix multiplication results.
44. The apparatus of claim 40, comprising an analog-to-digital converter that digitizes said input vector before use by said at least one module.
45. The apparatus of claim 40, comprising an ingresschannel cancellation filter that filters said input vector before use by said at least one module.
46. The apparatus of claim 40, comprising a vector register that stores said vector of full matrix multiplication results.
47. The apparatus of claim 40, wherein said input matrix comprises a matrix of direct-sequence codes.
48. The apparatus of claim 40, wherein said input matrix comprises an inverse matrix of direct-sequence codes.
49. The apparatus of claim 40, wherein said input vector comprises a vector of uncoded symbols.
50. The apparatus of claim 40, wherein said input vector comprises a vector of coded symbols.
51. The apparatus of claim 40, wherein each element of said input matrix comprises a value of +1 or \u22121.
52. The apparatus of claim 40, wherein said grouping elements comprises performing an optimal grouping based on tradeoffs between performance, power, cost, and hardware for said CDMA system.
53. The apparatus of claim 40, wherein said first dimension corresponds to a row dimension of said input matrix and said matrix of partial results.
54. The apparatus of claim 40, wherein said second dimension corresponds to a column dimension of said input matrix and said matrix of partial results.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A semiconductor device in which a semiconductor layer is provided on a substrate including a metal base and said semiconductor layer is formed with at least a portion of an element, wherein said metal substrate comprises a metal base made of a first metal, a diffusion preventing layer adapted to prevent diffusion of the metal forming said metal base into said semiconductor layer, and a connecting metal layer made of a second metal for electrical connection between said metal base and said semiconductor layer.
2. A semiconductor device according to claim 1, wherein said semiconductor layer is made of a silicon crystal having a plane orientation selected from the group consisting of a {110} plane orientation, plane orientations equivalent to said plane orientation, a {511} plane, a {331} plane, a {221} plane, a {321} plane, a {531} plane, a {231} plane, a {351} plane, a {320} plane, a {230} plane, and plane orientations equivalent thereto.
3. A semiconductor device according to claim 1, wherein said semiconductor layer comprises a plurality of layers having different conductivity types.
4. A semiconductor device according to claim 1, wherein said first metal is Cu.
5. A semiconductor device according to claim 1, wherein said second metal is Ni.
6. A semiconductor device according to claim 1, wherein said diffusion preventing layer contains at least one of Ni, TaN, and TiN.
7. A semiconductor device according claim 1, wherein said diffusion preventing layer and said connecting metal layer are common layers made of the same metal.
8. A vertical-type semiconductor device in which a semiconductor layer is formed with at least a portion of an element, wherein said at least a portion of said element is formed in a silicon semiconductor layer having a plane orientation selected from the group consisting of a {110} plane orientation, a {511} plane, a {331} plane, a {221} plane, a {321} plane, a {531} plane, a {231} plane, a {351} plane, a {320} plane, a {230} plane, and plane orientations equivalent thereto.
9. A vertical-type semiconductor device according to claim 8, wherein said semiconductor layer formed with said at least a portion of said element comprises a plurality of semiconductor layer portions and an impurity profile of said semiconductor layer portions contacting each other represents substantially stepwise joining.
10. A vertical-type semiconductor device according to claim 8, wherein said element is an element selected from the group consisting of a bipolar transistor, a vertical-type MOSFET, an IGBT, a thyristor, and a GTO.
11. A vertical-type semiconductor device according to claim 8, wherein said semiconductor layer is the semiconductor layer provided on the substrate according to claim 1.
12. A vertical-type semiconductor device according to claim 11, wherein said semiconductor layer portion contacting said substrate has a thickness of 20 \u03bcm or less.
13. A vertical-type semiconductor device according to claim 8, wherein a plurality of elements having different polarities are separated from each other by an element separating region and at least portions of said plurality of elements are formed in the same semiconductor layer.
14. A manufacturing method of a semiconductor device having a plurality of semiconductor layers with different conductivity types on a metal substrate, said manufacturing method comprising:
a step of forming porous silicon on a silicon substrate, a step of epitaxially growing semiconductor layers having a plurality of conductivity types on said porous silicon,
a step of bonding together said epitaxial silicon layers and a metal substrate, and
a step of cutting off, from a substrate in which said metal substrate and a semiconductor substrate having said epitaxial silicon layers are bonded together, said semiconductor substrate at an interface between said epitaxial silicon layers and said porous silicon layer.
15. A manufacturing method of a semiconductor device having a plurality of semiconductor layers with different conductivity types on a metal substrate, said manufacturing method comprising:
a step of forming porous silicon on a silicon substrate, a step of epitaxially growing semiconductor layers alternately in divided regions, said semiconductor layers having a plurality of conductivity types and adjacent to each other in a horizontal direction with respect to a substrate surface,
a step of bonding together said epitaxial silicon layers and a metal substrate, a step of cutting off, from a substrate in which said metal substrate and a semiconductor substrate having said epitaxial silicon layers are bonded together, said semiconductor substrate at an interface between said epitaxial silicon layers and said porous silicon layer, and
a step of forming an electrically-insulating element separating layer at a boundary of said regions.
16. A manufacturing method of a semiconductor device according to claim 14, wherein a temperature of said epitaxial growth is 600\xb0 C. or less.

1. A hybrid power relay for making and breaking an electrical circuit, comprising: electromagnetically operated contacts for making and breaking the circuit, a solid state switch connected across the contacts, means responsive to a control signal for actuating the solid state switch and the contacts such that the solid state switch closes before the contacts to make the circuit and the contacts open before the solid state switch to break the circuit, and means for monitoring the temperature of the solid state switch and opening the switch in the event of a rise in temperature produced by abnormal current flow in the switch due to failure of the contacts to make and maintain the circuit.
2. The hybrid power relay of claim 1 wherein the solid state switch comprises first and second silicon controlled rectifiers (SCRs) connected back-to-back across the contacts, with the cathode of the first SCR and the anode of the second SCR connected to one of the contacts and the anode of the first SCR and the cathode of the second SCR connected to the other contact.
3. The hybrid power relay of claim 1 wherein the control signal is a low voltage DC signal.
4. The hybrid power relay of claim 1 wherein the means for monitoring the temperature of the solid state switch includes a temperature sensitive element in proximity to the switch.
5. The hybrid power relay of claim 1 wherein the means for monitoring the temperature and opening the solid state switch includes a thermistor in proximity to the switch across which a voltage corresponding to the temperature of the switch is developed, and means for comparing the voltage across the thermistor with a reference voltage and opening the switch in the event that the voltage across the thermistor exceeds the reference voltage.
6. The hybrid power relay of claim 1 wherein the means for actuating the solid state switch and the contacts comprises a DC power supply connected to the solid state switch for biasing the switch to an ON state when energized, an operating coil for closing the contacts when energized, and a switching circuit responsive to the control signal for simultaneously applying operating power to the DC power supply and to the operating coil.
7. A hybrid power relay for making and breaking a three-phase electrical circuit, comprising: electromagnetically operated contacts for making and breaking each of the three-phases of the circuit, solid state switch connected across the contacts, means responsive to a control signal for actuating the solid state switches and the contacts such that the solid state switches close before the contacts to make the circuits and the contacts open before the solid state switches to break the circuits, and means for monitoring the temperature of the solid state switches and opening the switches in the event of a rise in temperature produced by abnormal current flow in the switches due to failure of the contacts to make and maintain the circuits.
8. The hybrid power relay of claim 7 wherein each of the solid state switches comprises first and second silicon controlled rectifiers (SCRs) connected back-to-back across the contacts, with the cathode of the first SCR and the anode of the second SCR connected to one of the contacts for the phase and the anode of the first SCR and the cathode of the second SCR connected to the other contact for the phase.
9. The hybrid power relay of claim 7 wherein the control signal is a low voltage DC signal.
10. The hybrid power relay of claim 7 wherein the means for monitoring the temperature of the solid state switches includes a temperature sensitive element in proximity to the switches.
11. The hybrid power relay of claim 7 wherein the means for monitoring the temperature and opening the solid state switches includes a thermistor in proximity to the switches across which a voltage corresponding to the temperature of the switches is developed, and means for comparing the voltage across the thermistor with a reference voltage and opening the switches in the event that the voltage across the thermistor exceeds the reference voltage.
12. The hybrid power relay of claim 7 wherein the means for actuating the solid state switch and the contacts comprises a DC power supply connected to the solid state switches for biasing the switches to an ON state when energized, an operating coil for closing the contacts when energized, and a switching circuit responsive to the control signal for simultaneously applying operating power to the DC power supply and to the operating coil.
13. A hybrid power relay for making and breaking an electrical circuit, comprising: electromagnetically operated contacts for making and breaking the circuit, first and second silicon controlled rectifiers (SCRs) connected back-to-back across the contacts, with the cathode of the first SCR and the anode of the second SCR connected to one of the contacts and the anode of the first SCR and the cathode of the second SCR connected to the other contact, a DC power supply, means including optocouplers connected to the power supply and to the control gates of the SCR(s for biasing the SCRs to an ON state when the power supply is energized, an operating coil for closing the contacts when energized, and a switching circuit responsive to the control signal for simultaneously applying operating power to the DC power supply and to the operating coil, with the SCRs turning on before the contacts close to make the circuit and the contacts opening before the SCRs turn off to break the circuit.
14. The hybrid power relay of claim 13 wherein the operating coil for the contacts and the power input the DC power supply are connected in parallel, and the switching circuit includes an additional pair of SCRs coupled back-to-back with each other and in series with an AC power source and the parallel connected operating coil and DC power supply, and optocouplers connected to the control gates of the additional SCRs for biasing the additional SCRs to an ON state to energize the operating coil and the DC power supply in response to the control signal.
15. The hybrid power relay of claim 13 including bidirectional transient voltage suppressors connected across the outputs of the optocouplers.
16. The hybrid power relay of claim 13 including means for monitoring the temperature of the SCRs and turning off the SCRs in the event of a rise in temperature produced by abnormal current flow in the SCRs due to failure of the contacts to make and maintain the circuit.
17. The hybrid power relay of claim 16 wherein the means for monitoring the temperature and turning off the SCRs includes a thermistor in proximity to the SCRs across which a voltage corresponding to the temperature of the SCRs is developed, and means for comparing the voltage across the thermistor with a reference voltage and turning off the SCRs in the event that the voltage across the thermistor exceeds the reference voltage.
18. A hybrid power relay comprising an electromechanical relay having contacts for making and breaking an electrical circuit and a coil for operating the contacts inside a housing with terminals outside the housing for connecting the contacts to line and load conductors and for connecting the operating coil to an AC power source, and a solid state switching module having a solid state switching device in a housing mounted to the contactor housing, with leads extending from the switching module to the line and load terminals to connect the solid state switching device electrically in parallel with the electromechanical relay contacts.
19. The hybrid power relay of claim 18 wherein the solid state switching module includes a DC power supply that supplies operating current for the solid state switching device and a control circuit for applying operating power to the DC power supply in response to a control signal, with leads extending from the module to the operating coil terminals and connecting the control circuit to the operating coil.
20. The hybrid power relay of claim 18 wherein the solid state switching module is mounted on top of the contactor housing.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A sounding tool for cheering, comprising:
a pair of right and left clapping bars each having a beating portion and a gripping portion connected to a basal portion of the beating portion; and
a hollow cover body having a shape imitating an object or a character for enhancing interest,
wherein both the clapping bars are pivotally connected at a portion between the beating portion and the gripping portion of each clapping bar so that the beating portions can be openedclosed freely,
wherein both the clapping bars are disposed between front and rear wall portions of the cover body so as to vertically penetrate the cover body with the cover body positioned at longitudinal intermediate positions of the clapping bars,
wherein right clapping bar guide groove portions and left clapping bar guide groove portions are provided, respectively, on a right side and a left side of an inner surface of each wall portion of the cover body so as to be vertically apart from each other,
wherein guide protruded portions are provided, respectively, on a front side and a rear side of each of the right and left clapping bars so as to be vertically apart from each other,
wherein the guide protruded portions of the right clapping bar and the guide protruded portions of the left clapping bar are fitted, respectively, in the right clapping bar guide groove portions and the left clapping bar guide groove portions of the cover body, whereby the guide protruded portions are moved along the guide groove portions to thereby guide the beating portions of the right and left clapping bars in opening and closing directions, and
wherein a stopper portion for restricting an opening movement of the beating portion of each of the right and left clapping bars is provided at an end portion of each guide groove portion.
2. A sounding tool for cheering, comprising:
a pair of right and left clapping bars each having a beating portion and a gripping portion connected to a basal portion of the beating portion; and
a hollow cover body having a shape imitating an object or a character for enhancing interest,
wherein both the clapping bars are pivotally connected at a portion between the beating portion and the gripping portion of each clapping bar so that the beating portions can be openedclosed freely,
wherein both the clapping bars are disposed between front and rear wall portions of the cover body so as to vertically penetrate the cover body with the cover body positioned at longitudinal intermediate positions of the clapping bars,
wherein right clapping bar guide protruded portions and left clapping bar guide protruded portions are provided, respectively, on a right side and a left side of an inner surface of each wall portion of the cover body so as to be vertically apart from each other,
wherein guide groove portions are provided, respectively, on a front side and a rear side of each of the right and left clapping bars so as to be vertically apart from each other,
wherein the right clapping bar guide protruded portions and the left clapping bar guide protruded portions of the cover body are fitted, respectively, in the guide groove portions of the right clapping bar and the guide groove portions of the left clapping bar, whereby the guide protruded portions are moved along the guide groove portions with respect to the guide groove portions to thereby guide the beating portions of the right and left clapping bars in opening and closing directions, and
wherein a stopper portion for restricting an opening movement of the beating portion of each of the right and left clapping bars is provided at an end portion of each guide groove portion.
3. The sounding tool for cheering as recited in claim 1 or 2,
wherein an elongated opening extending in the opening and closing directions of the beating portions of both the clapping bars is provided in an upper wall portion of the cover body, so that the beating portions of both the clapping bars protrude upwardly through the elongated opening,
wherein when the beating portions of the right and left clapping bars are moved along front and rear edge portions of the elongated opening, the beating portions of the right and left clapping bars are guided in the opening and closing directions, and
wherein when the beating portions of the right and left clapping bars collide with right and left edge portions of the elongated opening, opening movements of the beating portions of the right and left clapping bars are further restricted.
4. The sounding tool for cheering as recited in claim 1 or 2,
wherein the gripping portion of each of the right and left clapping bars is bent outward with respect to the beating portion,
wherein each of the right and left clapping bars is hollow and has a voice releasing opening at its tip end portion, and
wherein an embouchure hole is formed when the gripping portions of the clapping bars are joined with the beating portions of both the clapping bars opened, so that both the clapping bars can be used as a cheering megaphone.
5. The sounding tool for cheering as recited in claim 1 or 2,
wherein at least the beating portions of the right and left clapping bars are each shaped to imitate an object or a character for enhancing interest.