1460710482-8d39d08f-6616-46be-b2f2-8029d948b7be

1. A container for storing viscous food product, the container comprising:
side walls defining a container interior and an open mouth through which container contents may be accessed, the mouth configured to receive a corresponding container lid; and
a support base for placement within the container interior, the support base comprising a central platform and outer scraping edge, the support base of suitable size and shape to sealingly engage the container side walls;
a container base operatively attached to the side walls beneath the support base; and
means to advance the support base toward the container mouth so as to scrape container contents from the container side walls, thereby advancing said contents toward the container mouth.
2. The container as in claim 1 wherein the container base is rotatably attached to the side walls, and wherein rotation of the container base by the user drives rotation of a threaded rod within the container to raise the support base toward the open top.
3. The container as in claim 2 wherein the central platform of the support base includes a threaded aperture for engaging the threaded rod to effect travel of the support base within the container in response to rotation of the container base.
4. The container as in claim 3 wherein the threaded rod extends upward from the container base to a height that is less than 75% of the distance to the open top.
5. The container as in claim 1 wherein the container volume is at least one litre.
6. The container as in claim 1 wherein the means to raise the support base provides sufficient upward pressure to raise at least 50% of the container contents toward the open top when the container is used to store viscous food product.
7. The container as in claim 1 wherein the means to raise the support base provides sufficient upward pressure to raise 100% of the container contents toward the open top when the container is filled with viscous food product.
8. The container as in claim 1 that is of suitable size and strength so as to be fillable with at least 500 grams of viscous food product.
9. The container as in claim 1 wherein the scraping edge comprises an outwardly biased scraping lip for scraping viscous food product from the interior surface of the container side walls as the support base is raised.
10. The container as in claim 9 wherein the scraping lip is angled upward toward the open top of the container.
11. The container as in claim 9 wherein the scraping lip is tapered to direct scraped food product away from the container sides.
12. The container as in claim 9 wherein the distance between interior opposing side wall surfaces decreases with container height so as to narrow the container towards the open top, and wherein the outer scraping edge is formed of resilient material to accommodate such variation as the support base is advanced.
13. An emptying mechanism for integration within a viscous product storage container, the emptying mechanism comprising: a support base for placement within a container interior prior to filling of the container with viscous food product, the support base comprising a central platform and outer scraping edge, the support base of suitable size and shape to sealingly engage the container side walls; and means to raise the support base within the container interior as the container is emptied so as to scrape container contents from the container side walls and raise the container contents toward the open top.
14. A method for retrofitting a food storage container to incorporate an emptying mechanism, the method comprising the steps of:
placing a support base within the empty food storage container, the support base comprising a central platform and outer scraping edge of suitable size and shape to sealingly engage the container side walls;
attaching to the container user-actuated means for raising the support base within the container interior when the container is filled with viscous food product, enabling the user to raise said food product toward the open top.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A system for combined generation of In-phase (I) and Quadrature (Q) signal references according to a periodic input signal and selective phase interpolation of an output signal with reference thereto comprising:
a ring oscillator portion generating an oscillator signal, said ring oscillator portion including a plurality of delay stages interconnected in cascade to collectively execute an odd number of signal state inversions within a closed loop, said delay stages being configured to establish at respective nodes defined therebetween corresponding delayed versions of the oscillator signal successively shifted in phase by a predetermined phase difference; and
a signal injection portion coupled to said ring oscillator portion selectively applying to at least one said node a current bias according to the periodic input signal, said signal injection portion selectively adjusting each said current bias in amplitude, said signal injection portion thereby locking said oscillator signal in frequency to the periodic input signal and defining said I and Q references thereof with respect to the delayed version of said oscillator signal thereafter established at said current biased node.
2. The system as recited in claim 1, wherein said I reference of the periodic input signal is formed by said delayed oscillator signal version established at said current biased node responsive to said signal injection portion applying said current bias exclusively thereto.
3. The system as recited in claim 1, wherein said I reference of the periodic input signal is offset in phase between said delayed oscillator signal versions established at first and second nodes responsive to said signal injection portion concurrently applying said current bias at first and second current amplitudes respectively thereto, said I reference being thereby offset in phase in comparative relation to a ratio of said first and second current amplitudes.
4. The system as recited in claim 1, wherein the periodic input signal and said oscillator signal are each of differential signal type, and each of said delay stages includes a differential inverting amplifier having complementary outputs coupled to a complementary pair of said nodes, said delayed oscillator signal versions at said complementary node pair being mutually offset in phase by approximately 180\xb0.
5. The system as recited in claim 4, wherein said signal injection portion includes:
a current bias section including at least one current source selectively actuated to variably generate a plurality of biasing current signals for respective nodes between said delay stages; and,
an injection clock section coupled to said current bias section, said injection clock section including a plurality of switching devices actuated responsive to the periodic input signal to selectively couple said biasing current signals to corresponding ones of said nodes.
6. The system as recited in claim 5, wherein said signal injection portion is selectively actuated in single and split injection modes;
said signal injection portion in said single injection mode applying said current bias exclusively to one of said nodes, said delayed oscillator signal version established at said current biased node thereby forming said I reference of the periodic input signal; and,
said signal injection portion in said split injection mode applying said current bias concurrently to first and second ones of said nodes, said biasing current signal of said first node being applied at a first current amplitude, said biasing current signal of said second node being applied at a second current amplitude, said I reference being offset in phase between said delayed oscillator signal versions established at said first and second nodes in proportional relation to a ratio of said first and second current amplitudes.
7. The system as recited in claim 6, wherein said ring oscillator portion includes four said delay stages with said complementary outputs of said differential inverting amplifier in one delay stage being crossed for input to the next of said delay stages, said delayed oscillator signal versions established at said nodes of said ring oscillator portion thereby defining a plurality of phase interpolated signals successively offset one from the other in phase by said predetermined phase difference of approximately 45\xb0.
8. The system as recited in claim 6, wherein said signal injection portion includes a plurality of said current bias sections each selectively coupled to a corresponding one of said delay stages by said injection clock section, each said current bias section being selectively configured to variably define said biasing current signal in current amplitude.
9. The system as recited in claim 8, wherein said signal injection portion includes one said current bias section for each of said delay stages, each of said current bias sections being programmably controlled.
10. A system for combined generation of In-phase (I) and Quadrature (Q) signal references injection locked to a periodic injection signal and adjustable phase interpolation of an output signal with reference thereto comprising:
a ring oscillator portion generating an oscillator clock signal, said ring oscillator portion including a plurality of delay stages interconnected in cascade to collectively execute an odd number of signal state inversions within a closed loop, said delay stages being configured to establish at respective nodes defined therebetween corresponding delayed versions of the oscillator clock signal successively shifted in phase by a predetermined phase difference; and
a signal injection portion coupled to said ring oscillator portion selectively applying the periodic injection signal to at least one of said nodes for locking said oscillator signal thereto in frequency, said signal injection portion selectively varying a current amplitude of the periodic injection signal;
wherein said signal injection portion is selectively actuated in single and split injection modes;
said signal injection portion in said single injection mode applying the periodic injection signal exclusively to a selected one of said nodes, said delayed oscillator signal version thereafter established at the selected node thereby forming said I reference; and,
said signal injection portion in said split injection mode applying said periodic injection signal concurrently to first and second ones of said nodes, said periodic injection signal being applied to said first node at a first current amplitude and to said second node at a second current amplitude, said I reference being offset in phase between said delayed oscillator signal versions established at said first and second nodes in proportional relation to a ratio of said first and second current amplitudes.
11. The system as recited in claim 10, wherein said oscillator signal is of differential signal type, and each of said delay stages includes a differential inverting amplifier having complementary outputs coupled to a complementary pair of said nodes, said delayed oscillator signal versions at said complementary node pair being mutually offset in phase by approximately 180\xb0.
12. The system as recited in claim 11, wherein said signal injection portion includes:
a current bias section including at least one current source selectively actuated to variably generate a plurality of biasing current signals for respective nodes between said delay stages; and,
an injection clock section coupled to said current bias section, said injection clock section including a plurality of switching devices actuated responsive to a periodic injection clock signal to selectively couple said biasing current signals to corresponding ones of said nodes.
13. The system as recited in claim 12, wherein said ring oscillator portion includes four said delay stages with said complementary outputs of said differential inverting amplifier in one delay stage being crossed for input to the next of said delay stages, said delayed oscillator signal versions established at said nodes of said ring oscillator portion thereby defining a plurality of phase interpolated signals successively offset one from the other in phase by said predetermined phase difference of approximately 45\xb0.
14. The system as recited in claim 13, wherein said signal injection portion includes a plurality of said current bias sections each selectively coupled to a corresponding one of said delay stages by said injection clock section, each said current bias section being selectively configured to variably define said biasing current signal in current amplitude.
15. The system as recited in claim 14, wherein said signal injection portion includes one said current bias section for each of said delay stages, each of said current bias sections being programmably controlled.
16. A method for generating In-phase (I) and Quadrature (Q) signal references according to a periodic injection signal and selective phase interpolating an output signal with reference thereto comprising:
establishing a ring oscillator portion to generate an oscillator signal, said ring oscillator portion including a plurality of delay stages interconnected in cascade to collectively execute an odd number of signal state inversions within a closed loop;
generating at respective nodes defined respectively between consecutive delay stages correspondingly delayed versions of the oscillator signal successively shifted in phase by a predetermined phase difference;
applying the periodic injection signal selectively to at least one of said nodes for locking said oscillator signal thereto in frequency, the periodic injection signal being selectively varied in current amplitude;
wherein the periodic injection signal is selectively applied in single or split injection modes to selectively position said I reference of the periodic injection signal with respect to a selected one of said nodes;
applying the periodic injection signal in said single injection mode exclusively to the selected one of said nodes, said delayed oscillator signal version established at the selected node thereby forming said I reference; and,
applying the periodic injection signal in said split injection mode concurrently to selected first and second ones of said nodes, said periodic injection signal being applied to said first node at a first current amplitude and to said second node at a second current amplitude, said I reference being offset in phase between said delayed oscillator signal versions thereafter established at said first and second nodes in comparative relation to a ratio of said first and second current amplitudes.
17. The method as recited in claim 16, wherein said oscillator signal is of differential signal type, and each of said delay stages includes a differential inverting amplifier having complementary outputs coupled to a complementary pair of said nodes, said delayed oscillator signal versions at said complementary node pair being mutually offset in phase by approximately 180\xb0.
18. The method as recited in claim 17, wherein applying said periodic injection signal includes:
selectively actuating at least one current source to variably generate a plurality of biasing current signals for respective nodes between said delay stages of said ring oscillator portion; and,
actuating a plurality of switching devices responsive to a periodic injection clock signal to selectively couple said biasing current signals to corresponding ones of said nodes.
19. The method as recited in claim 18, wherein four said delay stages are established in said ring oscillator portion, said complementary outputs of said differential inverting amplifier in one delay stage being crossed for input to the next of said delay stages, said delayed oscillator signal versions established at said nodes of said ring oscillator portion thereby defining a plurality of phase interpolated signals successively offset one from the other in phase by said predetermined phase difference of approximately 45\xb0.
20. The method as recited in claim 19, wherein a plurality of said biasing current signals are selectively coupled to corresponding ones of said delay stages, and each said biasing current signal being variably defined in current amplitude to selectively position said I reference with respect to said nodes.
21. The method as recited in claim 20, wherein each of said biasing current signals is programmably controlled.

1460710474-9d0154e5-2184-4494-bae9-beb070b9e5ec

1. A method of manufacturing a semiconductor device, comprising:
forming an insulating film on a semiconductor substrate or on a lower wiring layer;
depositing a hard mask on the insulating film;
forming in the hard mask an opening for a wiring pattern;
forming in the insulating film a wiring groove through the hard mask;
filling the opening in the hard mask with an organic film;
thinning the hard mask;
forming a barrier metal and a conductive film in the wiring groove; and
removing parts of the barrier metal and the conductive film which protrude from the wiring groove.
2. The method of manufacturing the semiconductor device according to claim 1, further comprising removing all of the hard mask, between the step of filling the opening in the hard mask with an organic film and the step of forming the barrier metal and the conductive film.
3. The method of manufacturing the semiconductor device according to claim 2, wherein thinning the hard mask or removing the entire hard mask is carried out by CMP.
4. The method of manufacturing the semiconductor device according to claim 2, wherein thinning the hard mask or removing the entire hard mask is carried out by etching.
5. The method of manufacturing the semiconductor device according to claim 1, wherein the hard mask contains at least one of Ti, TiN, Ta, and TaN.
6. The method of manufacturing the semiconductor device according to claim 2, wherein the hard mask contains at least one of Ti, TiN, Ta, and TaN.
7. The method of manufacturing the semiconductor device according to claim 3, wherein the hard mask contains at least one of Ti, TiN, Ta, and TaN.
8. The method of manufacturing the semiconductor device according to claim 4, wherein the hard mask contains at least one of Ti, TiN, Ta, and TaN.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A pressure sensor comprising:
a casing having an inner through hole with an opening;
a sensor chip with a gauge resistor disposed on a surface of the sensor chip;
a boss disposed on the gauge resistor;
a metallic diaphragm capable of distorting in accordance with a pressure; and
a load transmission member disposed between the metallic diaphragm and the boss and being movable in accordance with a distortion of the metallic diaphragm so that a load corresponding to the pressure applied to the metallic diaphragm is transmitted to the boss through the load transmission member, wherein
the casing accommodates the sensor chip, the boss and the load transmission member inside the inner through hole of the casing,
the opening of the casing is covered with the metallic diaphragm,
the pressure applied to the diaphragm is detected in such a manner that the load corresponding to the pressure is applied to the gauge resistor through the metallic diaphragm, the load transmission member and the boss so that a resistance of the gauge resistor is changed, and that the pressure is measured on the basis of a resistance change of the gauge resistor, and
the gauge resistor is larger than the boss, seeing from a load transmission member side, so that the boss is covered with the gauge resistor.
2. The pressure sensor according to claim 1, further comprising:
a positioning member disposed inside the casing, wherein
the positioning member has a diameter almost equal to an inner diameter of the casing,
the positioning member includes a sensor chip accommodation portion, and
the sensor chip is disposed in the sensor chip accommodation portion of the positioning member.
3. The pressure sensor according to claim 1, wherein
the boss has a circular cross section perpendicular to a center axis of the casing,
the gauge resistor has a square cross section perpendicular to the center axis of the casing, and
the boss has a diameter equal to or slightly smaller than a dimension of a side of the gauge resistor.
4. The pressure sensor according to claim 1, further comprising:
a load application member disposed between the load transmission member and the boss for transmitting the load from the load transmission member to the boss.
5. A pressure sensor comprising:
a cylindrical member;
a sensor chip with a gauge resistor disposed inside the cylindrical member;
a boss disposed on the gauge resistor and disposed inside the cylindrical member;
a metallic diaphragm capable of distorting in accordance with a pressure; and
a load transmission member disposed between the metallic diaphragm and the boss so that the diaphragm is disposed on the sensor chip through the load transmission member and the boss, and being movable in accordance with a distortion of the metallic diaphragm so that a load corresponding to the pressure applied to the metallic diaphragm is transmitted to the boss through the load transmission member, wherein
the pressure applied to the diaphragm is detected in such a manner that the load corresponding to the pressure is applied to the gauge resistor so that a resistance of the gauge resistor is changed, and that the pressure is measured on the basis of a resistance change of the gauge resistor, and
the gauge resistor has a cross section larger than that of the boss, the cross section perpendicular to a center axis of the cylindrical member.
6. The pressure sensor according to claim 5, wherein the boss is covered with the gauge resistor, seeing the gauge resistor and the boss from a load transmission member side.
7. The pressure sensor according to claim 5, further comprising:
a positioning member disposed inside the cylindrical member, wherein
the positioning member has a diameter almost equal to an inner diameter of the cylindrical member,
the positioning member includes a sensor chip accommodation portion, and
the sensor chip is disposed in the sensor chip accommodation portion of the positioning member.
8. The pressure sensor according to claim 5, wherein
the boss has a circular cross section perpendicular to the center axis of the cylindrical member,
the gauge resistor has a square cross section perpendicular to the center axis of the cylindrical member, and
the boss has a diameter equal to or slightly smaller than a dimension of a side of the gauge resistor.
9. The pressure sensor according to claim 5, further comprising:
a load application member disposed between the load transmission member and the boss for transmitting the load from the load transmission member to the boss.