1. A method of implementing a user circuit in a programmable logic device (PLD), comprising:
selecting a first logical grouping from the user circuit;
selecting a second logical grouping from the user circuit; and
generating a configuration data file enabling a first level of well biasing for the first logical grouping and a second level of well biasing for the second logical grouping.
2. The method of claim 1, wherein:
the first level of well biasing is a positive well bias; and
the second level of well biasing is no applied well bias.
3. The method of claim 1, wherein:
the first level of well biasing is a negative well bias; and
the second level of well biasing is no applied well bias.
4. The method of claim 1, wherein:
the first level of well biasing is a positive well bias; and
the second level of well biasing is a negative well bias.
5. The method of claim 1, wherein:
the first and second levels of well biasing are of the same polarity but different values.
6. The method of claim 1, wherein the second logic grouping comprises all portions of the user circuit not included in the first logical grouping.
7. A method of implementing a user circuit in a programmable logic device (PLD), comprising:
determining a first set of transistors in the user circuit; and
generating a configuration data file enabling positive well biasing of the first set of transistors.
8. The method of claim 7, wherein the first set of transistors comprises a critical path in the user circuit.
9. The method of claim 7, further comprising determining, prior to generating the configuration data file, a second set of transistors in the user circuit; and wherein:
the configuration data file further enables negative well biasing of the second set of transistors.
10. The method of claim 9, wherein the first set of transistors comprises a critical path in the user circuit, and the second set of transistors comprises a non-critical path in the user circuit.
11. The method of claim 7, further comprising determining, prior to generating the configuration data file, a second set of transistors in the user circuit; and wherein:
the configuration data file further enables positive well biasing of the second set of transistors.
12. The method of claim 11, wherein the first set of transistors comprises a first critical path in the user circuit, and the second set of transistors comprises a second critical path in the user circuit.
13. The method of claim 11, further comprising:
monitoring a total number of the transistors in the first and second sets of transistors; and
issuing an error message if the number exceeds a pre-established maximum.
14. The method of claim 7, wherein:
the PLD is a field programmable gate array (FPGA); and
the configuration data file is an FPGA bitstream.
15. A method of implementing a user circuit in a programmable logic device (PLD), comprising:
determining a first set of transistors in the user circuit; and
generating a configuration data file enabling negative well biasing of the first set of transistors.
16. The method of claim 15, wherein the first set of transistors comprises a non-critical path in the user circuit.
17. The method of claim 15, further comprising determining, prior to generating the configuration data file, a second set of transistors in the user circuit; and wherein:
the configuration data file further enables negative well biasing of the second set of transistors.
18. The method of claim 17, wherein the first set of transistors comprises a first non-critical path in the user circuit, and the second set of transistors comprises a second non-critical path in the user circuit.
19. The method of claim 17, further comprising:
monitoring a total number of the transistors in the first and second sets of transistors; and issuing an error message if the number exceeds a pre-established maximum.
20. The method of claim 15, wherein:
the PLD is a field programmable gate array (FPGA); and
the configuration data file is an FPGA bitstream.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method of removing chloramine and organic compounds from an aqueous solution comprising:
providing an aqueous solution comprising chloramine and an organic compound; and
contacting the aqueous solution with a medium comprising a porous carbon substrate, wherein the porous carbon substrate comprises at least 1.5% by mass of sulfur.
2. The method of claim 1, wherein the porous carbon substrate is predominately microporous.
3. The method of claim 1, wherein the surface of the porous carbon substrate comprises a species of COxSy, wherein x is no more than 0.1, and y is 0.005 to 0.3.
4. The method of claim 1, wherein the porous carbon substrate further comprises nitrogen and the sum of the sulfur and nitrogen is at least 4.0% by mass.
5. The method of claim 1, wherein the porous carbon substrate is an activated carbon.
6. The method of claim 1, wherein at least 0.2% by mass of the medium comprises sulfur in an oxidation state higher than 0 based on XPS surface analysis.
7. The method of claim 1, wherein the medium has a bulk density of greater than 0.6 gcc.
8. The method of claim 1, wherein the medium has an ash content less than 3%.
9. A method of removing organic compounds from an aqueous solution comprising:
contacting an aqueous solution comprising at least 0.5 ppm of chloramine and an organic compound with a medium comprising a porous carbon substrate having at least 1.5% by mass of sulfur and collecting the eluate, wherein the eluate comprises less than 0.1 ppm of chloramine.
10. A method comprising:
providing a medium prepared by thermal treatment of (i) the surface of a carbon support and (ii) a reactant compound comprising sulfur; and
contacting the medium with an aqueous solution comprising chloramine and an organic compound,
wherein after contact with the medium, the aqueous solution has a decreased amount of chloramine and a decreased amount of the organic compound.
11. The method of claim 10, wherein the thermal treatment further comprises (iii) a reactant compound comprising nitrogen.
12. The method of claim 10, wherein the reactant compound comprising sulfur is selected from at least one of: elemental sulfur, sulfur oxides, hydrogen sulfide, salts containing oxyanions of sulfur, and combinations thereof.
13. The method of claim 10, wherein the thermal treatment is conducted at a temperature greater than 445\xb0 C. in an inert atmosphere.
14. The method of claim 10, wherein the amount of chloramine is decreased by at least 80% when challenged with a solution comprising 3 ppm chloramine.
15. The method of claim 10, wherein the amount of organic compound is decreased by 95% when challenged with a solution comprising 15 ppb chloroform.
16. The method claim 1, wherein the medium is disposed within a matrix, wherein the matrix is a polymer matrix.
17. The method of claim 16, wherein the medium further comprises particles comprising titanium.