All The Claims

1. A system for diagnosing malfunctions in a variable valve actuation system comprising:
a rocker arm assembly comprising:
a first arm with a first end;
a second arm with a first end pivotally connected to the first arm, the first end of the first arm and the first end of the second arm both pivoting about a same pivot axis;
a hydraulically-operated latch assembly functioning to secure the first arm to the second arm when latched for operation in a first operating mode and functioning to allow the first arm to move relative to the second arm when unlatched in a second operating mode;
a source of pressurized fluid;
a hydraulic valve coupled to the source of pressurized fluid, adapted to provide pressurized fluid to the hydraulically-operated latch assembly;
a gallery connecting the hydraulic valve to the hydraulically-operated latch assembly;
a pressure transducer for indicating a pressure in the gallery; and
a control unit coupled to the hydraulic valve and the pressure transducer, adapted to:
accept a hydraulic pressure input from the pressure transducer; and
identify motion of a latch of the hydraulically-operated latch assembly based upon the hydraulic pressure input from the pressure transducer.
2. The system of claim 1 wherein the control unit is further adapted to:
sense engine operation parameters; and
actuate the hydraulic valve.
3. The system of claim 1 wherein the control unit is further adapted to:
identify when the latch has been actuated based upon the hydraulic pressure input from the pressure transducer.
4. The system of claim 1 wherein the control unit is further adapted to: calculate a velocity of the latch based upon the hydraulic pressure input from the pressure transducer.
5. The system of claim 1 wherein the control unit is further adapted to: calculate when the latch is moving slower than a predetermined acceptable velocity.
6. The system of claim 1 wherein the control unit is further adapted to: store previously calculated latch velocities and determine changes in the velocities over time to identify a probability that the latch will not respond within a predetermined acceptable time period.
7. The system of claim 1 wherein the control unit is further adapted to: calculate a velocity of the latch based upon a measured slope of a time vs. hydraulic pressure input from the pressure transducer.
8. The system of claim 1, further comprising a second source of pressurized fluid connected to the hydraulically-operated latch assembly.
9. A system for diagnosing malfunctions in a variable valve actuation system comprising:
a hydraulically-operated latch assembly;
a first source of pressurized fluid;
a hydraulic valve coupled to the first source of pressurized fluid and adapted to provide pressurized fluid through the hydraulic valve to the hydraulically-operated latch assembly;
a gallery connecting the hydraulic valve to the hydraulically-operated latch assembly;
a pressure transducer for measuring a hydraulic pressure in the gallery; and
a control unit coupled to the hydraulic valve and the pressure transducer, adapted to:
receive a hydraulic pressure input from the pressure transducer; and
identify motion of a latch of the hydraulically-operated latch assembly in the variable valve actuation system based upon an input from the pressure transducer.
10. The system of claim 9, further comprising:
a rocker arm assembly comprising:
a first arm with a first end; and
a second arm with a first end pivotally connected to the first arm, the first end of the first arm and the first end of the second arm both pivoting about a same pivot axis and
wherein the hydraulically-operated latch assembly secures the first arm to the second arm when the latch is latched for operation in a first operating mode and functioning to allow the first arm to move relative to the second arm when unlatched in a second operating mode.
11. The system of claim 9, further comprising a second hydraulically-operated latch assembly also provided with a first source of pressurized fluid, wherein the hydraulically-operated latch assembly and the second hydraulically-operated latch assembly are operably connected to rocker arm assemblies of two cylinders of an internal combustion engine.
12. The system of claim 9, wherein the hydraulically-operated latch assembly further comprises a dual-feed hydraulic lash adjuster (DFHLA).
13. The system of claim 9, wherein the gallery comprises an upper gallery and is a pressurized vessel of hydraulic fluid.
14. The system of claim 9, further comprising a second source of pressurized fluid connected to the hydraulically-operated latch assembly.
15. The system of claim 14, wherein the second source of pressurized fluid comprises a lower gallery and is a pressurized vessel of hydraulic fluid.
16. A system for diagnosing malfunctions in a variable valve actuation system comprising:
a hydraulically-operated latch assembly;
a hydraulic valve coupled to a first source of pressurized fluid and adapted to provide pressurized fluid through the hydraulic valve to the hydraulically-operated latch assembly;
a pressure transducer for measuring a pressure of the pressurized fluid provided by the first source of pressurized fluid; and
a control unit coupled to the hydraulic valve and the pressure transducer, adapted to:
receive a hydraulic pressure input from the pressure transducer; and
identify motion of a latch of the hydraulically-operated latch assembly in a variable valve actuation system based upon an input from the pressure transducer.
17. The system of claim 16, further comprising an upper gallery connecting the hydraulic valve to the hydraulically-operated latch assembly.
18. The system of claim 16, further comprising a second source of pressurized fluid connected to the hydraulically-operation latch assembly.
19. The system of claim 18, wherein the second source of pressurized fluid comprises a lower gallery.
20. The system of claim 16, further comprising:
a rocker arm assembly comprising:
a first arm with a first end; and
a second arm with a first end pivotally connected to the first arm, wherein the first end of the first arm and the first end of the second arm both pivoting about a same pivot axis, and
wherein the hydraulically-operated latch assembly secures the first arm to the second arm when the latch is latched for operation in a first operating mode and functioning to allow the first arm to move relative to the second arm when unlatched in a second operating mode.
21. The system of claim 16, wherein one indication of a malfunction in the variable valve actuation system comprises an unexpected time shifting of a pressure increase or pressure decrease during latching or unlatching.
22. The system of claim 16, wherein one indication of a malfunction in the variable valve actuation system comprises a difference from an expected rate of increase or decrease of pressure during latching or unlatching.
23. The system of claim 16, wherein the control unit is adapted to yield an indication of a malfunction in the variable valve actuation system independent of direct measurement of a valve lift or a latch pin movement.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1-12. (canceled)
13. A method of producing a stamping with an enlarged functional surface, out of a flat strip, wherein the flat strip at closing is clamped between an upper part, including a shearing punch, a pressure pad for the shearing punch, a V-shaped projection arranged on the pressure pad and an ejector, and a lower part, including a cutting die, an ejector and an inner form punch and the V-shaped projection is pressed into the flat strip, the method comprising:
clamping an untreated clamped flat strip before cutting is initiated;
preforming a negative with regard to a cutting direction with a preforming element into the cutting die in a direction opposite to the cutting direction that corresponds to the expected edge rollover with regard to size and geometry at cutting to create at preformed area, including an allowance so as to generate a material volume at a side of the rollover in a mirror-inverted form; and
supporting the preformed area of the clamped flat strip by the preforming element at a start of, and during, the cutting.
14. A method according to claim 13, wherein said stamping is a workpiece produced by fine blanking.
15. A method according to claim 13, wherein process parameters for the preforming in the preformed area are determined depending on the material type, shape andor geometry of the workpiece by a virtual forming simulation.
16. A method according to claim 15, wherein said process parameters include the geometry andor the material volume of the edge rollover.
17. A method according to claim 13, wherein the process parameters for the preforming are iteratively determined depending on the material type, shape andor geometry of the workpiece by measuring at least two real fine blanking parts.
18. A method according to claim 17, wherein said process parameters include the geometry andor the material volume of the edge rollover of the area to be preformed.
19. A method according to claim 13, wherein the preforming is carried out in a separate pre-stage or before starting the cutting process in a common stage, the process parameters of which are respectively adjusted according to the determined edge rollover.
20. A method according to claim 13, wherein said preforming element includes a coining stamp.
21. A method according to claim 19, wherein the preforming in the direction to the pressure pad and the cutting in the following step are realized at parts with a thickness of up to 10 mm, and small and large dimensions.
22. A method according to claim 21, wherein said thickness is 3 to 5 mm
23. A method according to claim 13, wherein said preforming element is used as the ejector of the fine blanking tool.
24. A method according to claim 19, wherein the preforming in the direction to the stamp and the cutting in the complex cutting operation are realized at parts with medium thickness of 3 to 7 mm, and small and medium-sized dimensions.
25. A method according to claim 13, wherein no material is shifted along the cutting line determined by the cutting die and the punch.
26. A device for producing a stamping with an enlarged functional surface, out of a flat strip, comprising:
an upper part including a pressure pad with a V-shaped projection, a shearing punch guided in the pressure pad; and
a lower part including a cutting die and an ejector, the flat strip being clamped between the upper part and the lower part during operation of the device wherein the flat strip is positioned between the pressure pad and cutting die and the V-shaped projection is pressed into the flat strip, said lower part further including at least one coining stamp arranged before a cutting stage, said coining stamp being operable to act against a cutting direction to negatively pre-form a material volume on a rollover side corresponding to an expected edge rollover, the coining stamp and the ejector in the cutting stage having a contour on respective active sides thereof, each respectively defined by a preforming angle which corresponds with the geometry of the expected edge rollover plus an allowance, the ejector supporting the preformed area during cutting.
27. A method according to claim 26, wherein said stamping is a workpiece produced by fine blanking.
28. A device according to claim 26, wherein the preforming angle at the coining stamp and the ejector amounts to 20\xb0 to 40\xb0.
29. A device according to claim 26, wherein the preforming angle at the coining stamp and the ejector is 30\xb0
30. A device for producing a stamping with an enlarged functional surface, out of a flat strip, comprising:
an upper part including a pressure pad with a V-shaped projection, a shearing punch guided in the pressure pad; and
a lower part including a cutting die and an ejector, the flat strip being clamped between the upper part and the lower part during operation of the device wherein the flat strip is positioned between the pressure pad and cutting die and the V-shaped projection is pressed into the flat strip, said ejector being in a form of at least one coining stamp operable to act against a cutting direction to negatively pre-form a material volume on a rollover side corresponding to an expected edge rollover, the at least one coining stamp in the cutting stage having a contour on an active side thereof, defined by a preforming angle which corresponds with the geometry of the expected edge rollover plus an allowance, the ejector supporting the preformed area during cutting.
31. A method according to claim 30, wherein said stamping is a workpiece produced by fine blanking.
32. A device according to claim 30, wherein the preforming angle at the coining stamp amounts to 20\xb0 to 40\xb0.
33. A device according to claim 30, wherein the preforming angle at the coining stamp is 30\xb0

What we claim is:

1. A nonvolatile memory apparatus comprising:
a plurality of memories; and
a processing unit,
wherein each of said memories has a terminal used for data input and for data output, said terminal of each of said memories are coupled to each other by a bus,
wherein one of said memories is a nonvolatile memory and is capable of being specified a plurality of operations from said processing unit,
wherein said nonvolatile memory operates an erase operation for erasing data stored therein, said erase operation is included in said operations specified from said processing unit, and said nonvolatile memory is capable of freeing said terminal during said erase operation,
wherein said erase operation includes a threshold voltage moving operation and a verify operation,
wherein said threshold voltage moving operation is that in which a threshold voltage of a memory cell in said nonvolatile memory is moved to within a threshold voltage distribution indicative of an erase level,
wherein said verify operation determines whether the threshold voltage movement of said memory cell to within said threshold voltage distribution is completed,
wherein said nonvolatile memory repeats said erase operation when the threshold voltage movement of said memory cell to within said threshold voltage distribution is not yet completed, the erase operation of said nonvolatile memory ending when the threshold voltage of said memory cell is indicative of said erase level, and
wherein said processing unit is capable of accessing other ones of said memories via said bus during a time said erase operation is being performed in said nonvolatile memory.
2. The nonvolatile memory apparatus according to claim 1,
wherein said processing unit performs a polling to said nonvolatile memory for detecting whether said erase operation is completed or not.
3. The nonvolatile memory apparatus according to claim 2,
wherein said nonvolatile memory is enabled to operate a program operation for storing data in said nonvolatile memory, said program operation is included in said operations specified from said processing unit.
4. The nonvolatile memory apparatus according to claim 3,
wherein said threshold voltage of said memory cell is within one of a plurality of threshold voltage distributions,
wherein one of said threshold voltage distributions is indicative of said erase level, and
wherein another one of said threshold voltage distributions is indicative of a program level to which said threshold voltage of a memory cell is moved to by said program operation.
5. The nonvolatile memory apparatus according to claim 4,
wherein said nonvolatile memory comprises a plurality of memory cells and a voltage generating circuit,
wherein said voltage generating circuit is capable of generating an erase voltage and a program voltage,
wherein said voltage generating circuit supplies said erase voltage to ones of said memory cells selected for erasing data therein, and
wherein said voltage generating circuit supplies said program voltage to ones of said memory cells selected for programming data therein.
6. A nonvolatile memory apparatus comprising:
a plurality of nonvolatile memories;
a control unit; and
a bus,
wherein each of said nonvolatile memories includes a terminal used for data input and for data output, said terminal of each of said nonvolatile memories are coupled to each other by said bus, and a plurality of memory cells, each of which has a threshold voltage within one of a plurality of threshold voltage ranges,
wherein each of said nonvolatile memories operates a first operation including a threshold voltage moving operation and a verify operation,
wherein said threshold voltage moving operation is that in which said threshold voltage of a respective memory cell is moved to a first threshold voltage range in said plurality of threshold voltage ranges,
wherein said verify operation determines whether the threshold voltage moving operation of said memory cell to said first threshold voltage range is completed,
wherein said nonvolatile memory repeats said threshold voltage moving operation and said verify operation when the threshold voltage movement of that memory cell to said first threshold voltage range is not yet completed, said first operation of said nonvolatile memory ending when the threshold voltage of said memory cell is in the first threshold voltage range, and
wherein said control unit is capable of accessing other ones of said nonvolatile memories via said bus during a time said first operation is being performed in an individual nonvolatile memory.
7. The nonvolatile memory apparatus according to claim 6,
wherein said control unit performs a polling to said one nonvolatile memory for detecting whether said first operation is completed or not.
8. The nonvolatile memory apparatus according to claim 7,
wherein each of said nonvolatile memories further includes a voltage generating circuit,
wherein said voltage generating circuit is capable of generating a first voltage, and
wherein said voltage generating circuit supplies said first voltage to ones of said memory cells selected for moving the threshold voltage thereof.
9. A nonvolatile memory apparatus comprising:
a processing unit;
a plurality of nonvolatile memories; and
an inputoutput terminal,
wherein each of said nonvolatile memories has a terminal used for data input and for data output,
wherein said terminal of each of said memories and said inputoutput terminal are coupled to each other by a bus,
wherein said processing unit is capable of designating an erase operation to each of said nonvolatile memories for erasing data stored therein,
wherein said erase operation includes a threshold voltage moving operation and a verify operation,
wherein said threshold voltage moving operation is that in which a threshold voltage of a memory cell in a respective nonvolatile memory is moved to a threshold voltage range indicating an erase state,
wherein said verify operation determines whether the threshold voltage moving operation of said memory cell to said erase state is completed,
wherein said nonvolatile memory repeats said erase operation when the threshold voltage moving operation of said memory cell to that of an erase state is not yet completed, the erase operation of said nonvolatile memory ending when the threshold voltage of said memory cell is indicative of said erase state,
wherein, for selective erasure, said processing unit designates said erase operation to a first nonvolatile memory of said nonvolatile memories for performing said erase operation in said first nonvolatile memory,
wherein said first nonvolatile memory is capable of freeing said terminal when performing said erase operation and is capable of outputting a signal for indicating that said erase operation is being performed, and
wherein said processing unit is capable of inputting data from outside of said nonvolatile memory apparatus via said inputoutput terminal during a time said erase operation is being performed in said first nonvolatile memory.
10. The nonvolatile memory apparatus according to claim 9,
wherein said processing unit performs a polling to said nonvolatile memory for detecting whether said erase operation is completed or not.
11. The nonvolatile memory apparatus according to claim 10,
wherein said processing unit is capable of designating a program operation for storing data to said nonvolatile memories except when said erase operation is being performed in those memories.
12. The nonvolatile memory apparatus according to claim 11,
wherein each of said nonvolatile memories contains a plurality of memory cells and a voltage generating circuit, which is capable of generating an erase voltage and a program voltage,
wherein said voltage generating circuit supplies said erase voltage to ones of said memory cells selected for said erase operation, and
wherein said voltage generating circuit supplies said program voltage to ones of said memory cells selected for said program operation.
13. A nonvolatile memory apparatus comprising:
a processing unit;
a plurality of nonvolatile memories; and
an inputoutput terminal,
wherein each of said nonvolatile memories has a terminal used for data input and for data output,
wherein said terminal of each of said memories and said inputoutput terminal are coupled to each other by a bus,
wherein said processing unit is capable of designating an erase operation to each of said nonvolatile memories for erasing data stored therein,
wherein said erase operation includes a threshold voltage moving operation and a verify operation,
wherein said threshold voltage moving operation is that in which a threshold voltage of a memory cell in a respective nonvolatile memory is moved to a threshold voltage range indicating an erase state,
wherein said verify operation determines whether the threshold voltage moving operation of said memory cell to said erase state is completed,
wherein said nonvolatile memory repeats said erase operation when the threshold voltage moving operation of said memory cell to that of an erase state is not yet completed, the erase operation of said nonvolatile memory ending when the threshold voltage of said memory cell is indicative of said erase state,
wherein, for selective erasure, said processing unit designates said erase operation to a first nonvolatile memory of said nonvolatile memories for performing said erase operation in said first nonvolatile memory,
wherein said first nonvolatile memory is capable of freeing said terminal when performing said erase operation and is capable of outputting a signal for indicating that said erase operation is being performed, and
wherein said processing unit is capable of outputting data to outside of said nonvolatile memory apparatus via said inputoutput terminal during a time said erase operation is being performed in said first nonvolatile memory.
14. The nonvolatile memory apparatus according to claim 13,
wherein said processing unit performs a polling to said nonvolatile memory for detecting whether said erase operation is completed or not.
15. The nonvolatile memory apparatus according to claim 14,
wherein said processing unit is capable of designating a program operation for storing data to said nonvolatile memories except when said erase operation is being performed in those memories.
16. The nonvolatile memory apparatus according to claim 15,
wherein each of said nonvolatile memories contains a plurality of memory cells and a voltage generating circuit, which is capable of generating an erase voltage and a program voltage,
wherein said voltage generating circuit supplies said erase voltage to ones of said memory cells selected for said erase operation, and
wherein said voltage generating circuit supplies said program voltage to ones of said memory cells selected for said program operation.
17. A nonvolatile memory apparatus comprising:
a processing unit;
a plurality of memories; and
an inputoutput terminal,
wherein each of said memories has a terminal used for data input and for data output,
wherein said terminal of each of said memories and said inputoutput terminal are coupled to each other by a bus,
wherein at least one of said memories is a nonvolatile memory,
wherein said processing unit is capable of designating an erase operation to said nonvolatile memory for erasing data stored therein,
wherein said erase operation includes a threshold voltage moving operation and a verify operation,
wherein said threshold voltage moving operation is that in which a threshold voltage of a memory cell in a respective nonvolatile memory is moved to a threshold voltage range indicating an erase state,
wherein said verify operation determines whether the threshold voltage moving operation of said memory cell to said erase state is completed,
wherein said nonvolatile memory repeats said erase operation when the threshold voltage moving operation of said memory cell to that of an erase state is not yet completed, the erase operation of said nonvolatile memory ending when the threshold voltage of said memory cell is indicative of said erase state,
wherein said nonvolatile memory is capable of freeing said terminal when performing said erase operation and is capable of outputting a signal for indicating that said erase operation is being performed,
wherein said processing unit is capable of accessing other ones of said memories via said bus during a time said erase operation is being performed in said nonvolatile memory, and
wherein said processing unit is capable of inputting data from outside of said nonvolatile memory apparatus via said inputoutput terminal during a time said erase operation is being performed in said nonvolatile memory.
18. The nonvolatile memory apparatus according to claim 17,
wherein said processing unit performs a polling to said nonvolatile memory for detecting whether said erase operation is completed or not.
19. The nonvolatile memory apparatus according to claim 18,
wherein said processing unit is capable of designating a program operation for storing data to said nonvolatile memories except when said erase operation is being performed in those memories.
20. The nonvolatile memory apparatus according to claim 19,
wherein each nonvolatile memory contains a plurality of memory cells and a voltage generating circuit, which is capable of generating an erase voltage and a program voltage,
wherein said voltage generating circuit supplies said erase voltage to ones of said memory cells selected for said erase operation, and
wherein said voltage generating circuit supplies said program voltage to ones of said memory cells selected for said program operation.
21. A nonvolatile memory apparatus comprising:
a processing unit;
a plurality of memories; and
an inputoutput terminal,
wherein each of said memories has a terminal used for data input and for data output,
wherein said terminal of each of said memories and said inputoutput terminal are coupled to each other by a bus,
wherein at least one of said memories is a nonvolatile memory,
wherein said processing unit is capable of designating an erase operation to said nonvolatile memory for erasing data stored therein,
wherein said erase operation includes a threshold voltage moving operation and a verify operation,
wherein said threshold voltage moving operation is that in which a threshold voltage of a memory cell in a respective nonvolatile memory is moved to a threshold voltage range indicating an erase state,
wherein said verify operation determines whether the threshold voltage moving operation of said memory cell to said erase state is completed,
wherein said nonvolatile memory repeats said erase operation when the threshold voltage moving operation of said memory cell to that of an erase state is not yet completed, the erase operation of said nonvolatile memory ending when the threshold voltage of said memory cell is indicative of said erase state,
wherein said nonvolatile memory is capable of freeing said terminal when performing said erase operation and is capable of outputting a signal for indicating that said erase operation is being performed,
wherein said processing unit is capable of accessing other ones of said memories via said bus during a time said erase operation is being performed in said nonvolatile memory, and
wherein said processing unit is capable of outputting data to outside of said nonvolatile memory apparatus via said inputoutput terminal during a time said erase operation is being performed in said first nonvolatile memory.
22. The nonvolatile memory apparatus according to claim 21,
wherein said processing unit performs a polling to said nonvolatile memory for detecting whether said erase operation is completed or not.
23. The nonvolatile memory apparatus according to claim 22,
wherein said processing unit is capable of designating a program operation for storing data to said nonvolatile memories except when said erase operation is being performed in those memories.
24. The nonvolatile memory apparatus according to claim 23,
wherein each nonvolatile memory contains a plurality of memory cells and a voltage generating circuit, which is capable of generating an erase voltage and a program voltage,
wherein said voltage generating circuit supplies said erase voltage to ones of said memory cells selected for said erase operation, and
wherein said voltage generating circuit supplies said program voltage to ones of said memory cells selected for said program operation.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

What is claimed is:

1. A method of manufacturing an ink jet head, comprising the steps of:
providing an actuator unit formed with a plurality of actuators extending in the same direction from a base portion to be in parallel with one another, each of said plurality of actuators being made of a plurality of piezoelectric elements extendable in a longitudinal direction causing tip ends of said plurality of actuators to move away from the base portion when an electrical signal is applied to the each of said plurality of actuators;
providing a diaphragm;
providing an ink channel unit formed with a plurality of ink channels corresponding to respective ones of said plurality of actuators individually;
dipping the tip ends of said plurality of actuators into an adhesive pond so that an adhesive agent clings to the tip ends or said plurality of actuators while maintaining a state in which an imaginary first line that connects the tip ends of said plurality of actuators is in parallel with an imaginary second line that Connects borders between immersed and non-immersed portions of said plurality of actuators;
adhering said actuator unit onto one surface of said diaphragm while abutting the tip ends of said plurality of actuators against the one surface of said diaphragm; and
attaching said ink channel unit to another surface of said diaphragm so that said plurality of ink channels are positioned in confronting relation with said respective ones of said plurality of actuators individually.
2. The method according to claim 1, wherein said actuator unit is further formed with at least two positioning members defining reference positions, and wherein the dipping step comprises bringing the imaginary second line to he substantially in coincidence with an imaginary third line that connects the reference positions when dipping the tip ends of said plurality of actuators into the adhesive pond.
3. The method according to claim 2, wherein said at least two positioning members extend from the base portion to be in parallel with said plurality of actuators.
4. The method according to claim 3, wherein said plurality of actuators are interposed between two of said at least two positioning members.
5. The method according to claim 1, wherein each of said plurality of actuators has an inactive portion at its tip end, said inactive portion being non-responsive to the electrical signal, and wherein the dipping step comprises bringing the imaginary second line to be within said inactive portion when dipping the tip ends of said plurality of actuators into the adhesive pond.
6. The method according to claim 1, wherein said actuator unit is further formed with at least two positioning members defining reference positions, and each of said plurality of actuators has an inactive portion at its tip end, said inactive portion being non-responsive to the electrical signal, and wherein the dipping step comprises bringing the imaginary second line to be substantially in coincidence with an imaginary third line that connects the reference positions and also to be within said inactive portion when dipping the tip ends or said plurality of actuators into the adhesive pond.
7. The method according to claim 1, wherein the dipping step comprises providing a dipping plate formed with a plurality of grooves corresponding to respective ones of said plurality of actuators, forming a plurality of adhesive ponds in said plurality of grooves by pouring an adhesive agent thereinto to be the same level, dipping the tip ends of said plurality of actuators into corresponding adhesive ponds, and drawing the tip ends of said plurality of actuators from the corresponding adhesive ponds.