1460707428-7fe157e0-1f47-4022-83cc-503b34b86c1e

1. A heat exchanger comprising:
a hot fluid inlet;
a hot fluid outlet;
a cold fluid inlet;
a cold fluid outlet; and
a header connected to the hot fluid outlet, the header comprising:
a housing;
a baffle separating a first cavity from a second cavity within the housing;
an On-Board Inert Gas Generation System (OBIGGS) outlet adjacent to the first cavity; and
a primary outlet adjacent to the second cavity.
2. The heat exchanger of claim 1, wherein the baffle defines a slot such that a first fluid positioned in the first cavity is in fluid communication with a second fluid positioned in the second cavity via an alternate flowpath.
3. The heat exchanger of claim 1, wherein the heat exchanger is a cross-flow heat exchanger.
4. The heat exchanger of claim 3, wherein the first cavity is arranged adjacent to a cold-cold corner.
5. The heat exchanger of claim 4, wherein an aperture width between the baffle and the cold-cold corner is between 1.5 cm and 1.6 cm.
6. The heat exchanger of claim 1, wherein the OBIGGS outlet is positioned to receive a fluid from the first cavity that has a temperature of less than 99\xb0 C.
7. The heat exchanger of claim 1, wherein the heat exchanger is a primary heat exchanger of a dual heat exchange system.
8. A heat exchange system comprising:
a cold fluid circuit for routing a cold fluid sequentially though:
a ram air inlet;
a cold fluid inlet of a heat exchanger; and
a cold fluid outlet of the heat exchanger; and

a hot fluid circuit for routing a hot fluid sequentially through:
a bleed air valve;
a hot fluid inlet of the heat exchanger;
a hot fluid outlet of the heat exchanger; and
a header having a first cavity and a second cavity defined within a housing and separated by a baffle.
9. The heat exchange system of claim 8, wherein the heat exchanger is configured to transfer heat from the hot fluid to the cold fluid.
10. The heat exchange system of claim 8, wherein the heat exchanger is a cross-flow heat exchanger.
11. The heat exchange system of claim 10, wherein the first cavity is configured to receive the hot fluid routed between the baffle and the cold-cold corner.
12. The heat exchange system of claim 11, wherein an aperture width between the baffle and the cold-cold corner is between 1.5 cm and 1.6 cm.
13. The heat exchange system of claim 8, wherein the baffle includes a slot.
14. The heat exchange system of claim 13, and further comprising an alternate flowpath from the first cavity to the second cavity via the slot.
15. A method comprising:
routing a hot fluid from a bleed valve to a hot fluid inlet of a heat exchanger;
routing the hot fluid through the heat exchanger to a hot fluid outlet to cool the hot fluid;
separating the hot fluid at the hot fluid outlet into a first cavity and a second cavity;
routing the hot fluid from the first cavity to an OBIGGS system; and
routing the hot fluid from the second cavity to a compressor.
16. The method of claim 15, wherein the heat exchanger is a cross-flow heat exchanger.
17. The method of claim 16, wherein the first cavity and the second cavity are separated by a baffle.
18. The method of claim 16, wherein the baffle is arranged between 1.5 cm and 1.6 cm from a cold-cold corner.
19. The method of claim 18, and further comprising:
diverting the hot fluid from the hot fluid outlet within an aperture width of the cold-cold corner to the first cavity; and
diverting the hot fluid from the hot fluid outlet that is not within an aperture width of the cold-cold corner to the second cavity.
20. The method of claim 15, and further comprising routing the hot fluid from the first cavity to the second cavity via an alternate flowpath.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An authentication entity device used in an authentication system comprising a plurality of authentication entity devices which separately execute authentication subprocesses, the authentication subprocess constituting an authentication process, and a verification device which verifies the authentication process executed by the each authentication entity device, the authentication entity device comprising:
a confidential information memory module configured to store confidential information for verification by the verification device;
an authenticator generating module configured to generate an authenticator corresponding to executed contents of the authentication subprocess, the authenticator being generated using the confidential information;
a specific context generating module configured to generate a specific context data, the specific context data including a header block, a data block containing the executed contents of the authentication subprocess, and an authenticator block including the generated authenticator; and
a specific context output module configured to output the specific context data.
2. The authentication entity device according to claim 1, further comprising:
an overall authenticator generating module configured to generate an overall authenticator based on a plurality of specific contexts using the confidential information, the plurality of specific contexts being outputted from other authentication entity devices in association with the authentication process;
a generic context generating module configured to generate a generic context pursuant to the specific format from the overall authenticator and the plurality of specific contexts; and
a generic context output module configured to output the generic context to the verification device.
3. The authentication entity device according to claim 1, further comprising a specific context verifying module configured to verify the specific context inputted from other authentication entity devices using the confidential information.
4. The authentication entity device according to claim 1, further comprising a context information associating module configured to generate the specific context of the authentication entity device in order to express a hierarchical structure between specific contexts associated with dependence of the authentication subprocess such that the specific context of the authentication entity device includes the specific contexts inputted from other authentication entity devices.
5. The authentication entity device according to claim 4, further comprising:
a transmission module configured to transmit the execution request to the other authentication entity device based on the execution request of the authentication process transmitted from the verification device such that the other authentication entity device executes the corresponding authentication subprocess; and
an authentication response module configured to send back the specific context replied from the other authentication entity device and at least the specific context generated by the authentication entity device.
6. The authentication entity device according to claim 1, further comprising a context information associating module configured to generate the specific context of the authentication entity device in order to express a hierarchical structure between specific contexts associated with dependence of the authentication subprocess such that the specific context of the authentication entity device includes reference information of the specific contexts inputted from other authentication entity devices.
7. The authentication entity device according to claim 1, wherein the confidential information memory module has a private key memory unit configured to store a private key in a public key cryptography as the confidential information, and
the authenticator generating module comprises a signature generating unit configured to generate the authenticator as a digital signature in the public key cryptography using the private key.
8. A verification device which verifies a authentication process executed by each of a plurality of authentication entity devices which separately executes an authentication subprocess constituting the authentication process, the verification device comprising:
a context verifying module configured to verify a plurality of contexts using confidential information identical to the confidential information or corresponding confidential information;
the plurality of contexts being generated by the plurality of authentication entity devices, wherein each of the plurality of authentication entity devices separately executes an authentication subprocess to generate a specific context for each of the plurality of authentication entity devices; and
the plurality of contexts including execution contents of the authentication subprocess corresponding to a particular authentication entity device, and an authenticator generated for the execution contents using predetermined confidential information stored on the particular authentication entity device.
9. A client device which transfers communication between a plurality of authentication entity devices and a verification device, the plurality of authentication entity devices separately executing a authentication subprocess constituting an authentication process, the verification device verifying the authentication process executed by the each authentication entity device, the client device comprising:
a profile query module configured to transmit a request for profiles to each of the plurality of authentication entity devices, the profiles defining execution environment contents of the authentication subprocess executing on each of the plurality of authentication entity devices;
a profile management module configured to store the profiles received from each of the plurality of authentication entity devices; and
a control module configured to determine one of the profiles compatible with a client environment of the client device.
10. The client device according to claim 9, further comprising a control module configured to cause each of the plurality of authentication entity devices having a corresponding profile matching a profile specified from the verification device to execute the authentication subprocess based on the profile.

1460707425-47ccaa62-1e8b-49cf-976c-159ee7951bb6

1. Power control device for controlling the output power supplied to a discharge lamp operated by an electrical power supply, comprising:
power level determining means for determining the actual lamp power level;
error determining means for determining the error between the determined lamp power level and a specified reference power level;
output power determining means for maintaining the output power level supplied by the electrical power supply to the lamp if the error falls within a specified window and for adjusting the output power level supplied by the electrical power supply to the lamp towards said reference power level if the error falls outside the specified window.
2. Power control device according to claim 1, wherein the width of the window exceeds the ripple on the lamp power.
3. Power control device according to claim 1 or 2, wherein the width of the window is dependent on the specified reference power level.
4. Power control device according to claim 1, 2 or 3, wherein the output power determining means comprise means for decreasing the window width towards low reference power levels and increase the window width towards high reference power levels.
5. Power control device according to any of claims 1-4, wherein the output power determining means comprise means for varying the window width between a maximum window width and a minimum window width, the ratio of which is preferably approximately {fraction (110)} or more.
6. Power control device according to claim 5, wherein the ratio of the maximum and minimum window width is in the same order as the ratio of the maximum output power and minimum output power, limited by the boundaries of a predetermined minimum and a predetermined maximum window width.
7. Power control device according to any of the preceding claims, wherein the output power determining means comprise means for determining the reference power level on basis of a prestored nominal lamp power level and a dimming level, which is input to the output power determining means.
8. Power control device according to any of the claims 1-7, wherein the output power determining means comprise means for iteratively increasing or decreasing the output power level with a first correction or a second correction respectively if the error is outside the window, and maintaining the output power level if the error is inside the window.
9. Power control device according to any of the claims 1-8, wherein the output power means comprise means for increasing or decreasing the output power level supplied by the power supply with a third or fourth correction respectively of the error is inside the main window, but outside a subwindow of the main window, the third and fourth correction being smaller than the first and second correction respectively.
10. Power control device according to claim 8 or 9, wherein said corrections are factors C1, C2, C3, C4 which are prestored in the output power means.
11. Power control device according to claim 8, 9 or 10, wherein one or more of the corrections are dependent on the error level.
12. Power control device according to claim 11, wherein the dutycycle of the output power level or the output power level supplied to the lamp satisfies:
PnPn-1Kp(EnEn-1)KiEn
wherein Pn is the (dutycycle of the) output power level supplied to the lamp on time n, Pn-1 is the (dutycycle of the) output power level supplied to the lamp on time n-1, En and En-1 the error on time n and n-1 respectively, Kp is the proportional gain and Ki is the integrating gain.
13. Power control device according to any of the preceding claims, the power level determining means comprising:
means for determining the actual voltage across the lamp;
means for determining the actual current in the lamp;
means for determining the actual power level from the actual voltage and actual current.
14. Power control device according to any of the preceding claims, wherein the output power determining means and error determining means comprise a programmable microcontroller (MC) connected to an interface circuit (IFC).
15. Power control device according to any of the preceding claims, wherein the output power determining means can be connected to one or more switching elements of the electrical power supply for controlling the output power by controlling the switching of the switching elements.
16. Apparatus for supplying power to a discharge lamp, comprising:
an electrical power supply for supplying power to the lamp;
power level determining means for determining the actual level of the lamp power;
error determining means for determining the error between the determined lamp power level and a specified reference power level;
output power determining means, connected to the power supply for controlling the output power so as to adjust the output power to be supplied to the lamp towards said reference power level only if the error falls outside a specified window.
17. Apparatus according to claim 16, wherein the DC power supply (UDC) is controllable and the power determining means control the output voltage (UDC) of the DC power supply as to adjust the output power.
18. Apparatus according to claim 16, wherein the operation frequency (at GHB1, GHB2) is controllable and the power determining means control the output voltage (UDC) of the DC power supply so as to adjust the output power.
19. Apparatus according to any of claims 16-18, wherein the power supply is a switched-mode power supply (SMPS).
20. Apparatus according to any of claims 16-19, wherein the power supply is of the constant frequency pulse width modulation (PWM) type.
21. Apparatus according to any of claims 16-20, comprising a power control device according to any of claims 1-15.
22. Method of controlling the power supplied to a discharge lamp operated by an electrical power supply, comprising:
determining the actual power level of the power consumed by the lamp;
determining the error between the actual lamp power level and a specified reference power level;
if the error falls within a specified window, maintaining the output power level supplied to the lamp;
if the error falls outside the specified window, adjusting the output power level supplied to the lamp towards said reference power level.
23. Method according to claim 22, wherein the window width is dependent on the specified reference power level.
24. Method according to claim 22 or 23, wherein the window width is decreased towards low reference power levels and increased towards high reference power levels.
25. Method according to claim 22, 23 or 24, wherein the window width is variable between a maximum window width and a minimum window width, the ratio of which is approximately {fraction (110)} or more.
26. Method according to any of the claims 22-25, wherein the reference power level is a determined by a preset nominal lamp power and an input dimming level.
27. Method according to any of claims 22-26, wherein a power control device according to any of claims 1-15 andor an apparatus according to any of claims 16-21 is applied.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A wiring substrate comprising:
a multilayer portion which has a substrate main surface and a substrate reverse surface, the multilayer portion including interlayer insulation layers and a conductor layer that are layered;
a plurality of projection electrodes arranged within an electrode formation region on the substrate main surface; and
via conductors, which electrically connect the plurality of projection electrodes and the conductor layer to each other, provided at a top layer, which is the interlayer insulation layer which forms the substrate main surface;
wherein at least one among the plurality of projection electrodes has a larger outer diameter than an outer diameter of the respective via conductor and is a variant projection electrode which has a roughened upper surface.
2. The wiring substrate according to claim 1,
wherein the variant projection electrode has a roughened lateral surface in addition to the roughened upper surface.
3. The wiring substrate according to claim 1,
wherein a surface roughness Ra of the variant projection electrode is from 0.1 \u03bcm to 0.6 \u03bcm.
4. The wiring substrate according to claim 1,
wherein the variant projection electrode has an equal outer diameter from an upper end to a lower end and is formed in a shape of a column as a whole.
5. The wiring substrate according to claim 1,
wherein all of the plurality of projection electrodes which are present within the electrode formation region comprise variant projection electrodes.
6. The wiring substrate according to claim 1,
wherein the plurality of projection electrodes are arrayed in vertical and horizontal rows along a surface direction of the substrate main surface within the electrode formation region, and
wherein, among the plurality of projection electrodes, projection electrodes positioned at an outer periphery of the electrode formation region comprise variant projection electrodes.
7. The wiring substrate according to claim 1,
wherein the variant projection electrode is in a flip chip interconnection with a connecting terminal arranged at a bottom surface side of a component via a solder bump placed on the upper surface of the variant projection electrode.
8. A method of manufacturing a wiring substrate, comprising:
preparing a multilayer portion which has a substrate main surface and a substrate reverse surface, the multilayer portion including interlayer insulation layers and a conductor layer that are layered;
forming a via hole which penetrates a top layer, which is the interlayer insulation layer which forms the substrate main surface;
forming a resist on the top layer;
forming an opening on the resist which has a larger inner diameter than that of the via hole;
forming a via conductor at the via hole and a projection electrode at the opening by plating the inner side of the via hole and the opening; and
forming a variant projection electrode by roughening an upper surface of the projection electrode.
9. The method of manufacturing a wiring substrate according to claim 8,
wherein, in forming the variant projection electrode, the upper surface of the projection electrode is roughened by etching the projection electrode.
10. The method of manufacturing a wiring substrate according to claim 8,
wherein, informing the variant projection electrode, the upper surface of the projection electrode is roughened by pressing the upper surface of the projection electrode using a pressing jig which has a rough pressing surface.
11. The method of manufacturing a wiring substrate according to claim 9,
wherein, after forming the variant projection electrode, a surface plated layer which has a roughened surface corresponding to a shape of the upper surface of the variant projection electrode is formed on a surface of the variant projection electrode by displacement plating.
12. The method of manufacturing a wiring substrate according to claim 10,
wherein, after forming the variant projection electrode, a surface plated layer which has a roughened surface corresponding to a shape of the upper surface of the variant projection electrode is formed on a surface of the variant projection electrode by displacement plating.