All The Claims

1. A flip chip device, comprising:
a substrate, having at least one conductive trace thereon;
a chip having an active area on the center of the chip and an outer periphery surrounding the active area, a plurality of connecting pads being formed on the outer periphery of the chip, a plurality of compliant bumps being formed and disposed on the active area, each compliant bump being connected electrically with a corresponding one of the plurality of connecting pads via at least one metal layer, the compliant bumps being centrally disposed on the center of the chip for electrically connecting to the conductive trace on the substrate; and
a first adhesive partially daubed between the substrate and the chip, the first adhesive being disposed under the active area of the chip to be aligned with the active area for jointing the compliant bumps of the chip with the conductive trace of the substrate, the outer periphery of the chip being suspended from the substrate without the first adhesive filling a space between the chip and the substrate.
2. The flip chip device as in claim 1, further comprising a lower metal layer and an upper metal layer, respectively disposed on a lower surface and an upper surface of the compliant bumps, wherein
the upper metal layer covers two opposite side surfaces of the compliant bumps to connect with the lower metal layer for electrically connecting the substrate and the chip, and
another two opposite side surfaces of the compliant bumps are free of the upper metal layer covered thereon.
3. The flip chip device as in claim 2, wherein the lower metal layer is a Ti\u2014W metal layer.
4. The flip chip device as in claim 2, wherein the bumps are formed with polymer.
5. The flip chip device as in claim 2, wherein the upper metal layer is an Au metal layer.
6. The flip chip device as in claim 1, further comprising:
a plurality of non-conductive compliant bumps disposed in a corner of the chip for maintaining the parallel of the joint between the substrate and the chip.
7. The flip chip device as in claim 1, wherein the substrate is an organic substrate, a ceramic substrate, a glass substrate, a silicon substrate or a GaAs substrate.
8. The flip chip device as in claim 1, wherein the first adhesive is an anisotropic film, a UV glue, or a non-conductive glue.
9. The flip chip device as in claim 1, further comprising:
a second adhesive daubed in the remaining gap between the substrate and the chip.
10. The flip chip device as in claim 1, further comprising:
at least one passive component electrically disposed on the substrate in the remaining gap between the substrate and the chip.
11. A manufacturing method of a flip chip device, comprising the steps of:
providing a substrate, the substrate having at least one conductive trace thereon;
providing a first adhesive in select first areas on the substrate, with select second areas on the substrate being free of the adhesive;
pressing a chip on the first adhesive and curing the first adhesive for bonding the chip and the substrate, the chip having an active area on the center of the chip and an outer periphery surrounding the active area;
forming a plurality of connecting pads on the outer periphery of the chip;
forming a plurality of compliant bumps on the active area, the compliant bumps being centrally disposed on the center of the chip for electrically connecting to the conductive trace on the substrate;
disposing the cured first adhesive under the active area of the chip to be aligned with the active area for jointing the compliant bumps of chip with the conductive trace of the substrate, so that the outer periphery of the chip is suspended from the substrate without the first adhesive filling a space between the chip and the substrate; and
connecting each compliant bump connecting electrically with a corresponding one of the plurality of connecting pads via at least one metal layer.
12. The manufacturing method as in claim 11, wherein in the step of pressing a chip on the first adhesive and curing the first adhesive, the first adhesive is cured below 200\xb0 C.
13. The manufacturing method as in claim 11, further comprising the step of:
electrically disposing at least one passive component on the substrate in the remaining gap between the substrate and the chip.
14. The manufacturing method as in claim 11, further comprising the step of:
providing a second adhesive for filling into the remaining gap between the substrate and the chip.
15. The manufacturing method as in claim 14, wherein the second adhesive has higher anti-moisture property than the first adhesive.
16. The manufacturing method as in claim 11, wherein in the step of disposing the cured first adhesive, the area of the disposed first adhesive for jointing the compliant bumps of chip with the conductive trace of the substrate is smaller than or equal to the area of the active area.
17. The flip chip device as in claim 9, wherein the second adhesive has higher anti-moisture property than the first adhesive.
18. The flip chip device as in claim 1, wherein the area of the disposed first adhesive for jointing the compliant bumps of chip with the conductive trace of the substrate is smaller than or equal to the area of the active area.

The claims below are in addition to those above.
All refrences to claims which appear below refer to the numbering after this setence.

1. Thioic acids according to formula II;
Wherein X is O, N or S and n>1;
R1 is chosen from (\u2014CH2\u2014)2, \u2014CH2\u2014O\u2014CH2\u2014 or (\u2014CH2\u2014)3,
R2 is chosen from a low molecular weight compound having a Mw<1000 Da, an oligomer or a polymer.
2. Thioic acids according to claim 1 whereby R2 is chosen from a degradable oligomer or polymer.
3. Thioic acids according to claim 2 whereby R2 is chosen from a degradable oligomer or polymer selected from the group of oligo-or poly(lactide) (PLLA), oligo-or polyglycolide (PGA), fico-oligomers or copolymers of lactic acid and glycolic acid, oligo-or poly(anhydrides), oligo-or poly(trimethylenecarbonates), oligo-or poly(orthoesters), oligo-or poly(dioxanones), oligo-or poly(c-caprolactones) (PCL), oligo-or polyesteramides.
4. Thioic acids according to claim 1 whereby n=2.
5. Thioic acids according to claim 1 whereby n>2.
6. Process for the preparation of thioic acids according to claim 1 comprising the steps of
a. reacting an alcohol, amine or thiol compound according to formula Ill with glutaric thioanhydride, succinic thioanhydride or diglycolic thioanhydride
b. forming a compound of formula II
R2\ue8a0Y)w \u2003\u2003Formula III
Wherein R2 is chosen from a low molecular weight compound having a Mw<1000 Da, oligomer or polymer, Y is OH, NH2, R3NH, SH and w>1.
R3 may be chosen from the same group as R2.
R2 and R3 may be the same or different.
7. Process for the preparation of thioic acids according to claim 1 said process comprising the steps of
a. reacting an alcohol, amine or thiol compound according to formula III with glutaric acid, succinic anhydride, diglycolic anhydride forming a compound of formula IV
b. converting compound of formula IV by the use of H2S to thioic acids according to formula II,
wherein X is chosen from O, N or S and w>1,
R1 is chosen from (\u2014CH2\u2014)2, \u2014CH2\u2014O\u2014CH2\u2014 or (\u2014CH2\u2014)3;
R2 is chosen from a low molecular weight compound having a Mw<1000 Da, oligomer or polymer, Y is OH, NH2, R3NH or SH and R3 may be chosen from the same group as R2 whereby R2 and R3 may be the same or different.
8. Polythioesters comprising thioic acids according to claim 1.
9. Polythioesters comprising thioic acids according to formula I;
Wherein X is O, N or S and whereby
R1 is chosen from (\u2014CH2\u2014)2, \u2014CH2\u2014O\u2014CH2\u2014 or (\u2014CH2\u2014)3; R2 is chosen from a low molecular weight compound having a Mw<1000 Da, oligomer or polymer.
10. Polythioesters according to claim 9 whereby R2 is chosen from polyethyleneglycol (PEG) or a degradable polymer or oligomer.
11. Polythioesters according to claim 9 whereby R2 is a degradable oligomer or polymer selected from the group of oligo-or poly(lactide) (PLLA), oligo-or polyglycolide (PGA), co-oligomers or copolymers of lactic acid and glycolic acid, oligo-or poly(anhydrides), oligo-or poly(trimethylenecarbonates), oligo-or poly(orthoesters), oligo-or poly(dioxanones), oligo-or poly(\u03b5-caprolactones) (PCL), oligo-or polyesteramides.
12. Polythioesters according to claim 8 obtainable by mixing a compound Z comprising at least one ethylenically unsaturated group with thioic acids according to formula I
Wherein X is O, N or S and whereby
R1 is chosen from (\u2014CH2\u2014)2, \u2014CH2\u201413 CH2\u2014 or (\u2014CH2\u2014)3 ; R2 is chosen from a low molecular weight compound having a Mw<1000 Da, oligomer or polymer.
13. Polythioesters according to claim 12 wherein the ethylenically unsaturated group of compound Z is chosen from the group consisting of alkene, vinyl ether, allyl, acrylate, fumarate, methacrylate or norbornene.
14. Medical device comprising polythioesters according to claim 8.
15. Use of the polythioesters according to claim 8 in drug delivery applications.
16. Micro-,nanoparticles or micelles comprising the thioic acids according to claim 1.
17. Coatings comprising the thioic acids according to claim 1.
18. Hydrogels comprising the thioic acids according to claim 1.

1. A random access memory, comprising:
a memory cell including at least one access device, the at least one access device being switched on or off in accordance with a signal on a wordline to conduct a memory operation through the at least one access device, the at least one access device configured to gate a bitline signal; and
a logic circuit coupled to the wordline to receive and gate the wordline signal in accordance with an enable signal at the logic circuit, wherein the enable signal ensures that an arrival of the bitline signal at the at least one access device occurs at or before the arrival of the signal on the wordline.
2. The memory as recited in claim 1, wherein the memory cell includes a static random access memory cell.
3. The memory as recited in claim 1, wherein the at least one access device includes a bitline transistor.
4. The memory as recited in claim 1, wherein the logic circuit includes a transistor which selectively couples the wordline to a gate of the at least one access device.
5. The memory as recited in claim 1, wherein the enable signal is timed by a system clock signal.
6. The memory as recited in claim 1, further comprising a bit select circuit having cross-coupled transistors gated by a bit decode signal, wherein the cross-coupled transistors are sized to improve performance of memory operations.
7. The memory as recited in claim 1, wherein the enable signal includes a bit select signal.
8. The memory as recited in claim 4, wherein the selective coupling of the transistor to the wordline is controlled by the enable signal which includes a bit decode signal.
9. A static random access memory, comprising:
a memory cell including first and second access transistors respectively coupled to first and second bitlines, the first and second access transistors having gates coupled to a connection node; and
a logic circuit coupled to a wordline, the logic circuit selectively coupling the wordline to the connection node in accordance with an enable signal, wherein the enable signal provides for an arrival of the bitline signal at or before a trigger signal of the wordline such that the trigger signal on the wordline is synchronized with bit line signals to ensure an arrival of the bit line signals at or before the trigger signal to reduce or eliminate an early read condition.
10. The memory as recited in claim 9, wherein the logic circuit includes a transistor, which selectively couples the wordline to the connection node.
11. The memory as recited in claim 9, further comprising a bit select circuit having cross-coupled transistors gated by a bit decode signal, wherein the cross-coupled transistors are sized to improve performance of memory operations.
12. The memory as recited in claim 9, wherein the enable signal includes a bit select signal.
13. The memory as recited in claim 10, wherein the selectively coupling of the connection node to die wordline is controlled by an enable signal, which includes a bit decode signal.
14. The memory as recited in claim 13, wherein the enable signal is timed by a system clock signal.

The claims below are in addition to those above.
All refrences to claims which appear below refer to the numbering after this setence.

1. A string for a musical instrument, the string comprising an amorphous metal alloy consisting essentially of iron (Fe), chromium (Cr), manganese (Mn), molybdenum (Mo), carbon (C), yttrium (Y) and boron (B).
2. The string according to claim 1, wherein the amorphous metal alloy comprises the following atomic percentages:
iron (Fe)
\u226640%
chromium (Cr)
<25%
manganese (Mn)
15%-25%
molybdenum (Mo)
<25%
carbon (C)
10%-25%
boron (B)
10%-25%
yttrium (Y)
\u2009\u22664%.
3. A string for a musical instrument having a fret board, the string comprising amorphous metal, wherein the string has a greater sustain of vibration than a string of identical dimension comprising a crystalline structure as measured by the ratio of the decay time of the fifth harmonic to the decay time of the fundamental frequency.
4. The string according to claim 3, wherein the ratio is greater than 0.55.
5. The string according to claim 3, wherein the amplitude of the second harmonic of the string is greater than the amplitude of the fundamental frequency of the string.
6. A musical instrument string comprising an amorphous metal alloy, wherein said amorphous metal alloy consists essentially of zirconium (Zr), titanium (Ti), nickel (Ni), copper (Cu), and beryllium (Be).
7. The string according to claim 6, wherein said amorphous metal alloy comprises the following atomic percentages:
zirconium (Zr)
about 41.2
titanium (Ti)
about 13.8
nickel (Ni)
about 10
copper (Cu)
about 12.5
beryllium (Be)
about 22.5.
8. A musical instrument string comprising an amorphous metal alloy, wherein said amorphous metal alloy consists essentially of zirconium (Zr), hafnium (Hf), aluminum (Al), nickel (Ni), copper (Cu), iron (Fe), cobalt (Co) and manganese (Mn).
9. The string according to claim 8, wherein said amorphous metal alloy comprises the following atomic percentages:
zirconium (Zr) and hafnium (Hf) combined
about 25-about 85
aluminum (Al)
about 5-about 35
nickel (Ni), Copper (Cu), Iron (Fe), cobalt (Co) and
about 5-about 70.
manganese (Mn) combined