All The Claims

1. A belt hangar, comprising:
a body including opposing inner and outer walls and a bridge member spanning between the inner and outer walls; and
a keeper movably supported on the body and extending between the inner and outer walls distal from the bridge member, the inner wall, the outer wall, and the keeper bordering a throat opening adapted to receive a belt or a waistband, the keeper being selectively movable along at least one of the inner and outer walls to adjust the size of the throat opening.
2. A belt hangar according to claim 1, further comprising:
a set of engagement features spaced apart along the body; and
a corresponding locking member operably associated with the keeper and adapted to interlock with the engagement features at multiple discrete positions for adjusting the position of the keeper.
3. A belt hangar according to claim 1, wherein the body is formed by injection molding.
4. A belt hangar according to claim 1, further comprising a track for guiding the movement of the keeper.
5. A belt hangar according to claim 4, wherein the track extends along one of the inner and outer walls.
6. A belt hangar according to claim 5, wherein the keeper includes a channel that fits the track for slidably supporting the keeper on the track.
7. A belt hangar according to claim 4, further comprising:
a set of engagement features spaced apart along the track and associated with one of the body and the keeper; and
a corresponding locking member associated with the other of the body and the keeper, the locking member adapted to interlock with the engagement features at multiple discrete positions along the track for adjusting the position of the keeper.
8. A belt hangar according to claim 1, wherein the body is formed of unitary one-piece construction.
9. A belt hangar according to claim 1, wherein the inner and outer walls include free ends opposite the bridge member.
10. A belt hangar according to claim 9, wherein the free ends of the inner and outer walls are biased toward each other.
11. A belt hangar according to claim 1, wherein the body includes a belt loop.
12. A belt hangar according to claim 1, wherein the keeper is selectively adjustable to fit a belt having a width of between approximately 1.25 inch and approximately 2.25 inches.
13. A belt hangar according to claim 1, wherein the keeper further comprises a jaw extending between the inner and outer walls.
14. A belt hangar according to claim 1, further comprising an attachment point supported on the body for removably securing an object to the body.
15. A belt hangar according to claim 14, wherein the attachment point includes a dovetail mounting rail.
16. A belt clip comprising:
a body including opposing inner and outer walls and a bridge portion spanning between the inner and outer walls, the inner wall, the outer wall, and the bridge portion defining a throat opening of the belt clip adapted to receive a belt or a waistband; and
a keeper supported on the body for selective movement along at least one of the inner and outer walls, the keeper extending adjacent the throat opening and opposite the bridge portion to thereby form an adjustable boundary of the throat opening.
17. A belt clip according to claim 16, further comprising:
a set of engagement features spaced apart along the body; and
a corresponding locking member operably associated with the keeper and adapted to interlock with the engagement features at multiple discrete positions for incrementally adjusting the position of the keeper.
18. A belt clip according to claim 16, wherein the body is formed by injection molding.
19. A belt clip according to claim 16, further comprising a track extending along one of the inner and outer walls.
20. A belt clip according to claim 16, wherein the keeper includes a channel that fits the track for slidably supporting the keeper on the track.
21. A belt clip according to claim 19, further comprising:
a set of engagement features spaced apart along the track and associated with one of the body and the keeper; and
a corresponding locking member associated with the other of the body and the keeper, the locking member adapted to interlock with the engagement features at multiple discrete positions along the track for adjusting the position of the keeper.
22. A belt clip according to claim 16, wherein the inner and outer walls include free ends opposite the bridge member that are biased toward each other.
23. A belt clip according to claim 16, wherein the keeper further comprises a jaw extending between the inner and outer walls.
24. A belt clip according to claim 16, further comprising an attachment point supported on the body for removably securing an object to the body.
25. A belt clip according to claim 24, wherein the attachment point includes a dovetail mounting rail.
26. In a belt clip including opposing inner and outer walls extending downwardly from a bridge portion, the bridge portion and the inner and outer walls defining a throat opening therebetween for fitting the belt clip over a belt or a waistband, the improvement comprising:
a keeper slidably mounted to at least a supporting one of the inner and outer walls for movement in a generally vertical direction therealong, the keeper positioned below the bridge portion and extending from the supporting wall toward the other of the inner and outer walls to thereby form a lower boundary of the throat opening, and the keeper further including means for securing the keeper at a selected position along the supporting wall.
27. A belt clip according to claim 26, wherein the means for securing the keeper at a selected position along the body includes:
a set of engagement features spaced apart along the body; and
a corresponding locking member operably associated with the keeper and adapted to interlock with the engagement features at multiple discrete positions for incrementally adjusting the position of the keeper.
28. A belt clip according to claim 26, wherein the keeper is formed by injection molding.
29. A belt clip according to claim 26, further comprising a track formed in one of the inner and outer walls, and wherein the keeper includes a channel that fits the track for slidably supporting the keeper on the track.
30. A belt clip according to claim 26, wherein the keeper further comprises a jaw extending between the inner and outer walls.
31. A belt clip according to claim 26, further comprising an attachment point supported on the body for removably securing an object to the body.
32. A belt clip according to claim 31, wherein the attachment point includes a dovetail mounting rail.

The claims below are in addition to those above.
All refrences to claims which appear below refer to the numbering after this setence.

1. A battery management unit comprising:
a plurality of monitoring IC chips, each of the monitoring IC chips being configured to record at least one operating variable of at least one battery cell or a battery module including a predetermined number of battery cells and each of the monitoring IC chips being connected to a first bus;
a base monitoring IC chip which is likewise connected to the first bus and is configured to communicate with each of the monitoring IC chips via the first bus; and
a control device, the base monitoring IC chip and the control device being connected to a second bus and being configured to communicate with one another via the second bus, and the base monitoring IC chip and the control device being located on a common printed circuit board.
2. The battery management unit as claimed in claim 1, wherein the base monitoring IC chip is configured to communicate via the first bus using a first bus protocol and via the second bus using a second bus protocol.
3. The battery management unit as claimed in claim 1, wherein the second bus is located on the printed circuit board in such a manner that the second bus is protected from electromagnetic irradiation and emission.
4. The battery management unit as claimed in claim 1, wherein the base monitoring IC chip is not configured to record an operating variable of the at least one battery cell or the battery module.
5. The battery management unit as claimed in claim 1, wherein at least some of the monitoring IC chips are connected to the first bus in a daisy chain topology.
6. the battery management unit as claimed in claim 1, further comprising:
a DC isolation unit configured to DC-isolate the base monitoring IC chip and the control device from one another and located on the printed circuit board.
7. The battery management unit as claimed in claim 1, wherein each of the monitoring IC chips is configured to record a voltage of the at least one battery cell or the battery module.
8. The battery management unit as claimed in claim 1, wherein the base monitoring IC chip on the first bus is configured as a master, and each of the monitoring IC chips on the first bus are configured as a slave.
9. The battery management unit as claimed in claim 1, further comprising a voltage supply unit configured to provide a supply voltage for the base monitoring IC chips and located on the printed circuit board.
10. The battery management unit as claimed in claim 1, wherein:
the base monitoring IC chip is configured to record at least one further operating variable of a battery including the at least one battery cells, and
the at least one further operating variable includes a battery current or a total battery voltage.
11. A battery comprising:
a plurality of battery cells; and
a battery management unit including
a plurality of monitoring IC chips, each of the monitoring IC chips being configured to record at least one operating variable of at least one battery cell of the plurality of battery cells and each of the monitoring IC chips being connected to a first bus,
a base monitoring IC chip which is likewise connected to the first bus and is configured to communicate with each of the monitoring IC chips via the first bus, and
a control device, the base monitoring IC chip and the control device being connected to a second bus and being configured to communicate with one another via the second bus, and the base monitoring IC chip and the control device being located on a common printed circuit board.
12. An electric motor vehicle, comprising:
a battery including a plurality of battery cells and a battery management unit having (i) a plurality of monitoring IC chips, each of the monitoring IC chips being configured to record at least one operating variable of at least one battery cell of the plurality of battery cells and each of the monitoring IC chips being connected to a first bus, (ii) a base monitoring IC chip which is likewise connected to the first bus and is configured to communicate with each of the monitoring IC chips via the first bus, and (iii) a control device, the base monitoring IC chip and the control device being connected to a second bus and being configured to communicate with one another via the second bus, and the base monitoring IC chip and the control device being located on a common printed circuit board.

1. A method for identifying a User Equipment(s) (UE(s)) interfering with a pico Base Station (BS) located within the coverage of a macro BS in a wireless communication system, the method comprising:
receiving, by the macro BS, an UpLink (UL) interference control request message from the pico BS and signaling a random access preamble for UL interference control to each of a plurality of candidate interfering UEs served by the macro BS; and
receiving from the pico BS information about received signal strength of the random access preambles transmitted by the plurality of candidate interfering UEs and determining a UE(s) causing UL interference to the pico BS based on the information about received signal strength,
wherein transmission power of each of the random access preambles is set specifically to the random access preamble.
2. The method according to claim 1, wherein a maximum transmission number for each of the random access preambles is set specifically to the random access preamble.
3. The method according to claim 1, wherein the transmission power of each of the random access preambles is fixed.
4. The method according to claim 1, wherein a power ramping step (powerRampingStep) for each of the random access preambles is set specifically to the random access preamble.
5. The method according to claim 1, wherein the random access preambles are shared between the macro BS and the pico BS in advance.
6. The method according to claim 1, further comprising, after transmitting random access responses in response to the random access preambles, receiving information about transmission power of a random access preamble used last by each of the plurality of candidate interfering UEs from the plurality of candidate interfering UEs.
7. The method according to claim 6, further comprising: transmitting the information about transmission power of the random access preamble used last by each of the plurality of the candidate interfering UEs to the pico BS.
8. The method according to claim 7, further comprising: receiving from the pico BS information about received signal strength of the random access preamble, which corresponds to the transmission power of the random access preamble used last by each of the plurality the candidate interfering UEs.
9. A method for identifying a User Equipment(s) (UE(s)) interfering with a pico Base Station (BS) located within the coverage of a macro BS in a wireless communication system, the method comprising:
transmitting, by the pico BS, an UpLink (UL) interference control request message to the macro BS, detecting random access preambles transmitted by a plurality of candidate interfering UEs according to a random access procedure for UL interference control triggered by the UL interference control request message and received signal strength of the random access preambles, and transmitting information about the detected received signal strength of the random access preambles to the macro BS,
wherein transmission power of each of the random access preambles is set specifically to the random access preamble.
10. The method according to claim 9, wherein a maximum transmission number of each of the random access preambles is set specifically to the random access preamble.
11. The method according to claim 9, wherein the transmission power of each of the random access preambles is fixed.
12. The method according to claim 9, wherein a power ramping step (powerRampingStep) for each of the random access preambles is set specifically to the random access preamble.
13. The method according to claim 9, wherein the random access preambles are shared between the macro BS and the pico BS in advance.
14. The method according to claim 9, further comprising receiving from the macro BS information about transmission power of a random access preamble used last by each of the plurality of candidate interfering UEs.
15. The method according to claim 14, further comprising transmitting to the macro BS information about received signal strength of the random access preamble, which corresponds to transmission power of the random access preamble used last by each of the plurality of candidate interfering UEs.
16. A macro Base Station (BS) for identifying a User Equipment(s) (UE(s)) interfering with a pico BS located within the coverage of the macro BS in a wireless communication system, the macro BS comprising:
a Radio Frequency (RF) unit; and
a processor configured to control the RF unit,
wherein the processor is configured to receive an UpLink (UL) interference control request message from the pico BS and signaling a random access preamble for UL interference control to each of a plurality of candidate interfering UEs served by the macro BS, to receive from the pico BS information about received signal strengths of the random access preambles transmitted by the plurality of candidate interfering UEs, and to determine a UE(s) causing UL interference to the pico BS based on the information about received signal strength, and
wherein transmission power of each of the random access preambles is set specifically to the random access preamble.
17. A pico Base Station (BS) located within the coverage of a macro BS, for identifying a User Equipment(s) (UE(s)) interfering with the pico BS in a wireless communication system, the pico BS comprising:
a Radio Frequency (RF) unit; and
a processor configured to control the RF unit,
wherein the processor is configured to transmit an UpLink (UL) interference control request message to the macro BS, to detect random access preambles transmitted by a plurality of candidate interfering UEs according to a random access procedure for UL interference control triggered by the UL interference control request message and received signal strength of the random access preambles, and to transmit information about the detected received signal strength of the random access preambles to the macro BS, and
wherein transmission power of each of the random access preambles is set specifically to the random access preamble.
The claims below are in addition to those above.
All refrences to claims which appear below refer to the numbering after this setence.

1. A method for evaluating reliability of a semiconductor chip, comprising the steps of:
determining strain at a location in structure including determining strain at the bottom of a via in contact with a liner in the via;
evaluating failures in a plurality of the structures after stress cycling to determine a strain threshold with respect to a feature characteristic; and
evaluating structures on a chip based on the feature characteristic to predict reliability based on the strain threshold and the feature characteristic.
2. The method as recited in claim 1, wherein the feature characteristic includes a liner thickness formed in via holes and the step of evaluating structures on a chip based on the feature characteristic to predict reliability includes measuring a thickness of a liner to predict electrical failures.
3. The method as recited in claim 1, wherein the step of evaluating failures in a plurality of the structures includes the step of thermal cycling the plurality of structures.
4. The method as recited in claim 1, wherein the step of evaluating failures in a plurality of the structures includes the step of determining the strain threshold such that below the threshold no failures occur in the structures.
5. The method as recited in claim 1, wherein the strain is generated by thermal mismatch and the method further comprises the step of altering geometry of the feature characteristic to reduce strain.
6. The method as recited in claim 5, wherein the step of altering includes altering a thickness of a via liner.
7. The method as recited in claim 1, wherein the strain is generated by thermal mismatch and the method further comprises the step of altering material selection of the feature characteristic to reduce strain.
8. The method as recited in claim 7, wherein the thermal mismatch is greater than 30 ppm\xb0 C. between the feature characteristic and its surroundings.
9. A method for evaluating reliability of a semiconductor chip, comprising the steps of:
providing a semiconductor chip design having a metal structure therein, the metal structure being in contact with dielectric material;
determining strain at a location at or adjacent to the metal structure due to thermal stress;
evaluating failures in a plurality of the metal structures to determine a strain threshold for failures;
correlating the strain threshold to characteristics of the metal structure, wherein the characteristics of the metal structure include a liner thickness formed in via holes; and
predicting reliability of semiconductor chips based upon measured characteristics of the metal structure including measuring a thickness of a liner to predict electrical failures.
10. The method as recited in claim 9, wherein the step of evaluating failures includes the step of thermal cycling the plurality of metal structures.
11. The method as recited in claim 9, wherein the step of evaluating failures includes the step of determining the strain threshold such that below the threshold no failures occur in the structures.
12. The method as recited in claim 9, wherein the strain is generated by thermal mismatch and the method further comprises the step of altering geometry or material selection of the metal structures to reduce strain.
13. The method as recited in claim 12, wherein the mismatch between the metal structure and the dielectric is greater than 30 ppm\xb0 C.