All The Claims

1. A method for updating a routing table, comprising:
receiving a route on a current node;
if the route is a best route, updating a local routing table with the best route; and
if the current node includes a master route distributor, distributing the best route associated with a classification rule to at least one remote node, wherein the remote node is enabled to update a remote routing table with the best route, and wherein the classification rule enables processing a racket based on contents of the packet; and
if the current node includes a slave route distributor, forwarding the route to the master route distributor.
2. The method of claim 1, wherein receiving the route further comprises receiving the route from a Route Table and Flow Manager (RTFM).
3. The method of claim 1, wherein distributing the best route to at least one remote node, further comprises distributing the best route to a route distributor on the remote node.
4. The method of claim 3, wherein the route distributor is a slave route distributor.
5. The method of claim 1, wherein updating the local route table further comprises:
if the route is received from a routing protocol on the current node, updating an internal route table; and
if the route is received from a routing protocol on a remote node, updating an external route table.
6. The method of claim 1, further comprising is a distributed routing platform for updating the locate route table and an external route table.
7. The method of claim 1, wherein receiving the route further comprises receiving the route from a routing protocol that comprises at least one of a static routing protocol, default routing protocol, Routing Information Protocols (RIPs), Open Shortest Path First (OSPF), Enhanced Interior Gateway Routing Protocol (EIGRP), ISIS, and Border Gateway Protocol (BGP).
8. The method of claim 1, wherein the classification rule further comprises at least one of an identifier of a route owner, and an instance of a routing protocol associated with the route.
9. The method of claim 1, wherein distributing the best route further comprises distributing the best route through an inter node communication.
10. The method of claim 1, further comprising receiving a notification that the route is the best route.
11. A router, comprising:
a slave route distributor on a first node that is configured to perform actions, including:
receiving a route, wherein the route is associated with a local routing protocol; and
if the route is a best route, updating a route table with the best route; and

a master route distributor on a second node that is coupled to the first node, and configured to perform actions, including:
receiving the route from the slave route distributor; and
distributing the route associated with a classification rule to another slave route distributor, wherein the other slave route distributor is configured to update another route table, and the classification rule enables processing a packet based on contents of the packet.
12. The router of claim 11, wherein the slave route distributor, master route distributor, and other slave route distributor each reside on a different node in a distributed routing platform.
13. The router of claim 11, wherein the node further comprises at least one of a transport service module, a control processor, and a routing engine.
14. The router of claim 11, wherein updating the route table further comprises updating an internal route table.
15. The router of claim 11, wherein updating another route table further comprises updating an external route table.
16. The router of claim 11, wherein the router is a distributed routing platform.
17. The router of claim 11, wherein the local routing protocol further comprises at least one of a static routing protocol, default routing protocol, Routing Information Protocols (RIPs), Open Shortest Path First (OSPF), Enhanced Interior Gateway Routing Protocol (EIGRP),ISIS, and Border Gateway Protocol (BGP).
18. The router of claim 11, wherein the classification rule further comprises at least one of an identifier of a route owner, and an instance of the local routing protocol associated with the route.
19. The router of claim 11, wherein the master route distributor is configured to perform further actions, including:
managing a join of a slave route distributor to the router; and
managing a leave of a slave route distributor to the router.
20. An apparatus, comprising:
a route table and flow manager on a first node that is configured to perform actions, including:
receiving a route;
determining if the route is a best route, and if the route is the best route, updating a first route table with the best route; and
a route distributor on the first node that is coupled to the route table and flow manager, and is configured to perform actions, including:
receiving the route from the route table and flow manager; and
if the route distributor is a master route distributor, distributing the best route associated with a classification rule to a slave route distributor on a second node, wherein the slave route distributor is enabled to update a second route table with the best route, and the classification rule enables processing a packet based on contents of the packet.
21. The apparatus of claim 20, wherein the first and second nodes further comprises at least one of a transport service module, a control processor, and a routing engine.
22. The apparatus of claim 20, wherein updating the first route table further comprises updating an internal route table.
23. The apparatus of claim 20, wherein updating the second route table further comprises updating an external route table.
24. The apparatus of claim 20, wherein receiving the route further comprises receiving the route from at least one of a static routing protocol, default routing protocol, Routing Information Protocols (RIPs), Open Shortest Path First (OSPF), Enhanced Interior Gateway Routing Protocol (EIGRP), ISIS, and Border Gateway Protocol (BGP).
25. The apparatus of claim 20, wherein the classification rule further comprises at least one of an identifier of a route owner, and an instance of a routing protocol associated with the route.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A high electric field radiation detector comprising:
a first electrode;
a second electrode;
a radiation detecting layer; and
an insulating soft polymer layer below the radiation detecting layer and in contact with at least the first electrode.
2. The radiation detector of claim 1, wherein the radiation detector is in a vertical configuration; and
wherein the insulating soft polymer layer is deposited on the first electrode and the second electrode is deposited above the radiation detecting layer.
3. The radiation detector of claim 1, wherein the radiation detector is in a lateral configuration; and
wherein the insulating soft polymer layer is deposited on the first electrode and the second electrode.
4. The radiation detector of claim 1, wherein the radiation detecting layer is selected from any one of amorphous selenium, amorphous silicon, mercuric iodide, lead oxide, and an organic semiconductor.
5. The radiation detector of claim 1, wherein the insulating soft polymer layer comprises a polyimide material.
6. The radiation detector of claim 1 further comprising a blocking layer above the radiation detecting layer.
7. The radiation detector of claim 1 further comprising a substrate layer connected to the first electrode on a surface opposite the insulating soft polymer layer.
8. The radiation detector of claim 7 wherein the substrate layer is selected from any one of a thin film transistor array, a complementary metal-oxide semiconductor transistor array, a plastic layer, a steel layer, and a glass layer.
9. The radiation detector of claim 8 further comprising readout electronics connected to the substrate layer.
10. The radiation detector of claim 1, wherein said first electrode and said second electrode are spaced laterally apart; said insulating soft polymer layer in contact with said first electrode and said second electrode; and wherein said radiation detecting layer is not in contact with said first electrode and said second electrode.
11. A method of manufacturing a radiation detector, the method comprising:
obtaining a radiation detecting layer;
depositing an insulating soft polymer layer on at least one side of the radiation detecting layer;
depositing a on one side of the insulating soft polymer layer; and
depositing a second electrode on the radiation detecting layer on a side opposite of the insulating soft polymer layer.
12. The method of claim 11, wherein depositing the radiation detecting layer comprises depositing any one of amorphous selenium, amorphous silicon, mercuric iodide, lead oxide, and an organic semiconductor on the polymer layer.
13. The method of claim 11, wherein depositing the insulating soft polymer layer comprises depositing a polyimide material on the first electrode.
14. The method of claim 11, wherein depositing the insulating soft polymer layer comprises spin coating and baking the insulating soft polymer on the first electrode.
15. The method of claim 11, wherein depositing the second electrode above the radiation detecting layer comprises:
evaporating or spin coating a blocking layer above the radiation detecting layer; and
depositing the second electrode on the blocking layer.
16. The method of claim 11 further comprising:
connecting the first electrode to a substrate layer; and
connecting the substrate layer to readout electronics.
17. The method of claim 11 further comprising operating under a high electric field.
18. A method of manufacturing a radiation detector, the method comprising:
obtaining a radiation detecting layer;
depositing an insulating soft polymer layer on one side of the radiation detecting layer; and
depositing a first electrode and a second electrode, the first and second electrode spaced laterally apart on the insulating soft polymer layer and the first and second electrodes not in contact with the radiation detecting layer.
19. The method of claim 18, wherein depositing the radiation detecting layer comprises depositing any one of amorphous selenium, amorphous silicon, mercuric iodide, lead oxide, and an organic semiconductor on the polymer layer.
20. The method of claim 18, wherein depositing the insulating soft polymer layer comprises depositing a polyimide material on the first electrode and the second electrode.
21. The method of claim 18, wherein depositing the insulating soft polymer layer comprises spin coating and baking the insulating soft polymer on the first electrode and the second electrode.
22. The method of claim 18 further comprising:
evaporating or spin coating a blocking layer above the radiation detecting layer.
23. The method of claim 18 further comprising:
connecting the first electrode and the second electrode to a substrate layer; and
connecting the substrate layer to readout electronics.
24. The method of claim 18 further comprising operating under a high electric field.
25. A high electric field radiation detector comprising:
a first electrode;
a second electrode;
a radiation detecting layer; and
an insulating soft polymer layer in contact with the radiation detecting layer and in contact with at least the first electrode.

Claims:

1. A semiconductor device comprising:
a semiconductor substrate;
an isolating insulation film formed on an isolated region of a main surface of said semiconductor substrate;
a pair of sourcedrain regions formed in an active region surrounded by the isolated region of the main surface of said semiconductor substrate;
a trench formed in said sourcedrain regions;
a gate electrode formed on a main surface of the active region of said semiconductor substrate through a gate insulating film;
at least one interlayer insulating film formed to coat said isolating insulation film, said sourcedrain regions, said trench, and said gate electrode;
a wiring layer reaching said trench through an opening provided on said at least one interlayer insulating film; and
a capacitor connected to one of said pair of sourcedrain regions through said wiring layer.
2. A semiconductor device as defined in claim 1, wherein said trench is formed deeper into said semiconductor substrate than said sourcedrain regions, and said wiring layer comprises a first wiring layer formed by filling up said trench with a material having an energy band gap larger than silicon, and a second wiring layer connected to said first wiring layer.
3. A semiconductor device as defined in claim 2, wherein said first wiring layer is composed of silicon carbide.
4. A semiconductor device as defined in claim 1, wherein said trench is formed deeper into said semiconductor substrate than said sourcedrain regions, and said semiconductor device further comprises a silicon oxide film formed on a boundary surface between said wiring layer and said semiconductor substrate.
5. A semiconductor device as defined in claim 1, wherein said trench is formed on a surface of said sourcedrain regions, said one of said pair of sourcedrain regions connected to said capacitor is adjacent to said isolating insulation film, and said trench formed on the surface of said sourcedrain regions forms a part of a surface of an end of said isolating insulation film.
6. A semiconductor device comprising:
a semiconductor substrate;
an isolating insulation film formed on an isolated region of a main surface of said semiconductor substrate;
a pair of sourcedrain regions formed in an active region surrounded by the isolated region of the main surface of said semiconductor substrate;
a gate electrode formed on a main surface of the active region of said semiconductor substrate through a gate insulating film;
at least one an interlayer insulating film formed to coat said isolating insulation film, said sourcedrain regions, said trench, and said gate electrode;
a wiring layer formed by filling up a contact hole reaching said sourcedrain regions through an opening provided on said at least one interlayer insulating film;
a capacitor connected to one of said pair of sourcedrain regions through said wiring layer; and
a film restraining a leakage current formed in said wiring layer apart from said capacitor.
7. A semiconductor device as defined in claim 6, wherein said wiring layer and said film are both composed of polycrystal silicon, and an impurity concentration of said film is lower than an impurity concentration of said wiring layer.
8. A semiconductor device as defined in claim 6, wherein said film is formed of a silicon oxide film.
9. A semiconductor device as defined in claim 6, wherein said film is composed of a material having an energy band gap larger than of said wiring layer.
10. A semiconductor device as defined in claim 9, wherein said film is formed of silicon carbide.
11. A manufacturing method of a semiconductor device comprising the steps of:
forming an isolating insulation film on an isolated region of a main surface of a semiconductor substrate;
forming a gate electrode on the main surface of said semiconductor substrate through a gate insulating film;
forming a pair of sourcedrain regions in an active region surrounded by said isolated region of the main surface of said semiconductor substrate;
forming a side wall on a side of said gate electrode;
forming a trench by etching said sourcedrain regions;
forming a first wiring layer by filling up said trench with a first conductive material;
forming at least one interlayer insulating film to coat said isolating insulation film, said sourcedrain regions, said trench, and said gate electrode;
forming an opening reaching from a surface of said at least one interlayer insulating film to a surface of said first wiring layer;
forming a second wiring layer by filling up said opening with a second conductive material; and
forming a capacitor connected to one of said pair of sourcedrain regions through said first and second wiring layers.
12. A manufacturing method of a semiconductor device as defined in claim 11, wherein said trench is formed deeper into said semiconductor substrate than said sourcedrain regions, and the first conductive material is composed of silicon carbide.
13. A manufacturing method of a semiconductor device as defined in claim 11, further comprising the steps of:
forming a silicon oxide film by thermal oxidation, after forming said trench deeper into said semiconductor substrate than said sourcedrain regions; and
leaving said silicon oxide film only on a part of a bottom surface of said trench where said semiconductor substrate is exposed, by etching back.
14. A manufacturing method of a semiconductor device as defined in claim 11, comprising the steps of:
forming a mask coating a surface of said isolating insulation film other than at an end of said isolating insulation film; and
removing said one of said pair of sourcedrain regions to which said capacitor is connected and a surface of said isolating insulation film by etching using the side wall and said mask, and forming a trench shallower into said semiconductor substrate than said sourcedrain region and in which a part of the surface of the end of said isolating insulation film is removed.
15. A manufacturing method of a semiconductor device comprising the steps of:
forming an isolating insulation film on an isolated region of a main surface of a semiconductor substrate;
forming a gate electrode on the main surface of said semiconductor substrate through a gate insulating film;
forming a pair of sourcedrain regions in an active region surrounded by said isolated region of the main surface of said semiconductor substrate;
forming a side wall on a side of said gate electrode;
forming at least one interlayer insulating film to coat said isolating insulation film, said sourcedrain regions, said trench, and said gate electrode;
forming an opening for forming a wiring layer connected electrically to one of said pair of sourcedrain region on said at least one interlayer insulating film;
forming a first wiring layer of said wiring layer by filling up to about halfway of said opening with a first layer of a first material;
forming a second wiring layer of said wiring layer with a second material placed on the first wiring layer;
forming a third wiring layer of said wiring layer with a second layer of said first material placed on the second wiring layer; and
forming a capacitor connected electrically to said wiring layer including said first, second and third wiring layers.
16. A manufacturing method of a semiconductor device as defined in claim 15, wherein the first and second materials are both composed of a polycrystal silicon, and the second material includes impurities of lower concentration than of the first material.
17. A manufacturing method of a semiconductor device as defined in claim 15, wherein said second material is a highly resistant material.
18. A manufacturing method of a semiconductor device as defined in claim 15, wherein said second material has an energy band gap larger than of said first material.
19. A manufacturing method of a semiconductor device as defined in claim 15, wherein said second material is composed of silicon carbide.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A pneumatic tire for a motorcycle, comprising a directional tread pattern including a plurality of different grooves formed on a tread surface, the grooves each converging forward in a rotation direction of the tire,
wherein the plurality of different grooves are formed as three different oblique lug grooves extending, in a development plan view of the tread pattern, from a tread contact end of the tire to a tire equator line as being curved to be deflected to the tire equator line side;
wherein the three different oblique lug grooves include a first oblique lug groove having an extending length of \u03b1, a second oblique lug groove having an extending length of \u03b2, and a third oblique lug groove having an extending length of \u03b3, the extending lengths \u03b1, \u03b2, \u03b3 satisfying the following Expressions (I), (II):
\u03b1\u2266\u03b2<\u03b3\u2003\u2003(I)
1\u2212\u03b3\u03b1<0.1 \u2003\u2003(II); and
wherein the number n of the oblique lug grooves intersecting with a meridian of the tire is defined to satisfy the following Expression (III): n\u22674 (III), within a range of 60% to 70% of the entire circumference of the tire.
2. The pneumatic tire for a motorcycle according to claim 1,
wherein the tread pattern includes, in a development plan view, four regions for one pitch in the circumferential direction, the four regions being obtained by equally dividing the tread width into quarters from the tire equator line to the tread contact end; and
wherein the four regions include a second region A and a third region B to the tire equator line, the second region A and the third region B each having a negative ratio a and a negative ratio b, respectively, which are different from each other by less than 0.01.
3. A pneumatic tire for a motorcycle, comprising a tread pattern including at least three different oblique lug grooves formed on a tread surface of the tire, the grooves each extending as converging forward in the rotation direction of the tire from a contact end side to a tire equator line side,
the tread surface including half-width regions across the tire equator line serving as a boundary,
the at least three different oblique lug grooves being independently disposed while being dispersed in each of the half-width regions,
the at least three different oblique lug grooves being arranged so as to be line-symmetric, for each type, about the tire equator line as an axis of symmetry while being displaced from each other in the tire circumferential direction between the half-width regions,
wherein the at least three oblique lug grooves includes a central oblique lug groove disposed in a center region which accounts for an area of 12.5% of the tread contact width from the tire equator line, the central oblique lug groove extending in a direction that allows an angle between a groove center line thereof and the tire equator line to fall within a range of 9\xb0 to 23\xb0 while having an extending length of 120 mm or less over the entire length thereof.
4. The pneumatic tire for a motorcycle according to claim 3,
wherein the central oblique lug groove extends from the tire equator line to an intermediate region falling within a range of 12.5% to 25% of the tread contact width; and
wherein the central oblique lug groove extends, in a portion which lies in the intermediate region falling within a range of 12.5% to 25% of the tread contact width from the tire equator line, in a direction that allows an angle between a groove center line thereof and the tire equator line to fall within a range of 21\xb0 to 36\xb0.
5. The pneumatic tire for a motorcycle according to claim 3,
wherein, of the at least three different oblique lug grooves, at least two different oblique lug grooves are disposed in the intermediate region falling within a range of 12.5% to 25% of the tread contact width from the tire equator line; and
wherein, of the at least three different oblique lug grooves, at least an oblique lug groove, other than the central oblique lug groove, is disposed in an intermediate region falling within a range of 25% to 37.5% of the tread contact width from the tire equator line.
6. The pneumatic tire for a motorcycle according to claim 3, wherein, of the three different oblique lug grooves, at least two different oblique lug grooves other than the central oblique lug groove are curved so that the outside of the curve is directed toward the tire equator line side.
7. The pneumatic tire for a motorcycle according to claim 3, wherein the oblique lug grooves other than the central oblique lug groove are each disposed, by 60% or more of the opening area thereof, in a region on the outside in the tire width direction of the outermost end of the central oblique lug groove in the tire width direction of the central oblique lug groove.