All The Claims

1. A multi-item locator comprising:
a. a housing, where the housing includes a front face;
b. a plurality of buttons positioned along the front face of the housing;
c. a plurality of labels positioned below the plurality of buttons, where the plurality of labels each identify one of a plurality of misplaced items;
d. a plurality of adhesive sensors attached to the plurality of misplaced items, where each of the adhesive sensors coordinates to one of the plurality of buttons, where when the button is pressed the coordinating adhesive sensor sounds.
2. The multi-item locator according to claim 1, where the housing is battery powered.
3. The multi-item locator according to claim 1, where the housing plugs into an electrical outlet.
4. The multi-item locator according to claim 1, where the plurality of buttons and the plurality of sensors are numbered with coordinating numbers.
5. The multi-item locator according to claim 1, where the plurality of buttons and the plurality of sensors are colored with coordinating colors.
6. The multi-item locator according to claim 1, where the housing sends a signal to activate the sound from the adhesive sensor when the coordinating button is pressed.
7. A method of use for a multi-item locator comprising the steps of:
a. attaching a sensor to an item;
b. pressing a coordinating button to the sensor when the item is misplaced; and
c. following a sound created by the sensor to locate the item.
8. The method of use for the multi-item locator according to claim 6, further comprising the step of pressing the coordinating button a second time to stop the signal from sounding.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A multimedia apparatus, comprising:
a driving circuit, for generating a first image color data;
a digital color adjustment device, for receiving the first image color data, the digital color adjustment device comprising:
a color transformation circuit, for receiving the first age color data and performing a color transformation on the first image color data to obtain a second image color data;
a hue transformation circuit, for receiving the second image color data and performing a hue transformation on the second image color data to obtain a third image color data comprising a hue signal, a saturation signal and a brightness signal;
a color adjustment circuit, comprising:
a hue shift lookup table, for obtaining a hue shift signal according to the hue signal;
a first adder, for adding the hue signal with the hue shift signal to obtain an adjusted hue signal;
a saturation mapping lookup table, for obtaining a saturation mapping signal according to the hue signal;
a first multiplier, for multiplying the saturation signal with the saturation mapping signal to obtain a first multiplication result;
a brightness transformation lookup table, for obtaining a brightness gain signal according to the hue signal;
a second multiplier, for multiplying the brightness signal with the brightness gain signal to obtain a second multiplication result;
a non-linear output lookup table, for obtaining a brightness upper limit signal according to the brightness signal, and for obtaining a saturation upper limit signal according to the saturation signal;
a first selecting unit, for selecting the smaller one of the saturation upper limit signal and the first multiplication result as an adjusted saturation signal; and
a second selecting unit, for selecting the smaller one of the brightness upper limit signal and the second multiplication result as an adjusted brightness signal,
wherein the color adjustment circuit is used for performing a color adjustment on the third image color data according to the hue shift lookup table, the saturation mapping lookup table, the brightness transformation lookup table and the non-linear output lookup table to obtain a fourth image color data;
a reverse hue transformation circuit, for receiving the fourth color data and performing a reverse hue transformation on the fourth image color data to obtain a fifth image color data; and
a reverse color transformation circuit, for receiving the fifth image color data and performing a reverse color transformation on the fifth image color data to obtain a sixth image color data;
a display unit, for receiving and displaying the sixth image color data; and
a user control interface, for producing an adjustment value in response to a display image displayed by the display unit, wherein the hue shift lookup table, a saturation mapping lookup table, a brightness transformation lookup table and a non-linear output lookup table are established according to the adjustment value.
2. A digital color adjustment device, for receiving a first image color data of a driving circuit, comprising:
a color transformation circuit, for receiving the first image color data and performing a color transformation on the first image color data to obtain a second image color data;
a hue transformation circuit, for receiving the second image color data and performing a hue transformation on the second image color data to obtain a third image color data comprising a hue signal, a saturation signal and a brightness signal;
a color adjustment circuit, comprising:
a hue shift lookup table, for obtaining a hue shift signal according to the hue signal;
a first adder, for adding the hue signal with the hue shift signal to obtain an adjusted hue signal;
a saturation mapping lookup table, for obtaining a saturation mapping signal according to the hue signal;
a first multiplier, for multiplying the saturation signal with the saturation mapping signal to obtain a first multiplication result;
a brightness transformation lookup table, for obtaining a brightness gain signal according to the hue signal;
a second multiplier, for multiplying the brightness signal with the brightness gain signal to obtain a second multiplication result;
a non-linear output lookup table for obtaining a brightness upper limit signal according to the brightness signal, and obtain a saturation upper limit signal according to the saturation signal;
the color adjustment circuit is used for performing a color adjustment on the third image color data according to the above lookup tables to obtain a fourth image color data;
a first selecting unit, for selecting the smaller one of the saturation upper limit signal and the first multiplication result as an adjusted saturation signal; and
a second selecting unit, for selecting the smaller one of the brightness upper limit signal and the second multiplication result as an adjusted brightness signal, wherein
a reverse hue transformation circuit, for receiving the fourth image color data and performing a reverse hue transformation on the fourth image color data to obtain a fifth image color data; and
a reverse color transformation circuit, for receiving the fifth image color data and performing a reverse color transformation on the fifth image color data to obtain a sixth image color data.
3. A color adjustment circuit, for adjusting a hue signal, a saturation signal and a brightness signal, comprising:
a hue shift lookup table, for obtaining a hue shift signal according to the hue signal;
a first adder, for adding the hue signal with the hue shift signal to obtain an adjusted hue signal;
a saturation mapping lookup table, for obtaining a saturation mapping signal according to the hue signal;
a first multiplier, for multiplying the saturation signal with the saturation mapping signal to obtain an first multiplication result;
a brightness transformation lookup table, for obtaining a brightness gain signal according to the hue signal;
a second multiplier, for multiplying the brightness signal with the brightness gain signal to obtain an second multiplication result;
a non-linear output lookup table, for obtaining a brightness upper limit signal and a saturation upper limit signal according to the brightness signal and the saturation signal;
a first selecting unit, for selecting the smaller one of the saturation upper limit signal and the first multiplication result as an adjusted saturation signal; and
a second selecting unit, for selecting the smaller one of the brightness upper limit signal and the second multiplication result as an adjusted brightness signal.

What is claimed is:

1. A driver circuit comprising:
a duty cycle adjustment circuit;
an output stage configured to receive an input signal having a duty cycle; and
a replica output stage configured to receive the input signal and to produce an output signal that is coupled to the duty cycle adjustment circuit, wherein the duty cycle adjustment circuit is configured to affect the duty cycle of the input signal.
2. A driver circuit as defined by claim 1, further comprising a driver stage coupled to the output stage, wherein the driver stage includes an output configured to produce the input signal coupled to the output stage and wherein the driver stage further includes an input coupled to the duty cycle adjustment circuit and configured to receive a duty cycle adjustment signal therefrom.
3. A driver circuit as defined by claim 1, wherein the replica output stage includes a duty cycle characteristic that is similar to a duty cycle characteristic of the output stage.
4. A driver circuit as defined by claim 1, wherein the output stage is configured to consume a first amount of current and the replica output stage is configured to consume a second amount of current that is less than the first amount of current.
5. A driver circuit as defined by claim 1, wherein the output stage is configured to be terminated by circuit separate from the output stage.
6. A driver circuit as defined by claim 1, wherein the output stage includes transistors.
7. A driver circuit as defined by claim 6, wherein the transistors are selected from a group consisting of field effect transistors and bipolar junction transistors.
8. A driver circuit as defined by claim 6, wherein the transistors comprise metal-oxide semiconductor field effect transistors.
9. A driver circuit as defined by claim 6, wherein the replica output stage includes transistors.
10. A driver circuit as defined by claim 9, further comprising a bias circuit coupled to the output stage and the replica output stage, wherein the bias circuit is configured to provide more current for the output stage than for the replica output stage.
11. A driver circuit as defined by claim 9, wherein the transistors of the output stage and the replica output stage comprise discrete components.
12. A driver circuit as defined by claim 9, wherein the transistors of the output stage and the replica output stage are integrated on a substrate.
13. A method of controlling a duty cycle of an output signal, the method comprising:
providing input signal to an output stage, wherein the output stage comprises a first duty cycle characteristic;
providing the input signal to a replica output stage, wherein the replica output stage comprises a second duty cycle characteristic similar to the first duty cycle characteristic and wherein the replica output stage produces a replica output signal;
coupling the replica output signal from the replica output stage to a duty cycle control circuit that compares a duty cycle of the replica output signal from the replica output stage to a desired duty cycle and outputs a duty cycle correction signal; and
coupling the duty cycle correction signal from the duty cycle control circuit to a circuit that feeds the input signal to the output stage and the replica output stage.
14. A method as defined by claim 13, wherein the replica output stage includes a duty cycle characteristic that is similar to a duty cycle characteristic of the output stage.
15. A method as defined by claim 13, wherein the output stage is configured to consume a first amount of current and the replica output stage is configured to consume a second amount of current that is less than the first amount of current.
16. A method as defined by claim 13, wherein the output stage is configured to be terminated by circuit separate from the output stage.
17. A method as defined by claim 13, further comprising providing a first bias current to the output stage and providing a second bias current to the replica output stage, wherein a magnitude of the first bias current is larger than a magnitude of the second bias current.
18. A circuit comprising:
a driver stage having an input and an output;
an output stage coupled to the output of the driver stage and configured to receive an input signal having a duty cycle therefrom, wherein the output stage is configured to produce an output signal;
a laser diode coupled to the output stage and configured to receive the output signal;
a replica output stage coupled to the driver stage, wherein the replica output stage is configured to receive the input signal from the driver stage and to produce a replica output signal; and
a duty cycle adjustment circuit coupled to the input of the driver stage and the replica output stage, wherein the duty cycle adjustment circuit is configured to receive the replica output signal and to produce a duty cycle correction signal that is coupled to the input of the driver stage.
19. A circuit configuration as defined by claim 18, wherein the replica output stage includes a duty cycle characteristic that is similar to a duty cycle characteristic of the output stage.
20. A circuit configuration as defined by claim 18, wherein the output stage is configured to consume a first amount of current and the replica output stage is configured to consume a second amount of current that is less than the first amount of current.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A system for displaying images, comprising:
an active matrix organic electroluminescent device, comprising:
a substrate;
a plurality of scan lines and data lines disposed on the substrate, for defining a plurality of pixel regions, wherein each pixel structure comprises:
a switching thin film transistor, comprising a first channel layer, first sourcedrain regions disposed at both sides of the first channel layer, a first gate electrode disposed above the first channel layer, and a first conductive layer disposed under the first channel layer;
a driving thin film transistor, comprising a second channel layer, second sourcedrain regions disposed at both sides of the second channel layer, a second gate electrode disposed under the second channel layer, and a second conductive layer disposed above the second channel layer;
a storage capacitor, comprising two first electrodes, and a second electrode disposed between the first electrodes, wherein the first conductive layer, the second gate electrode and the lower first electrode are of the same material and formed by the same process; and
a pixel electrode electrically connected to the second sourcedrain regions of the driving thin film transistor via a first contact; and
wherein, the second electrode electrically connects to the second sourcedrain regions of the driving thin film transistor via a second contact, and the two first electrodes electrically connect to the first sourcedrain regions of switching thin film transistor via a third contact.
2. The system as claimed in claim 1, wherein the lower first electrode and the second gate electrode connect together.
3. The system as claimed in claim 1, wherein the first gate electrode, the higher first electrode, the second conductive layer, and the scan lines are of the same material and formed by the same process.
4. The system as claimed in claim 1, wherein the first and second channel layers and the second electrode are of the same material and formed by the same process.
5. The system as claimed in claim 1, wherein the first contact, the second contact, the third contact, and the date lines are of the same material and formed by the same process.
6. The system as claimed in claim 1, further comprising a first dielectric layer disposed between the first conductive layer, the lower first electrode, and the second gate electrode, and the first and second sourcedrain regions, the first and second channel layers, and the second electrode.
7. The system as claimed in claim 1, further comprising a second dielectric layer disposed between the first and second sourcedrain regions, the first and second channel layers, and the second electrode, and the first gate electrode, the higher first electrode, and the second conductive layer.
8. The system as claimed in claim 1, further comprising a passivation layer formed over the switching thin film transistor, the driving thin film transistor, and the storage capacitor, wherein the first contact, the second contact, and the third contact pass through the passivation layer via a plurality of via holes.
9. The system as claimed in claim 1, further comprising an organic electroluminescent diode electrically connected to the second sourcedrain regions via the first contact.
10. The system as claimed in claim 9, wherein the pixel electrode serves as an anode of the organic electroluminescent diode.
11. The system as claimed in claim 1, further comprising a display panel, wherein the active matrix organic electroluminescent device forms a portion of the display panel.
12. The system as claimed in claim 11, further comprising an electronic device, wherein the electronic device comprises:
the display panel; and
an input unit coupled to the display panel operative to provide input to the display panel such that the display panel displays images.
13. The system as claimed in claim 12, wherein the electronic device is a mobile phone, digital camera, PDA (personal data assistant), notebook computer, desktop computer, television, car display, or portable DVD player.