1. A gaming machine comprising:
a reel having a reel band which is arranged to be able to transmit illumination light and on which symbols are lined up;
a reel driving mechanism which rearranges the symbols by rotating the reel;
a backlight apparatus which emits illumination light from the inner circumference side of the reel toward the reel band to allow the illumination light having passed through the reel band to be visible from the outside; and
a backlight control unit which controls emission states of the illumination light emitted from the backlight apparatus,
the backlight apparatus being provided with a plurality of illumination light sources which are in parallel to a width direction and a longitudinal direction of the reel band and is able to change an amount of the illumination light stepwise, and
the backlight control unit being individually controllable the illumination light sources.
2. The gaming machine according to claim 1, wherein,
the backlight control unit is able to individually control each of the illumination light sources so that the emission states of the illumination light correspond to at least one of the rotation of the reel and the stop of the reel.
3. The gaming machine according to claim 1, wherein,
the backlight control unit controls the illumination light sources so that the amount of illumination light is increased or decreased stepwise from the inside to the outside of the reel band in the width direction and the longitudinal direction.
4. The gaming machine according to claim 1, wherein,
the backlight control unit controls the emission states of the illumination light sources in accordance with the rotational direction of the reel.
5. The gaming machine according to claim 1, wherein,
the backlight control unit controls the illumination light sources so that the direction of increase or decrease in the amount of the illumination light is changed in accordance with the rotational direction of the reel.
6. The gaming machine according to claim 1, wherein,
the backlight control unit controls the illumination light sources so that the speed of increase or decrease in the amount of the illumination light is changed in accordance with the rotation speed of the reel.
7. The gaming machine according to claim 1, wherein,
the backlight control unit controls the emission states of the illumination light sources in accordance with a combination of the rearranged symbols.
8. The gaming machine according to claim 1, wherein,
each of the emission states of the illumination light sources is at least one of the amount of the illumination light, color of the illumination light, emission intervals of the illumination light, and emission timings of the illumination light.
9. A reel device comprising:
a reel having a reel band which is arranged to be able to transmit illumination light and on which symbols are lined up;
a reel driving mechanism which rearranges the symbols by rotating the reel;
a backlight apparatus which emits illumination light from the inner circumference side of the reel toward the reel band to allow the illumination light having passed through the reel band to be visible from the outside; and
a backlight control unit which controls emission states of the illumination light emitted from the backlight apparatus,
the backlight apparatus being provided with a plurality of illumination light sources which are in parallel to a width direction and a longitudinal direction of the reel band and is able to change an amount of the illumination light stepwise, and
the backlight control unit being individually controllable the illumination light sources.
The claims below are in addition to those above.
All refrences to claims which appear below refer to the numbering after this setence.
1. An output driver buffer circuit comprising:
a first output driver transistor adapted to adjust an output voltage of an output pad; and
a first pre-driver circuit connected to a gate of the first output driver transistor and adapted to receive a first reference voltage to control the first output driver transistor, wherein the first pre-driver circuit comprises:
a first capacitor adapted to be precharged to a first voltage,
a first switch adapted to connect the first capacitor to the gate of the first output driver transistor, and
a second switch adapted to connect the first reference voltage to the gate of the first output driver transistor following a first time period after the first capacitor is connected to the gate of the first output driver transistor, wherein the first capacitor is adapted to buffer noise associated with the first output driver transistor during the first time period.
2. The output driver buffer circuit of claim 1, wherein the first and second switches are adapted to operate in response to first and second control signals, respectively.
3. The output driver buffer circuit of claim 2, wherein the first and second control signals are adapted to switch in response to a voltage change in a data signal.
4. The output driver buffer circuit of claim 1, wherein the first capacitor is a transistor.
5. The output driver buffer circuit of claim 1, wherein the first pre-driver circuit further comprises a third switch adapted to disconnect the first capacitor from the first voltage before the first capacitor is connected to the gate of the first output driver transistor.
6. The output driver buffer circuit of claim 1, wherein the first pre-driver circuit further comprises a fourth switch adapted to disable the first output driver transistor before the first capacitor is connected to the gate of the first output driver transistor.
7. The output driver buffer circuit of claim 1, wherein the first time period is approximately 200 ps.
8. A programmable logic device (PLD) comprising the buffered output driver circuit of claim 1.
9. The output driver buffer circuit of claim 1, wherein:
the first output driver transistor is adapted to selectively pull up the output voltage of the output pad; and
the buffered output driver circuit further comprises:
a second output driver transistor adapted to selectively pull down the output voltage of the output pad, and
a second pre-driver circuit connected to a gate of the second output driver transistor and adapted to receive a second reference voltage to control the second output driver transistor, wherein the second pre-driver circuit comprises:
a second capacitor adapted to be precharged to a second voltage,
a fifth switch adapted to connect the second capacitor to the gate of the second output driver transistor, and
a sixth switch adapted to connect the second reference voltage to the gate of the second output driver transistor following a second time period after the second capacitor is connected to the gate of the second output driver transistor, wherein the second capacitor is adapted to buffer noise associated with the second output driver transistor during the second time period.
10. A method of adjusting an output voltage of an output pad, the method comprising:
receiving a data signal;
precharging a first capacitor to a first voltage;
in response to the data signal transitioning from a first value to a second value, connecting the first capacitor to a gate of a first output driver transistor connected to the output pad; and
connecting a first reference voltage to the gate of the first output driver transistor following a first time period after the first capacitor is connected to the gate of the first output driver transistor, wherein the first capacitor is adapted to buffer noise associated with the first output driver transistor during the first time period.
11. The method of claim 10, wherein the first and second connecting steps are performed in response to first and second control signals, respectively.
12. The method of claim 11, wherein the first and second control signals are adapted to switch in response to a voltage change in a data signal.
13. The method of claim 10, wherein the first capacitor is a transistor.
14. The method of claim 10, further comprising disconnecting the first capacitor from the first voltage before the first connecting step.
15. The method of claim 10, further comprising disabling disable the first output driver transistor before the first connecting step.
16. The method of claim 10, wherein the first time period is approximately 200 ps.
17. The method of claim 10, wherein the method is performed by a buffered output driver circuit of a programmable logic device (PLD).
18. The method of claim 10, wherein:
the first output driver transistor is adapted to selectively pull up the output voltage of the output pad; and
the method further comprises:
precharging a second capacitor to a second voltage,
in response to the data signal transitioning from the second value to the first value, connecting the second capacitor to a gate of a second output driver transistor connected to the output pad, wherein the second output driver transistor is adapted to selectively pull down the output voltage of the output pad, and
connecting a second reference voltage to the gate of the second output driver transistor following a second time period after the second capacitor is connected to the gate of the second output driver transistor, wherein the second capacitor is adapted to buffer noise associated with the second output driver transistor during the second time period.
19. An output driver buffer circuit comprising:
a first means for adjusting an output voltage of an output pad;
a first means for buffering noise associated with the first adjusting means;
a first means for connecting the first buffering means to the first adjusting means; and
a first means for connecting a first reference voltage to the first adjusting means following a first time period after the first buffering means is connected to the first adjusting means.
20. The output driver buffer circuit of claim 19, wherein:
the first adjusting means is adapted to selectively pull up the output voltage of the output pad; and
the buffered output driver circuit further comprises:
a second means for adjusting the output voltage of the output pad, wherein the second adjusting means is adapted to selectively pull down the output voltage of the output pad,
a second means for buffering noise associated with the second adjusting means,
a second means for connecting the second buffering means to the second adjusting means, and
a second means for connecting a second reference voltage to the second adjusting means following a second time period after the second buffering means is connected to the second adjusting means.