1. A method for large-scale decontamination of biological microbes, consisting essentially of the steps of:
applying an acidic environment to large-scale biological spores contamination; and,
applying an amine oxide compound in combination with the acidic environment effective for large-scale decontamination of the biological microbes.
2. The method of claim 1, wherein the step of applying an acidic environment comprises application of an acidic solution.
3. The method of claim 1, wherein the step of applying an acidic environment comprises a pH of less than about 6.9.
4. The method of claim 3, wherein the step of applying an acidic environment comprises a pH of from about 3.0 to about 6.0.
5. The method of claim 4, wherein the step of applying an acidic environment comprises a pH of from about 4.0 to about 6.0.
6. The method of claim 2, wherein the acidic solution is selected from the group consisting of organic acids, inorganic acids and combinations thereof.
7. The method of claim 2, wherein the acidic solution is selected from the group consisting of oxalic acid, acetic acid, phosphoric acid, hydrochloric acid, sulfuric acid, carboxylic acids, and combinations thereof.
8. The method of claim 2, wherein the acidic solution is present in an amount of from about 1 mM to about 1,000 mM.
9. The method of claim 8, wherein the acidic solution is present in an amount of from about 20 mM to about 50 mM.
10. The method of claim 1, wherein the amine oxide is selected from the group consisting of decyl dimethyl amine oxide, cocoa dimethyl amine oxide, isoalkyl dimethyl amine oxide and combinations thereof.
11. The method of claim 1, further comprising the step of placing the applied acidic environment in a heated condition.
12. The method of claim 11, wherein the heated condition includes a moderately heated condition.
13. The method of claim 12, wherein the step of moderately heating the biological spores comprises a temperature of from about 25\xb0 C. to about 100\xb0 C.
14. The method of claim 13, wherein the step of moderately heating the biological spores comprises a temperature of from about 65\xb0 C. to about 85\xb0 C.
15. The method of claim 1, wherein the step of moderately heating the biological spores comprises an exothermic chemical reaction.
16. The method of claim 1, wherein the step of moderately heating the biological spores comprises an external heat source.
17. The method of claim 1, wherein the biological microbes comprises endospores.
18. The method of claim 1, wherein the biological microbes comprises Bacillus endospores.
19. The large-scale decontaminated microbe product produced by the method of claim 1.
20. A method for large-scale decontamination of biological microbes, comprising the steps of:
washing a biological microbe contaminant from a decontamination site into a waste water product;
applying an acidic environment to the contaminated wash product; and,
applying an amine oxide compound in combination with the acidic environment to the wash product effective for decontamination of the biological microbes within the wash product.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A through-hole layout apparatus comprising:
an extractor extracting an existing through-hole interconnecting an upper layer wiring and a lower layer wiring from design data for a semiconductor integrated circuit;
a calculator calculating, for each through-hole extracted by said extractor, a layout density of through-holes in a predetermined region centered on said through-hole;
a selector selecting a through-hole at a center of a predetermined region where said layout density calculated by said calculator is lower than a predetermined value as a target through-hole from among said through-holes extracted by the extractor; and
a through-hole adder determining, for each target through-hole selected by the selector, a first given position in a predetermined region centered on said target through-hole as a placement position at which a through-hole is to be added and adding a through-hole at said placement position on said design data.
2. The through-hole layout apparatus according to claim 1, wherein said first given position in said predetermined region is at a predetermined distance from said target through-hole in a predetermined direction in said predetermined region, is on an upper layer wiring that is connected to said target through-hole, and is a position where no through-hole is placed.
3. The through-hole layout apparatus according to claim 2, wherein if there is room for extending an lower layer wiring that is connected to said target through-hole to a position corresponding to said placement position, said through-hole adder extends said lower layer wiring to said position corresponding to said placement position and adds a through-hole interconnecting said upper layer wiring and said lower layer wiring at said placement position on said design data.
4. The through-hole layout apparatus according to claim 2, wherein if there is no room for extending an lower layer wiring that is connected to said target through-hole to a position corresponding to said placement position, said through-hole adder places an interlayer wiring at a position corresponding to said placement position between said upper layer wiring and said lower layer wiring and adds a through-hole interconnecting said upper layer wiring and said interlayer wiring at said placement position on said design data.
5. The through-hole layout apparatus according to claim 1, wherein:
said extractor extracts a through-hole from processed design data to which a through-hole has been added by said through-hole adder;
said calculator calculates, for each of through-holes extracted by said extractor, excluding a through-hole added by said through-hole adder, a layout density of through-holes in a predetermined region centered on said through-hole;
said selector selects a through-hole at the center of a predetermined region where said layout density calculated by said calculator is lower than a predetermined value as a target through-hole from among through-holes extracted by said extractor, excluding said through-holes added by said through-hole adder; and
said through-hole adder determines, for each target through-hole selected by said selector, a second given position in a predetermined region centered on said target through-hole as a placement position at which a through-hole is to be added and adds a through-hole at said placement position on said processed design data.
6. The through-hole layout apparatus according to claim 5, wherein said second given position in said predetermined region is a position at said predetermined distance from said target through-hole at said predetermined direction in said predetermined region and is a position where there is room for extending an upper layer wiring that is connected to said target through-hole, or a position which is on an upper layer wiring adjacent to said upper layer wiring and at which no through-hole is placed.
7. The through-hole layout apparatus according to claim 6, wherein if said placement position is a position at which there is room for extending said upper layer wiring that is connected to said target through-hole, said through-hole adder extends said upper layer wiring to said placement position and, if there is room for extending a lower layer wiring that is connected to said target through-hole to a position corresponding to said placement position, extends said lower layer wiring to said position corresponding to said placement position and adds a through-hole interconnecting said upper layer wiring and said lower layer wiring at said placement position on said processed design data.
8. The through-hole layout apparatus according to claim 6, wherein if said placement position is a position at which there is room for extending said upper layer wiring that is connected to said target through-hole, said through-hole adder extends said upper layer wiring to said placement position and, if there is no room for extending a lower layer wiring that is connected to said target through-hole to a position corresponding to said placement position, places an interlayer wiring at a position corresponding to said placement position between said upper layer wiring and said lower layer wiring and adds a through-hole interconnecting said upper layer wiring and said interlayer wiring at said placement position on said processed design data.
9. The through-hole layout apparatus according to claim 6, wherein if said placement position is on said adjacent upper layer wiring and is a position where no through-hole is placed, said through-hole adder places an interlayer wiring at a position corresponding to said placement position between said upper layer wiring and said interlayer wiring and adds a through-hole interconnecting said upper layer wiring and said lower layer wiring at said placement position on said processed design data.
10. A through-hole layout method performed by a through-hole layout apparatus, comprising:
extracting an existing through-hole interconnecting an upper layer wiring and a lower layer wiring from design data for a semiconductor integrated circuit;
calculating, for each extracted through-hole, a layout density of through-holes in a predetermined region centered on said through-hole;
selecting a through-hole at the center of a predetermined region where said calculated layout density is lower than a predetermined value as a target through-hole from among said extracted through-holes;
determining, for each selected target through-hole, a given position in a predetermined region centered on said target through-hole as a placement position at which a through-hole is to be added; and
adding a through-hole at said placement position on said design data.
11. The through-hole layout method according to claim 10, wherein said first given position in said predetermined region is at a predetermined distance from said target through-hole in a predetermined direction in said predetermined region, is on an upper layer wiring that is connected to said target through-hole, and is a position where no through-hole is placed.
12. The through-hole layout method according to claim 11, wherein, in adding a through-hole at said placement position, if there is room for extending an lower layer wiring that is connected to said target through-hole to a position corresponding to said placement position, said lower layer wiring is extended to a position corresponding to said placement position and a through-hole interconnecting said upper layer wiring and said lower layer wiring is added at said placement position on said design data.
13. The through-hole layout method according to claim 11, wherein, in adding a through-hole at said placement position, if there is no room for extending an lower layer wiring that is connected to said target through-hole to a position corresponding to said placement position, an interlayer wiring is placed at a position corresponding to said placement position between said upper layer wiring and said lower layer wiring and a through-hole interconnecting said upper layer wiring and said interlayer wiring is added at said placement position on said design data.
14. The through-hole layout method according to claim 10, wherein, in adding a through-hole in said placement position,
re-extraction is performed to extract a through-hole from processed design data to which a through-hole has been added;
recalculation is performed to calculate, for each of said through-holes extracted by said re-extraction excluding said through-hole added to said placement position, a layout density of through-holes in a predetermined region centered on said through-hole;
re-selection is performed to select a through-hole at the center of a predetermined region where said layout density calculated by said recalculation is lower than a predetermined value as a target through-hole from among through-holes extracted by said re-extraction excluding said through-hole added to said placement position; and
re-addition is performed by determining, for each target through-hole selected by said reselection, a second given position in a predetermined region centered on said target through-hole as a placement position at which a through-hole is to be added and adding a through-hole at said placement position on the processed design data.
15. The through-hole layout method according to claim 14, wherein said second given position in said predetermined region is a position at said predetermined distance from said target through-hole at said predetermined direction in said predetermined region and is a position where there is room for extending an upper layer wiring that is connected to said target through-hole, or a position which is on an upper layer wiring adjacent to said upper layer wiring and at which no through-hole is placed.
16. The through-hole layout method according to claim 15, wherein in performing said re-addition, if said placement position is a position at which there is room for extending said upper layer wiring that is connected to said target through-hole, said upper layer wiring is extended to said placement position and, if there is room for extending a lower layer wiring that is connected to said target through-hole to a position corresponding to said placement position, said lower layer wiring is extended to said position corresponding to said placement position and a through-hole interconnecting said upper layer wiring and said lower layer wiring is added at said placement position on said processed design data.
17. The through-hole layout method according to claim 15, wherein in performing said re-addition, if said placement position is a position at which there is room for extending said upper layer wiring that is connected to said target through-hole, said upper layer wiring is extended to said placement position and, if there is no room for extending a lower layer wiring that is connected to said target through-hole to a position corresponding to said placement position, an interlayer wiring is placed at a position corresponding to said placement position between said upper layer wiring and said lower layer wiring and a through-hole interconnecting said upper layer wiring and said interlayer wiring is added at said placement position on said processed design data.
18. The through-hole layout method according to claim 15, wherein in performing said re-addition, if said placement position is on said adjacent upper layer wiring and is a position where no through-hole is placed, an interlayer wiring is placed at a position corresponding to said placement position between said upper layer wiring and said lower layer wiring and a through-hole interconnecting said upper layer wiring and said interlayer wiring is added at said placement position on said processed design data.
19. A through-hole layout apparatus comprising:
an extractor means for extracting an existing through-hole interconnecting an upper layer wiring and a lower layer wiring from design data for a semiconductor integrated circuit;
a calculator means for calculating, for each through-hole extracted by said extractor, a layout density of through-holes in a predetermined region centered on said through-hole;
a selector means for selecting a through-hole at a center of a predetermined region where said layout density calculated by said calculator is lower than a predetermined value as a target through-hole from among said through-holes extracted by the extractor; and
a through-hole adder means for determining, for each target through-hole selected by the selector, a given position in a predetermined region centered on said target through-hole as a placement position at which a through-hole is to be added and adding a through-hole at said placement position on said design data.