What is claimed is:
1. A method of manufacturing a plate for a battery electrode comprising the steps of: passing a thin metal sheet between a pair of embossing rotation rollers having concave portions and convex portions formed on a peripheral surface thereof to form concave portions and convex portions on an entire surface of said metal sheet, and form pores each on an apex of each of said concave portions and convex portions and generate burrs each projecting outward from a peripheral edge of each of said pores by a pressing force during formation of said concave portions and convex portions.
2. A method of manufacturing a plate for a battery electrode comprising the steps of: passing a thin metal sheet between a pair of rotation rollers comprising an embossing roller having concave portions and convex portions formed on a peripheral surface thereof and a rubber roller having smooth outer surface to form pores on said metal sheet and generate burrs each projecting toward one side from a peripheral edge of each of said pores by pressing said rubber roller against said convex portions of said embossing roller.
3. A method of manufacturing a plate for a battery electrode comprising the steps of: passing a thin metal sheet sequentially between first and second sets of rotation rollers each consisting of an embossing roller having concave portions and convex portions formed on a peripheral surface thereof and a rubber roller having smooth outer surface to form pores on said metal sheet and generate burrs each projecting toward one side from a peripheral edge of each of said pores by pressing said rubber roller against said convex portions of said embossing roller when said metal sheet is passing between the embossing roller and-the rubber roller of said first set; and passing said metal sheet between the embossing roller and the rubber roller of said second set to form pores on said metal sheet at different positions thereof and generate burrs each projecting toward the other side from said peripheral edge of each of said pores.
4. The method of manufacturing a plate for a battery electrode according to any one of claims 1 through 3, wherein metal sheets of the same kind or different kinds, according to claims 1, 2, and 3, having said pores and said burrs each projecting from the peripheral edge of each of said pores are layered one upon another; and said burrs of an upper layer metal sheet and said burrs of a lower layer metal sheet adjacent to said upper layer metal sheet are interlocked with each other to integrate said upper layer metal sheet and said lower layer metal sheet with each other; and spaces between said upper layer metal sheet and said lower layer metal sheet are communicated with each other through said pores.
5. A plate for a battery electrode manufactured by the method according to any one of claims 1 through 4.
6. A plate for a battery electrode which is manufactured by the method according to claim 4 and comprises a first metal sheet, having pores each on an apex of each of concave portions and convex portions and burrs each projecting outward from a peripheral edge of each of said pores and second metal sheets, having burrs projecting toward one side and are layered on a surface at both sides of said first metal sheet and sandwiching said first metal sheet therebetween, whose said burrs are projected toward an inner surface side of said metal sheets.
7. A plate for a battery electrode which is manufactured by the method according to claim 4 and comprises a third metal sheet, having burrs each projecting toward both directions from a peripheral edge of each of said pores and second metal sheets, having burrs projecting toward one side and are layered on a surface at both sides of said third metal sheet and sandwiching said third metal sheet therebetween, whose said burrs are projected toward an inner surface side of said metal sheets.
8. The plate for a battery electrode according to any one of claims 5 through 7, wherein said metal sheet consists of a metal foil orand metal sheet formed by rolling metal powder.
9. The plate for a battery electrode according to claim 8, wherein said metal sheet consists of Ni, Al, Cu, Fe, Ag, Zn, Sn, Pb, Sb, Ti, In, V, Cr, Co, C, Ca, Mo, Au, P, W, Rh, Mn, B, Si, Ge, Se, La, Ga, Ir or an alloy of said elements.
10. The plate for a battery electrode according to any one of claims 5, 6, 8, and 9, wherein in an electrode plate for a battery which is manufactured by the method according to claim 1, a pitch between concave portions and that between convex portions are set to 0.5 mm -2.0 mm; and the height of each of said concave portions and that of said convex portions are set to 0.1 mm -2 mm.
11. An electrode for a battery in which an active substance is charged into spaces of said plate, according to any one of claims 5 through 10.
12. An electrode for a battery according to claim 11, wherein said active substance contains an electrically conductive material.
13. A battery comprising said electrode for a battery according to claim 11 or 12.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method, comprising the steps of:
providing an interface assembly comprising at least one test electronics module to make electrical connections with a test apparatus;
configuring a first side of a probe card assembly to make electrical connections with said test electronics modules;
configuring a plurality of probes on a second side of said probe card assembly to make electrical connections with at least one semiconductor device; and
configuring test electronics to receive as input signals received from any of said test apparatus and said semiconductor device, process said received signals there within, and output said processed received signals, at least a portion of said test electronics being disposed on said test electronics modules.
2. The method of claim 1, wherein said test electronics comprise any of passive components, active components, and combinations thereof.
3. The method of claim 1, wherein said test electronics comprise any of a power control module, a decoupling capacitor, a switching control circuit, a regulator, a controller, a pattern generator, a signal measurement circuit, a response detection circuit, a fail detection circuit, means for storing any of passfail information, a relay, a switch, means for determining any of a short circuit and an open circuit, means for testing any of a power pin and an IO pin of said semiconductor device, and means for functional testing of said semiconductor device.
4. The method of claim 1, wherein at least a portion of said test electronics module is disposed substantially coplanar to said probe card assembly.
5. The method of claim 1, wherein said interface assembly further comprises a system board configured between said at least one test electronics module and said substrate.
6. The method of claim 5, wherein said interface assembly further comprises an interposer configured any of or both of between said system board and said substrate and between said test electronics module and said system board.
7. The method of claim 1, wherein said interface assembly comprises a plurality of said test electronics modules.
8. The method of claim 7, wherein each of said plurality of test electronics modules are disposed parallel to each other.
9. The method of claim 1, wherein said test electronics process at least a portion of said signals for testing of said semiconductor device.
10. The method of claim 1, wherein at least a portion of said signals comprise response signals generated by said semiconductor device, and
wherein said test electronics process at least a portion of said generated response signals.
11. The method of claim 1, wherein at least a portion of said signals are test signals generated by said test apparatus, and
wherein said test electronics process at least a portion of said generated test signals.
12. The method of claim 1, wherein said plurality of probes are configured to contact a plurality of semiconductor devices under test.
13. The method of claim 1, wherein said probe card assembly comprises a probe card substrate and a plurality of electrically conductive vias extending therethrough.
14. A probe card assembly, comprising;
an interface assembly comprising at least one test electronics module for making electrical connections with a test apparatus;
a substrate having a first side and a second side opposite said first side, said substrate further comprising electrical contacts that are electrically connected to said test electronics modules and extend from said first side to probes located on and extending from said second side, said probes configured to electrically contact at least one semiconductor device; and
test electronics configured to receive as input signals received from any of said test apparatus and said semiconductor device, process said received signals there within, and output said processed received signals, at least a portion of said test electronics being located on said test electronics modules.
15. The probe card assembly of claim 14, wherein said test electronics comprise any of passive components, active components, and combinations thereof.
16. The probe card assembly of claim 14, wherein said test electronics comprise any of a power control module, a decoupling capacitor, a switching control circuit, a regulator, a controller, a pattern generator, a signal measurement circuit, a response detection circuit, a fail detection circuit, means for storing any of passfail information, a relay, a switch, means for determining any of a short circuit and an open circuit, means for testing any of a power pin and an IO pin of said semiconductor device, and means for functional testing of said semiconductor device.
17. The probe card assembly of claim 14, further comprising:
a system board configured between said at least one test electronics module and said substrate.
18. The probe card assembly of claim 14, further comprising:
an interposer configured any of or both of between said system board and said substrate and between said test electronics module and said system board.