1. A method for manufacturing a memory device, comprising:
forming an array of access devices;
forming a plurality of conductive layers under or over the array of access devices, separated from each other and from the array of access devices by insulating layers;
forming an array of pillars extending through the plurality of conductive layers, the pillars in the array contacting corresponding access devices in the array of access devices, and defining interface regions between the pillar and conductive layers in the plurality of conductive layers;
forming memory elements in the interface regions including a current path between corresponding pillars and conductive layers, each of said memory elements comprising a phase change material; and
forming circuitry coupled to the array of access devices and the plurality of conductive layers configured to program data in the memory elements, the data having one of N data values represented by N non-overlapping ranges of resistance;
wherein N is greater than or equal to two;
wherein N different thicknesses of amorphous phase of the phase change material in the memory elements correspond to the N data values; and
wherein a state of the memory cell comprising no volume of amorphous phase of the phase change material in the current path does not correspond to a stored data value.
2. The method of claim 1, wherein said forming a plurality of conductive layers includes blanket deposition of phase change material.
3. The method of claim 1, wherein said forming a plurality of conductive layers includes blanket deposition of conductive material, followed by formation of a plurality of patches of phase change material.
4. The method of claim 1, wherein said forming a plurality of conductive layers includes:
forming a plurality of blanket layers of conductive material; and
forming blanket layers of insulating material between the blanket layers of conductive material.
5. The method of claim 1, wherein said forming an array of pillars includes:
defining a via through the plurality of conductive layers;
depositing a layer of a first phase change material on sidewalls of the via; and
filling the via over the layer of the first phase change material with a second phase change material.
6. A method for operating a memory device including a plurality of phase change memory cells, comprising:
receiving data to program to a selected phase change memory cell, the data having one of N data values to be stored in the selected cell, wherein N is greater than or equal to two; and
applying a programming pulse through the selected phase change memory cell, the programming pulse being configured to program the data in the memory cells, the N data values represented by N non-overlapping ranges of resistance, wherein N different thicknesses of amorphous phase of phase change material in the selected phase change memory cell correspond to the N data values, and wherein a state of the selected phase change memory cell comprising no volume of amorphous phase of the phase change material does not correspond to a stored data value.
7. The method of claim 6, wherein the memory device including a 3D array of phase change memory cells at interface regions where vertical conductive pillars extend through a plurality of conductive layers, and applying said programming pulse includes applying the pulses through corresponding pillars and conductive layers.
8. The method of claim 6, wherein said applying a programming pulse includes determining a resistance range of a selected memory cell, and forming said programming pulse so that it has a pulse shape selected in response to the determined resistance and a target resistance range.
9. The method of claim 6, wherein the programming pulse has a pulse shape that depends on the resistance range of the memory cell before applying the programming pulse, and a target resistance range for the memory cell after the programming pulse.
10. A memory device, comprising:
a first conductor;
a second conductor; and
a memory cell comprising phase change memory material in an interface between the first and second conductors, wherein data is stored in the memory cell, the data having one of N data values represented by N non-overlapping ranges of resistance, wherein N is greater than or equal to two;
wherein N different thicknesses of amorphous phase of the phase change material in the memory elements correspond to the N data values; and wherein a state of the memory cell comprising no volume of amorphous phase of the phase change material in the current path does not correspond to a stored data value.
11. The memory device of claim 10, including:
an access device coupled to the first conductor; and
circuitry coupled to the access device and the second conductor configured to program data in the memory cell having data values represented by a plurality of non-overlapping ranges of resistance, said plurality of non-overlapping ranges of resistance established by different amorphous phase thicknesses of the phase change memory material in the memory cells.
12. A memory device, comprising:
a memory cell comprising phase change material in a current path between a first and a second electrode; and
circuitry coupled to the memory cell configured to program data in the memory cell, the data having one of N data values represented by N non-overlapping ranges of resistance,
wherein N is greater than or equal to two;
wherein N different thicknesses of amorphous phase of the phase change material in the current path correspond to the N data values; and
wherein a state of the memory cell comprising no volume of amorphous phase of the phase change material in the current path does not correspond to a stored data value.
13. The memory device of claim 12, said circuitry configured to program data is configured to apply a program pulse to the memory cell having a pulse shape that depends on the resistance range of the memory cell before applying the program pulse, and a target resistance range for the memory cell after the program pulse.
14. The memory device of claim 12, said circuitry configured to program data includes logic to determine a resistance range of the memory cell, and a pulse forming circuit to generate a program pulse having a pulse shape selected in response to the determined resistance and a target resistance range.
15. The memory device of claim 13, wherein the target resistance range is lower than the resistance range of the memory cell before applying the pulse.
16. The memory device of claim 13, wherein the program pulse is suitable for decreasing the thickness of the amorphous phase volume, from a first thickness to a second thickness;
wherein the first thickness corresponds to a first data value of the N data values and the second thickness corresponds to a second data value of the N data values.
17. The memory device of claim 13, wherein the program pulse has a shape including a first portion configured to crystallize at least of portion of an amorphous phase volume in the memory cell and a second portion configured to set a thickness of amorphous phase in the memory cell so that the resistance range of the memory cell after the program pulse is within the targeted resistance range.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A motor-driven hinge device adapted to connect a backrest of a motor vehicle seat to a seating portion of said seat, in a rotational movement about a hinge axis, comprising:
a first hypocycloid hinge mechanism driven by a drive shaft, comprising a first metal side plate for connection to the seating portion and a second metal side plate for connection to the backrest, the first and second side plates being connected by metal toothed sectors,
a brushless motor having a rotor rotating about a rotor axis parallel to the hinge axis,
a planetary gear train interposed between the brushless motor and the drive shaft, the planetary gear train comprising a sun gear rotating about a main axis and connected to the motor rotor, a plurality of planet gears, each planet gear comprising: a first set of teeth engaging with the sun gear and with a first stationary ring gear, and a second set of teeth engaging with a second ring gear rigid with the drive shaft, wherein the planetary gear train has no planet carrier.
2. The motor-driven hinge device according to claim 1, wherein all parts of the planetary gear train are made of plastic.
3. The motor-driven hinge device according to claim 1,
further comprising a control unit arranged in immediate proximity to the brushless motor, for controlling said brushless motor; said brushless motor, the planetary gear train, and the control unit being contained in a closed housing.
4. The motor-driven hinge device according to claim 1, wherein the first set of teeth and the second set of teeth differ in their number of teeth by 1, andor the number of teeth of the first ring gear differs from the number of teeth of the second ring gear.
5. The motor-driven hinge device according to claim 1, wherein the reduction ratio of the planetary gear train is between 50 and 150 and the rotational speed of the motor is between 2000 revolutionsmin and 7000 revolutionsmin.
6. The motor-driven hinge device according to claim 1,
wherein the planetary gear train and the brushless motor are arranged one beside the other in a plane perpendicular to the main axis, and are interconnected by a belt.
7. The motor-driven hinge device according to claim 1, wherein the planetary gear train and the brushless motor are arranged one after the other in the axial direction.
8. A seat frame for a motor vehicle, comprising a backrest frame, a seating portion frame, and at least one motor-driven hinge device according to claim 1.
9. The seat frame according to claim 8, comprising a second hypocycloid hinge mechanism arranged on the side opposite to the first hypocycloid hinge mechanism, the drive shaft passing axially through the planetary gear train and connecting the two hypocycloid hinge mechanisms.
10. A motor vehicle seat comprising at least one motor-driven hinge device according to claim 1.