1. LED light unit, in particular for a passenger transport vehicle, such as an aircraft, a road vehicle, a ship or a rail car, the LED light unit having a desired light intensity distribution (LIdes,ver, LIdes,hor), emitted from the LED light unit in operation, wherein the LED light unit comprises:
a support portion,
a light source having at least one LED, the light source being arranged on the support portion and having a source-side light intensity distribution (LISS), and
a refractive optical element having an inner surface and an outer surface, with at least one of the inner surface and the outer surface being non-spherical, the refractive optical element being arranged over the light source and being attached to the support portion,
wherein the desired light intensity distribution (LIdes,ver, LIdes,hor) is defined by at least two cross-sectional light intensity distributions, the at least two cross-sectional light intensity distributions comprising a first desired cross-sectional light intensity distribution (LIdes,ver) in a first cross-sectional plane and a second desired cross-sectional light intensity distribution (LIdes,hor) in a second cross-sectional plane, and
wherein the inner surface and the outer surface of the refractive optical element are shaped such that they jointly transform the source-side light intensity distribution (LISS) into the desired light intensity distribution (LIdes,ver, LIdes,hor).
2. LED light unit according to claim 1, wherein the first desired cross-sectional light intensity distribution (LIdes,ver) andor the second desired cross-sectional light intensity distribution (LIdes,hor) is an envelope curve enveloping a plurality of required light intensity values.
3. LED light unit according to claim 1, wherein the first desired cross-sectional light intensity distribution (LIdes,ver) is at least as high as a first required light intensity distribution (LIreq,ver), the first required light intensity distribution defining minimum light intensity values for at least a part of the first cross-sectional plane.
4. LED light unit according to claim 1, wherein the second desired cross-sectional light intensity distribution (LIdes,hor) is at least as high as a second required light intensity distribution (LIreq,hor), the second required light intensity distribution defining minimum light intensity values for at least a part of the second cross-sectional plane.
5. LED light unit according to claim 1, wherein the inner surface of the refractive optical element has a circular shape in the first cross-sectional plane, with the outer surface of the refractive optical element being shaped in the first cross-sectional plane such that the inner surface and the outer surface transform the source-side light intensity distribution (LISS) in the first cross-sectional plane into the first desired cross-sectional light intensity distribution (LIdes,ver).
6. LED light unit according to claim 1, wherein the outer surface of the refractive optical element has a circular shape in the second cross-sectional plane, with the inner surface of the refractive optical element being shaped in the second cross-sectional plane such that the inner surface and the outer surface transform the source-side light intensity distribution (LISS) in the second cross-sectional plane into the second desired cross-sectional light intensity distribution (LIdes,hor).
7. LED light unit according to claim 1, wherein the first cross-sectional plane is perpendicular to the second cross-sectional plane.
8. LED light unit according to claim 1, wherein the first cross-sectional plane is a vertical cross-sectional plane and wherein the second cross-sectional plane is a horizontal cross-sectional plane.
9. LED light unit according to claim 1, wherein the light source is one single LED.
10. LED light unit according to claim 1, wherein the inner surface and the outer surface of the refractive optical element are continuous surfaces.
11. LED light unit according to claim 1, wherein a space between the light source and the refractive optical element is free of shutters and reflectors.
12. LED light unit according to claim 1, wherein at least one of the inner surface and the outer surface of the refractive optical element has a chamfer surface in a chamfer portion of the refractive optical element adjacent the support portion.
13. Passenger transport vehicle, such as an aircraft, a road vehicle, a ship or a rail car, having at least one LED light unit according to claim 1, the at least one LED light unit being positioned in the exterior of the passenger transport vehicle.
14. Method of producing an LED light unit according to any of claim 1, comprising the steps of:
(a) determining the first desired cross-sectional light intensity distribution (LIdes,ver) and the second desired cross-sectional light intensity distribution (LIdes,hor),
(b) providing the light source and determining the source-side light intensity distribution (LISS),
(c) determining a shape of the inner surface and the outer surface of the refractive optical element such that they jointly transform the source-side light intensity distribution (LISS) into the desired light intensity distribution (LIdes,ver, LIdes,hor),
(d) producing the refractive optical element having the shape determined in step (c), and
(e) assembling the support portion, the light source and the refractive optical element (8).
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method comprising:
generating an 8-bit checksum value corresponding to a 64-bit data value using a polynomial equation;
concatenating the 8-bit checksum value and the 64-bit data value to form a 72-bit data block;
storing the 72-bit data block in a memory;
reading the 72-bit data block from the memory;
generating a new checksum value for the 72-bit data block read from memory using the polynomial equation;
initiating error correction operations on either 1-bit persistent faults or 8-bit permanent faults from one DRAM if the new checksum value indicates an error.
2. The method of claim 1 wherein the 8-bit checksum value is generated on a 72-bit value comprising the 64-bit data value with 8 leading zero bits.
3. The method of claim 1 wherein the 8-bit checksum value is generated using the polynomial: P(x)=x8+x5+x3+x2+x+1.
4. The method of claim 1 wherein the 8-bit checksum value is generated using the polynomial: P(x)=x8+x2+1.
5. The method of claim 1 wherein the memory comprises nine 8-bit wide dynamic random access memory (DRAM) components.
6. The method of claim 1 wherein initiating error correction operations if the new checksum value indicates an error comprises:
inverting the data bits;
writing the inverted data bits to memory;
reading the inverted data bits from memory;
comparing the inverted data bits from memory to the inverted data bits to determine if a bit error has occurred;
correcting the bit error.
7. The method of claim 1 wherein initiating error correction operations if the new checksum value indicates an error comprises:
generating checksum values for a plurality of iterations of potential corrected data values;
evaluating the checksum values generated for the potential corrected data values;
selecting a potential corrected data value corresponding to a checksum value indicating no error;
designating the potential corrected data value corresponding to the checksum value indicating no error as a correct data value;
returning the correct data value.
8. The method of claim 1 further comprising:
maintaining a table of known permanent errors; and
using the table to correct data errors when the new checksum value indicates a data error.
9. A system comprising:
a memory having a plurality of memory devices;
a memory controller coupled with the memory to generate an 8-bit checksum value corresponding to a 64-bit data value using a polynomial equation, to concatenate the 8-bit checksum value and the 64-bit data value to form a 72-bit data block and to cause the 72-bit data block to be stored in the memory, the memory controller further to read the 72-bit data block from the memory, to generate a new checksum value for the 72-bit data block read from memory using the polynomial equation, and to initiate error correction operations if the new checksum value indicates an error.
10. The system of claim 9 wherein the 8-bit checksum value is generated on a 72-bit value comprising the 64-bit data value with 8 leading zero bits.
11. The system of claim 9 wherein the 8-bit checksum value is generated using the polynomial: P(x)=x8+x5+x3+x2+x+1.
12. The system of claim 9 wherein the 8-bit checksum value is generated using the polynomial: P(x)=x8+x2+1.
13. The system of claim 9 wherein the memory comprises nine 8-bit wide dynamic random access memory (DRAM) components.
14. The system of claim 9 wherein initiating error correction operations if the new checksum value indicates an error comprises the memory controller:
inverting the data bits;
writing the inverted data bits to memory;
reading the inverted data bits from memory;
comparing the inverted data bits from memory to the inverted data bits to determine if a bit error has occurred;
correcting the bit error.
15. The system of claim 9 wherein initiating error correction operations if the new checksum value indicates an error comprises the memory controller:
generating checksum values for a plurality of iterations of potential corrected data values;
evaluating the checksum values generated for the potential corrected data values;
selecting a potential corrected data value corresponding to a checksum value indicating no error;
designating the potential corrected data value corresponding to the checksum value indicating no error as a correct data value;
returning the correct data value.
16. The system of claim 9 further comprises the memory controller:
maintaining a table of known memory components with permanent errors; and
using the table to correct data errors when the new checksum value indicates a data error.