1. In an integrated circuit, a hybrid counter comprising:
a first stage coupled for receiving an input clock signal, the first stage including an asynchronous counter, the asynchronous counter including at least one asynchronous counter stage having an asynchronous level-mode state machine; and
a second stage coupled for receiving an output clock signal from the first stage, the second stage including a synchronous counter;
wherein the first stage steps down the frequency of the input clock signal to provide the output clock signal; and
wherein the first stage is responsive to both rising and falling edges of the input clock signal.
2. The hybrid counter, according to claim 1, wherein the first stage is configured to level-shift while responding to edges of the input clock signal.
3. The hybrid counter, according to claim 1, wherein the input clock signal frequency is stepped down by a factor of approximately eight to provide the output clock signal.
4. The hybrid counter, according to claim 3, wherein the input clock signal frequency is at least approximately 400 MHz.
5. The hybrid counter, according to claim 1, wherein the asynchronous level-mode state machine is formed of Differential Cascode Voltage Switch Logic.
6. The hybrid counter, according to claim 1, wherein the at least one asynchronous counter stage comprises:
a first asynchronous counter stage coupled to receive an input clock signal and a complement of the input clock signal, the first asynchronous counter including a first asynchronous level-mode state machine configured to provide count signals responsive to the input clock signal and the complement of the input clock signal, the first asynchronous level-mode state machine being formed of Differential Cascode Voltage Switch Logic.
7. The hybrid counter, according to claim 6, further comprising a second asynchronous counter stage coupled to receive the count signals, the second asynchronous counter stage having a second asynchronous level-mode state machine.
8. The hybrid counter, according to claim 7, wherein the first asynchronous counter stage and the second asynchronous counter stage are configured to progressively step down frequency of the input clock signal to provide a clock output signal at a fraction of the frequency thereof.
9. The hybrid counter, according to claim 7, wherein the first asynchronous level-mode state machine and the second asynchronous level-mode state machine each have a toggle flip-flop operation.
10. The hybrid counter, according to claim 9, wherein the first asynchronous level-mode state machine and the second asynchronous level-mode state machine are each implemented with Differential Cascode Voltage Switch Logic.
11. In an integrated circuit, a hybrid counter comprising:
a first stage coupled for receiving an input clock signal, the first stage including an asynchronous counter, the asynchronous counter including at least one asynchronous counter stage having an asynchronous level-mode state machine;
wherein the at least one asynchronous counter stage comprises:
a first asynchronous counter stage coupled to receive an input clock signal and a complement of the input clock signal, the first asynchronous counter including a first asynchronous level-mode state machine configured to provide count signals responsive to the input clock signal and the complement of the input clock signal, the first asynchronous level-mode state machine being formed of Differential Cascode Voltage Switch Logic;
a second stage coupled for receiving an output clock signal from the first stage, the second stage including a synchronous counter; and
a second asynchronous counter stage coupled to receive the count signals, the second asynchronous counter stage having a second asynchronous level-mode state machine;
wherein the first asynchronous counter stage and the second asynchronous counter stage are configured to progressively step down frequency of the input clock signal to provide a clock output signal at a fraction of the frequency thereof; and
wherein the second asynchronous counter stage is coupled to receive a count one signal to a complement clock port and to receive a complement of the count one signal to a non-complement clock port.
12. The hybrid counter, according to claim 11, wherein the first asynchronous counter stage is configured to provide an edge output signal and a complement of the edge output signal.
13. The hybrid counter, according to claim 12, wherein the first asynchronous level-mode state machine comprises a first portion and a second portion, the first portion and the second portion each coupled to receive the input clock signal and the complement of the input clock signal.
14. The hybrid counter, according to claim 13, wherein the first portion of the first asynchronous level-mode state machine is configured to provide the count one signal and the complement of the count one signal responsive to at least one of the input clock signal, the complement of the input clock signal, and state of the second portion of the first asynchronous level-mode state machine.
15. The hybrid counter, according to claim 14, wherein the second portion of the first asynchronous level-mode state machine is configured to provide the edge output signal and the complement of the edge output signal responsive to at least one of the input clock signal, the complement of the input clock signal, and state of the first portion of the first asynchronous level-mode state machine.
16. The hybrid counter, according to claim 15, further comprising zero count logic coupled to the first asynchronous counter stage for providing a count zero signal.
17. The hybrid counter, according to claim 16, wherein the zero count logic is configured to provide the count zero signal responsive to feedback of the count one signal, the complement of the count one signal, the edge output signal and the complement of the edge output signal.
18. The hybrid counter, according to claim 17, wherein the zero count logic is a Differential Cascode Voltage Switch Logic exclusive-OR gate coupled to receive the count one signal, the complement of the count one signal, the edge output signal and the complement of the edge output signal fed back.
19. In an integrated circuit, a hybrid counter comprising:
a first stage coupled for receiving an input clock signal, the first stage including an asynchronous counter, the asynchronous counter including at least one asynchronous counter stage having an asynchronous level-mode state machine;
wherein the at least one asynchronous counter stage comprises:
a first asynchronous counter stage coupled to receive an input clock signal and a complement of the input clock signal, the first asynchronous counter including a first asynchronous level-mode state machine configured to provide count signals responsive to the input clock signal and the complement of the input clock signal, the first asynchronous level-mode state machine being formed of Differential Cascode Voltage Switch Logic;
a second stage coupled for receiving an output clock signal from the first stage, the second stage including a synchronous counter; and
a second asynchronous counter stage coupled to receive the count signals, the second asynchronous counter stage having a second asynchronous level-mode state machine;
wherein the first asynchronous level-mode state machine and the second asynchronous level-mode state machine each have a toggle flip-flop operation;
wherein the first asynchronous level-mode state machine and the second asynchronous level-mode state machine are each implemented with Differential Cascode Voltage Switch Logic; and
wherein the first asynchronous counter stage and the second asynchronous counter stage are laid out with a repetitive tile pattern.
20. The hybrid counter, according to claim 19, wherein each tile of the repetitive tile pattern includes at least one well region laid out so as to reduce substrate noise generation.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A lighting assembly, comprising:
a light socket, at least partially disposed in a housing;
a first reflector base, having an aperture through which the light socket is accessible, and a reflective surface generally facing away from the light socket, wherein the light socket is disposed behind the reflective surface; and
a second reflector base, connected to at least one of the first reflector base and the light source housing, having a reflective surface generally facing the light source and the reflective surface of the first reflector base.
2. The lighting assembly of claim 1, wherein the first reflection base has a flat reflective surface adjacent the aperture, and a curved reflective surface at the periphery of the first reflection base, wherein the curved reflective surface curves generally toward the second reflector base.
3. The lighting assembly of claim 1, wherein the reflective surface of the first reflector base is concave, wherein the concavity is directed generally toward the second reflector base.
4. The lighting assembly of claim 1, wherein the reflective surface of the second reflector base is concave, wherein the concavity is directed generally toward the first reflector base.
5. The lighting assembly of claim 1, wherein the area of the reflective surface of the first reflector base is larger than the area of the reflective surface of the second reflector base.
6. The lighting assembly of claim 1, wherein:
the light socket housing is recessed within a ceiling, with the light socket facing downward from the ceiling;
the first reflector base is disposed on the surface of the ceiling, with the reflective surface of the first reflector base facing generally downward from the ceiling; and
the second reflector base is a pendant suspended from at least one of the first reflector base, the light source housing, and the ceiling, with the reflective surface of the second reflector base facing generally upward toward the ceiling.
7. The lighting assembly of claim 6,
wherein the light socket housing includes a suspension lacing ring, and
the lighting assembly further includes suspension lacing connected to the suspension lacing ring and the second reflector base.
8. The lighting assembly of claim 1, wherein:
the first reflector base is recessed within the surface of the ceiling, with the reflective surface of the first reflector base facing generally downward from the ceiling; and
the second reflector base is a pendant suspended from at least one of the first reflector base, the light source housing, and the ceiling, with the reflective surface of the second reflector base facing generally upward toward the ceiling.
9. The lighting assembly of claim 8,
wherein the light socket housing includes a suspension lacing ring, and
the lighting assembly further includes suspension lacing connected to the suspension lacing ring and the second reflector base.
10. The lighting assembly of claim 1, wherein:
the light socket housing is suspended from a ceiling structure, with the light socket facing downward from the ceiling structure;
the first reflector base is suspended from the ceiling structure, with the reflective surface of the first reflector base facing generally downward from the ceiling structure; and
the second reflector base is a pendant suspended from at least one of the first reflector base, the light source housing, and the ceiling structure, with the reflective surface of the second reflector base facing generally upward toward the ceiling structure.
11. The lighting assembly of claim 10,
wherein the light socket housing includes a suspension lacing ring, and
the lighting assembly further includes suspension lacing connected to the suspension lacing ring and the second reflector base.
12. The lighting assembly of claim 1, wherein:
the first reflector base is recessed within a desktop, with the reflective surface of the first reflector base facing generally upward from the desktop; and
the second reflector base is held above the first reflector base by spacers connected to at least one of the first reflector base, the light source housing, and the desktop, with the reflective surface of the second reflector base facing generally downward toward the first reflector base.
13. The lighting assembly of claim 1, wherein:
the first reflector base is mounted atop a stand, with the reflective surface of the first reflector base facing generally upward from the stand; and
the second reflector base is held above the first reflector base by spacers connected to at least one of the first reflector base, the light source housing, and the stand, with the reflective surface of the second reflector base facing generally downward toward the first reflector base.
14. The lighting assembly of claim 13, wherein the stand is a lamp stand.
15. The lighting assembly of claim 1, wherein the light socket is adapted to secure and provide electrical power to a light source.
16. The lighting assembly of claim 15, wherein the light socket is adapted to secure and provide electrical power to at least one of an incandescent light bulb, a halogen light bulb, a compact fluorescent bulb, an HID, and an LED.
17. The lighting assembly of claim 1, wherein a peripheral shape of the first reflector base is round.
18. The lighting assembly of claim 1, wherein a peripheral shape of the second reflector base is round.
19. The lighting assembly of claim 1, wherein a peripheral shape of the reflective surface of the first reflector base is round.
20. The lighting assembly of claim 1, wherein a peripheral shape of the reflective surface of the second reflector base is round.