What is claimed is:
1. A light emitting diode (LED) with nanoparticles, which comprises:
a first electrode for electric conduction;
a substrate for said LED to be grown thereon;
a luminescent nanoparticles layer for emitting light; and
a second electrode for electric conduction;
wherein current flowing through said luminescent nanoparticles layer by said first electrode and said second electrode for emitting light.
2. The LED of claim 1, wherein said luminescent nanoparticles layer substantially is an oxide luminescent nanoparticles layer.
3. The LED of claim 1, wherein said luminescent nanoparticles layer substantially is a semiconductor luminescent nanoparticles layer.
4. The LED of claim 1, wherein said luminescent nanoparticles layer substantially is a macromolecule luminescent nanoparticles layer.
5. The LED of claim 3, wherein said luminescent nanoparticles layer substantially is a CdS nanoparticles layer.
6. The LED of claim 1, each luminescent nanoparticle of said luminescent nanoparticles layer substantially has a specific diameter between 5 nm to 500 nm.
7. The LED of claim 1, each luminescent nanoparticle of said luminescent nanoparticles layer substantially is spreading uniformly for having high performance of emitting light.
8. The LED of claim 1, wherein said substrate substantially is a semiconductor substrate.
9. The LED of claim 1, wherein said substrate substantially is an insulator substrate.
10. The LED of claim 8, wherein said substrate substantially is a silicon substrate.
11. The LED of claim 1, wherein said first electrode is comprised of a material selected from a group consisting of Au, Ag, Al, and Mg.
12. The LED of claim 1, wherein said second electrode is comprised of a material selected from a group consisting of Au, Ag, Al, and Mg.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A switch apparatus, comprising:
a first connector arranged on a motherboard;
a platform controller hub (PCH) chip arranged on the motherboard and coupled to the first connector through a low pin count (LPC) bus, the PCH chip comprising a first trapping pin and a second trapping pin;
a first basic input output system (BIOS) chip arranged on the motherboard, and coupled to the PCH chip through a serial peripheral interface (SPI) bus;
a switch circuit arranged on the motherboard; and
a diagnostic card, comprising:
a second connector being detachably plugged into the first connector; and
a second BIOS chip coupled to the second connector, to output a high level control signal through the second connector;
wherein the switch circuit receives the high level control signal from the second BIOS chip through the first connector in response to the second connector being plugged into the first connector, the switch circuit outputs high level switch signals to the first and second trapping pins of the PCH chip, to select the second BIOS chip to bootstrap the motherboard; wherein the switch circuit does not receive the high level control signal in response to the second connector not being plugged into the first connector, the switch circuit outputs low level signals to the first and second trapping pins of the PCH chip, to select the first BIOS chip to bootstrap the motherboard.
2. The switch apparatus of claim 1, wherein first to eighth pins of the second connector are coupled to first to eighth pins of the second BIOS chip, respectively, ninth and eleventh pins of the second BIOS chip are grounded, a tenth pin of the second BIOS chip is coupled to a power terminal, the eighth pin of the second BIOS chip is coupled to the power terminal through a first resistor, to output the high level control signal.
3. The switch apparatus of claim 1, wherein first to seventh pins of the first connector are coupled to first to seventh pins of the PCH chip, respectively, eighth and eleventh pins of the first connector are grounded, a tenth pin of the first connector is coupled to a power terminal, a ninth pin of the first connector receives the high level control signal from the second BIOS chip in response to the second connector being plugged into the first connector, eighth to eleventh pins of the PCH chip are coupled to first to fourth pins of the first BIOS chip, respectively.
4. The switch apparatus of claim 3, wherein the switch circuit comprises a switch chip, a first pin of the switch chip is coupled to the first trapping pin of the PCH chip, a second pin of the switch chip is grounded, third and fourth pins of the switch chip are coupled to the ninth pin of the first connector, a fifth pin of the switch chip is grounded, a sixth pin of the switch chip is coupled to the second trapping pin of the PCH chip, the first and sixth pins of the switch chip are also coupled to the power terminal through first and second resistors, respectively; when the third pin of the switch chip receives a high level signal, the first pin of the switch chip is connected to the second pin of the switch chip to output the low level switch signal to the first trapping pin; when the fourth pin of the switch chip receives a high level signal, the sixth pin of the switch chip is connected to the fifth pin of the switch chip to output the low level switch signal to the second trapping pin of the PCH chip.
5. The switch apparatus of claim 4, wherein the second pin of the switch chip is grounded through a third resistor.
6. The switch apparatus of claim 5, wherein the third pin of the switch chip is grounded through a fourth resistor and a fifth resistor in that order, and a node between the fourth resistor and the fifth resistor is coupled to the ninth pin of the first connector.
7. The switch apparatus of claim 6, wherein the fifth pin of the switch chip is grounded through a sixth resistor.
8. The switch apparatus of claim 7, wherein the fourth pin of the switch chip is coupled to the ninth pin of the first connector through a seventh resistor.