1. A computer-implemented method for defining a relevance detection rule in an entity resolution system, the method comprising:
determining a rule relevance score for the relevance detection rule, wherein the rule relevance score provides a quantitative measure of relevance for an occurrence of an event that satisfies one or more conditions specified by the relevance detection rule;
storing the relevance detection rule; wherein the entity resolution system is configured to evaluate one or more identity records using the relevance detection rule to detect an occurrence of the event, wherein the entity resolution system maintains a set of known entities, wherein each known entity includes one or more identity records, and wherein each known entity is perceived by the entity resolution system to represent a single individual;
receiving a first identity record;
resolving the first identity record to a target entity comprising one of a first entity of the known entities and a newly created entity, whereby the first identity record is added to the one or more identity records of the target entity;
upon determining that the identity record satisfies the relevance detection rule, generating an alert by operation of one or more computer processors; and
assigning an alert relevance score to the alert, wherein the alert relevance score is determined, at least in part, from the rule relevance score.
2. The method of claim 1, wherein the alert relevance score provides a quantitative measure regarding a perceived relevance of the alert.
3. The method of claim 1, wherein the event is the detection of a relationship between a first individual represented by the target entity and a second individual represented by a second entity, the method further comprising:
creating a relationship between the target entity and the second entity, wherein the alert relevance score is further based, at least in part, on a relationship strength assigned to the detected relationship by the entity resolution system.
4. The method of claim 1, wherein the alert relevance score is further based, at least in part, on an alert relevance rule specifying one or more adjustments to the alert relevance score to apply to each alert generated on the basis of the relevance detection rule.
5. The method of claim 1, wherein the alert includes at least a reference to the first entity, a reference to the first identity record, and a reference to the relevance detection rule.
6. The method of claim 1, wherein the rule relevance score provides a numeric value, and wherein a greater magnitude of the numeric value corresponds to a greater degree of relevance for the event.
7. The method of claim 1, wherein the rule relevance score is selected from an ordered set of tags that designating increasing levels of relevance for the event.
8. A computer-readable storage medium containing a program which, when executed, performs an operation to define a relevance detection rule in an entity resolution system, the operation comprising:
determining a rule relevance score for the relevance detection rule, wherein the rule relevance score provides a quantitative measure of relevance for an occurrence of an event that satisfies one or more conditions specified by the relevance detection rule;
storing the relevance detection rule; wherein the entity resolution system is configured to evaluate one or more identity records using the relevance detection rule to detect an occurrence of the event, wherein the entity resolution system maintains a set of known entities, wherein each known entity includes one or more identity records, and wherein each known entity is perceived by the entity resolution system to represent a single individual;
receiving a first identity record;
resolving the first identity record to a target entity comprising one of a first entity of the known entities and a newly created entity, whereby the first identity record is added to the one or more identity records of the target entity;
upon determining that the identity record satisfies the relevance detection rule, generating an alert by operation of one or more computer processors when executing the program; and
assigning an alert relevance score to the alert, wherein the alert relevance score is determined, at least in part, from the rule relevance score.
9. The computer-readable storage medium of claim 8, wherein the alert relevance score provides a quantitative measure regarding a perceived relevance of the alert.
10. The computer-readable storage medium of claim 8, wherein the event is the detection of a relationship between a first individual represented by the target entity and a second individual represented by a second entity, the operation further comprising:
creating a relationship between the target entity and the second entity, wherein the alert relevance score is further based, at least in part, on a relationship strength assigned to the detected relationship by the entity resolution system.
11. The computer-readable storage medium of claim 8, wherein the alert relevance score is further based, at least in part, on an alert relevance rule specifying one or more adjustments to the alert relevance score to apply to each alert generated on the basis of the relevance detection rule.
12. The computer-readable storage medium of claim 8, wherein the alert includes at least a reference to the first entity, a reference to the first identity record, and a reference to the relevance detection rule.
13. The computer-readable storage medium of claim 8, wherein the rule relevance score provides a numeric value, and wherein a greater magnitude of the numeric value corresponds to a greater degree of relevance for the event.
14. The computer-readable storage medium of claim 8, wherein the rule relevance score is selected from an ordered set of tags that designating increasing levels of relevance for the event.
15. A system, comprising:
a processor; and
a memory containing a program, which, when executed by the processor is configured to define a relevance detection rule in an entity resolution system by performing a method comprising:
determining a rule relevance score for the relevance detection rule, wherein the rule relevance score provides a quantitative measure of relevance for an occurrence of an event that satisfies one or more conditions specified by the relevance detection rule
storing the relevance detection rule; wherein the entity resolution system is configured to evaluate one or more identity records using the relevance detection rule to detect an occurrence of the event, wherein the entity resolution system maintains a set of known entities, wherein each known entity includes one or more identity records, and wherein each known entity is perceived by the entity resolution system to represent a single individual;
receiving a first identity record;
resolving the first identity record to a target entity comprising one of a first entity of the known entities and a newly created entity, whereby the first identity record is added to the one or more identity records of the target entity; and
upon determining that the identity record satisfies the relevance detection rule, generating an alert; and
assigning an alert relevance score to the alert, wherein the alert relevance score is determined, at least in part, from the rule relevance score.
16. The system of claim 15, wherein the alert relevance score provides a quantitative measure regarding a perceived relevance of the alert.
17. The system of claim 15, wherein the event is the detection of a relationship between a first individual represented by the target entity and a second individual represented by a second entity, the method further comprising:
creating a relationship between the target entity and the second entity, wherein the alert relevance score is further based, at least in part, on a relationship strength assigned to the detected relationship by the entity resolution system.
18. The system of claim 15, wherein the alert relevance score is further based, at least in part, on an alert relevance rule specifying one or more adjustments to the alert relevance score to apply to each alert generated on the basis of the relevance detection rule.
19. The system of claim 15, wherein the alert includes at least a reference to the first entity, a reference to the first identity record, and a reference to the relevance detection rule.
20. The system of claim 15, wherein the rule relevance score provides a numeric value, and wherein a greater magnitude of the numeric value corresponds to a greater degree of relevance for the event.
21. The system of claim 15, wherein the rule relevance score is selected from an ordered set of tags that designating increasing levels of relevance for the event.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A burst mode control circuit, comprising:
a burst period signal generation unit for generating a burst period signal which is enabled during a burst mode operation period;
a burst pulse generation unit for generating a burst pulse, which is generated at each of predetermined cycles in the enabled period of the burst period signal, in response to a read command and a write command; and
a column access signal generation unit configured to receive the burst pulse and a clock signal and generate a column access signal which controls input and output of data during the burst mode operation period.
2. The burst mode control circuit of claim 1, wherein the burst period signal generation unit includes:
a pulse signal generation unit for shifting a first pulse signal, which is generated with a predetermined pulse width when the read command or the write command is inputted, in response to the clock signal to generate a second pulse signal; and
a signal driving unit for driving the burst period signal in response to the second pulse signal and a burst end signal.
3. The burst mode control circuit of claim 2, wherein the pulse signal generation unit includes:
a first pulse signal generation unit for generating the first pulse signal in response to the read command and the write command; and
a clock shifting unit for shifting the first pulse signal in response to the clock signal to generate the second pulse signal and a reset signal.
4. The burst mode control circuit of claim 3, wherein the first pulse signal is enabled when a pulse of the read command or the write command is inputted and disabled when the reset signal is enabled.
5. The burst mode control circuit of claim 3, wherein the first pulse signal generation unit includes:
a logic unit for performing a logic operation on the reset signal and the burst signal inputted thereto;
a driving unit for driving a first node in response to an output signal from the logic unit;
a driving control unit for controlling the driving of the driving unit in response to the read command and the write command; and
a latch unit connected between the first node and a second node from which the second pulse signal is outputted.
6. The burst mode control circuit of claim 5, wherein the first pulse signal generation unit further includes:
an initializing unit for initializing the first node in response to a power up signal.
7. The burst mode control circuit of claim 3, wherein the clock shifting unit includes:
a pulse output unit for shifting the first pulse signal by an integer number of cycles of the clock signal to output a shifted signal as the second pulse signal; and
a reset signal output unit for outputting the reset signal which is enabled after the first pulse signal is enabled and a period corresponding to the integer number of cycles of the clock signal is elapsed.
8. The burst mode control circuit of claim 7, wherein the pulse output unit includes:
a first transfer gate for transferring the first pulse signal in response to the clock signal;
a first latch unit for latching an output signal from the first transfer gate;
a second transfer gate for transferring an output signal from the first latch unit in response to the clock signal; and
a second latch unit for latching an output signal from the second transfer gate.
9. The burst mode control circuit of claim 8, wherein the pulse output unit further includes: an initializing device for initializing an output node of the second transfer gate in response to the power up signal.
10. The burst mode control circuit of claim 8, wherein the reset signal output unit buffers an output signal from the first latch unit in response to the clock signal and outputs a buffered signal as the reset signal.
11. The burst mode control circuit of claim 8, wherein the signal driving unit includes:
a pull-down device for pull-down driving the first node in response to the second pulse signal; and
a first pull-up device for pull-up driving the first node in response to the burst end signal.
12. The burst mode control circuit of claim 11, wherein the signal driving unit further includes:
a latch unit connected between the first node and a second node to latch a signal at the first node and output the latched signal as the burst period signal; and
a second pull-up device for pull-up driving the first node in response to an interrupt end pulse for pausing the burst mode by an interrupt.
13. The burst mode control circuit of claim 2, wherein the burst period signal is enabled when a pulse of the second pulse signal is inputted and disabled when a pulse of the burst end signal is inputted.
14. The burst mode control circuit of claim 13, wherein the pulse of the burst end signal is generated in a period when the burst mode is ended.
15. The burst mode control circuit of claim 1, wherein the burst pulse generation unit includes:
an internal clock generation unit for performing an oscillating operation in response to the clock signal when a pulse of the read command or the write command is inputted, to generate an internal clock having a predetermined cycle; and
a buffer unit for buffering the internal clock in response to the burst period signal and outputting the buffered clock as the burst pulse.
16. The burst mode control circuit of claim 15, wherein the internal clock generation unit includes:
a control signal generation unit for receiving the read command, the write command and a second control signal; and
an oscillator for oscillating a signal of a node, which is driven in response to a first control signal, in response to the second control signal to generate the internal clock.
17. The burst mode control circuit of claim 16, wherein the control signal generation unit includes:
a logic unit for performing a logic operation on the read command and the write command inputted thereto;
a first logic device for performing a logic operation on an output signal from the logic unit and the burst signal inputted thereto to generate the first control signal; and
a second logic device for performing a logic operation on an output signal from the first logic device and the clock signal inputted thereto to generate the second control signal.
18. The burst mode control circuit of claim 16, wherein the first control signal is enabled in a period where the pulse of the read command or the write command is inputted, and the second control signal is enabled after the pulse of the read command or the write command is inputted.
19. The burst mode control circuit of claim 1, wherein the column access signal generation unit buffers the burst pulse in response to the clock signal and outputs the buffered pulse as the column access signal.
20. A burst mode control circuit, comprising:
a burst pulse generation unit for generating a burst pulse, which includes a pulse generated at every predetermined number of cycles during a burst mode operation period; and
a column access signal generation unit for receiving the burst pulse and a clock signal and generating a column access signal which controls input and output of data during the burst mode operation period.
21. The burst mode control circuit of claim 20, wherein the burst pulse generation unit includes:
an internal clock generation unit for performing an oscillating operation in response to the clock signal when a pulse of a read command or write command is input, to generate an internal clock having a predetermined cycle; and
a buffer unit for buffering the internal clock in response to the burst period signal to output the buffered clock as the burst pulse.
22. The burst mode control circuit of claim 21, wherein the internal clock generation unit includes:
a control signal generation unit for receiving the read command, the write command and a second control signal; and
an oscillator for oscillating a signal of a node, which is driven in response to a first control signal, in response to the second control signal to generate the internal clock.
23. The burst mode control circuit of claim 22, wherein the control signal generation unit includes:
a logic unit for performing a logic operation on the read command and the write command inputted thereto;
a first logic device for performing a logic operation on an output signal from the logic unit and the burst signal inputted thereto to generate the first control signal; and
a second logic device for performing a logic operation on an output signal from the first logic device and the clock signal inputted thereto to generate the second control signal.
24. The burst mode control circuit of claim 22, wherein the first control signal is enabled in a period where the pulse of the read command or the write command is inputted, and the second control signal is enabled after the pulse of the read command or the write command is inputted.
25. The burst mode control circuit of claim 20, wherein the column access signal generation unit buffers the burst pulse in response to the clock signal and outputs the buffered pulse as the column access signal.