1. A method for measuring a rheological transition level between a first layer with first rheological properties, typically a fluid mud layer, and a second layer lying thereunder and having different, second rheological properties, typically a solid mud layer, said method comprising:
lowering an object through the first layer into the second layer lying thereunder, using a cable;
measuring a dynamic quantity of the moving cable with object, influenced by the rheological properties, or a change of this quantity; and
on the basis of this measurement determining when the object is located at the rheological transition level.
2. The method of claim 1, wherein the dynamic quantity influenced by the rheological properties is the force in the cable itself or a variable linked thereto, wherein during the descent of the object this dynamic quantity is measured while the velocity at which the cable descends is controlled.
3. The method of claim 2, wherein the velocity at which the cable is lowered is held within a determined range, and is preferably held substantially constant.
4. The method of claim 3, wherein the cable is lowered at a velocity considerably lower than an equilibrium velocity for the first layer, for which equilibrium velocity the gravitational force of the object is equal to the upward force exerted on the object during descent.
5. The method of claim 2, wherein the velocity at which the object is lowered is such that the cable becomes slack in the second layer, wherein the measurement of the change in force in the cable consists of detecting the slackness of the cable.
6. The method of claim 1, wherein the velocity at which the cable descends, or a variable linked thereto, is measured, whilst controlling the force in the cable.
7. The method of claim 6, wherein the force in the cable is held within a determined range, and is preferably held substantially constant.
8. The method of claim 7, wherein the force in the cable is set to a value for which the velocity in the second layer is greater than a determined critical value, for instance greater than 0.25 ms.
9. The method of claim 1, wherein the first layer has a first density and the second layer a second density, the object having an average density greater than the first density and greater than the second density.
10. The method of claim 1, wherein the length over which the cable has been lowered is measured for the position in which the determined change has been established.
11. A system for measuring a rheological transition between a first layer with first rheological properties, typically a fluid mud layer, and a second layer lying thereunder and having second rheological properties, typically a solid mud layer, comprising:
a loweringhoisting device with a cable and with control means for controlling the lowering;
an object connected to this cable and having an average density greater than that of the first and second layer;
a measuring means for measuring a dynamic variable of the loweringhoisting device influenced by the rheological properties, this such that it is possible to determine from the dynamic variable measured by the measuring means that the object is situated at the rheological transition level.
12. The system of claim 11, wherein the control means are adapted to control the lowering velocity and that the measuring means are adapted to measure a variable determining the force or a change in force in the cable.
13. The system of claim 11, wherein the measuring means are a slack cable switch.
14. The system of claim 11, wherein the loweringhoisting device is provided with a motor, the measuring means being adapted to measure a parameter of the motor representative of the force in the cable.
15. The system of claim 11, wherein the control means are adapted to control the force in the cable during lowering, and that the measuring means are adapted to measure the lowering velocity.
16. The system of claim 11, wherein the loweringhoisting device is provided with cable length measuring means for measuring the length of the lowered cable.
17. The system of claim 11, wherein the object is a steel sphere or wherein the object has a probe shaped body.
18. A sounding probe for measuring a rheological transition between a first layer with first rheological properties, typically a fluid mud layer, and a second layer lying thereunder and having second rheological properties, typically a solid mud layer, comprising:
an elongate body with a probe tip;
a measuring means for measuring a dynamic variable of the body when moving through the first and second layer, said dynamic variable being influenced by the rheological properties, such that it is possible to determine from the dynamic variable measured by the measuring means that the object is situated at the rheological transition level.
19. The sounding probe of claim 18, wherein said measuring means is a measuring means for measuring the velocity of a descending body, or a measuring means for measuring the acceleration of a descending body.
20. The sounding probe of claim 18, further comprising pressure measuring means for measuring the pressure exerted by the water column at the rheological transition level, in order to derive herefrom the depth of the rheological transition level.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method, comprising:
forming a gate electrode structure above a semiconductor region, said gate electrode structure comprising a gate dielectric material, a semiconductor material formed above said gate dielectric material and a dielectric cap material formed above said semiconductor material;
performing an oxidation process to form an oxide liner an sidewalls of said semiconductor material, a thickness of said oxide liner being greatest at an interface formed by said semiconductor material and said dielectric cap layer;
forming a spacer on sidewalls of said gate electrode structure;
forming cavities in said semiconductor region by using said dielectric cap layer and said spacer as an etch mask; and
forming a strain-inducing semiconductor material in said cavities by using said dielectric cap layer and said spacer as a growth mask.
2. The method of claim 1, wherein said spacer is formed by depositing a spacer layer having a thickness of approximately 8 nm or less.
3. The method of claim 2, wherein said spacer layer is deposited with a thickness of approximately 5 nm or less.
4. The method of claim 1, wherein forming said gate electrode structure comprises incorporating an implantation species locally in said semiconductor material so as to locally increase an oxidation rate of said semiconductor material.
5. The method of claim 4, wherein incorporating said implantation species comprises forming a layer of said semiconductor material and introducing said implantation species prior to patterning said layer of said semiconductor material.
6. The method of claim 4, wherein incorporating said implantation species comprises performing an implantation process using a non-zero tilt angle after forming said gate electrode structure.
7. The method of claim 4, wherein incorporating said implantation species comprises forming a mask material above said semiconductor region and laterally adjacent to said gate electrode structure and performing an implantation process in the presence of said mask material.
8. The method of claim 1, wherein said strain-inducing semiconductor material induces a compressive strain.
9. The method of claim 1, wherein forming said gate electrode structure comprises providing a high-k dielectric material in said gate dielectric material and providing a work function adjusting species above said high-k dielectric material.
10. A method, comprising:
forming a gate layer stack above a first semiconductor region and a second semiconductor region;
patterning said gate layer stack to form a first gate electrode structure above said first semiconductor region and a second gate electrode structure above said second semiconductor region, said first and second gate electrode structures comprising a semiconductor material;
modifying an oxidation behavior of the semiconductor material of said first gate electrode structure;
performing an oxidation process to form an oxide on sidewalls of said semiconductor material of said first and second gate electrode structures;
forming a spacer layer above said first and second gate electrode structures;
forming a spacer element on said sidewalls of said first gate electrode structure on the basis of said spacer layer; and
forming a strain-inducing semiconductor alloy in said first semiconductor region by using said spacer element as a mask.
11. The method of claim 10, wherein modifying said oxidation behavior comprises performing an implantation process to incorporate an implantation species with an average penetration depth of approximately 5 nm or less.
12. The method of claim 11, wherein performing said implantation process comprises applying a non-zero tilt angle.
13. The method of claim 10, wherein modifying said oxidation behavior comprises performing an electron bombardment.
14. The method of claim 10, wherein forming said gate layer stack comprises forming a high-k dielectric material above said first and second semiconductor regions and forming a metal-containing cap layer above said high-k dielectric material.
15. The method of claim 10, further comprising forming drain and source regions in said first and second semiconductor regions to form a P-channel transistor based on said first semiconductor region and an N-channel transistor based on said second semiconductor region.
16. The method of claim 10, further comprising forming a metal silicide in said semiconductor material of said first and second gate electrode structures.
17. The method of claim 10, wherein said spacer layer is formed with a thickness of approximately 8 nm or less.
18. The method of claim 10, further comprising forming a threshold adjusting semiconductor material selectively on said first semiconductor region prior to forming said first and second gate electrode structures.
19. A semiconductor device, comprising:
a gate electrode structure of a transistor formed above a semiconductor region and comprising a silicon-containing electrode material formed above a gate insulation layer comprising a high-k dielectric material, said silicon-containing electrode material having sidewalls, said gate electrode structure further comprising a silicon oxide material formed on said sidewalls, said silicon oxide material having thickness at a top of said silicon-containing electrode material that is greater than a thickness at a bottom of said silicon-containing electrode material;
a strain-inducing semiconductor alloy formed in said semiconductor region; and
drain and source regions at least partially formed in said strain-inducing semiconductor alloy.
20. The semiconductor device of claim 19, wherein said silicon-containing electrode material comprises a metal silicide.