1. An integrated circuit capacitor, comprising:
lower and upper capacitor electrodes; and
a capacitor dielectric layer extending between said lower and upper capacitor electrodes, said capacitor dielectric layer comprising a composite of a first dielectric layer extending directly on said lower capacitor electrode, a second dielectric layer extending directly on said upper capacitor electrode and a third dielectric layer extending between the first and second dielectric layers, said third dielectric layer having a higher crystallization temperature characteristic relative to the first and second dielectric layers and a thickness less than respective thicknesses of the first and second dielectric layers;
wherein the third dielectric layer is formed of Al2O3 or AlN; and
wherein the first and second dielectric layers are formed of ZrO2; and
wherein at least one of the first and second dielectric layers comprises nitrogen-doped ZrO2.
2. The capacitor of claim 1, further comprising a capping layer on said upper capacitor electrode, said capping layer comprising a material selected from a group consisting of silicon germanium, polysilicon and tungsten.
3. An integrated circuit capacitor comprising:
a lower electrode and an upper electrode; and
at least one first dielectric layer and at least one second dielectric layer interposed between the lower electrode and the upper electrode, the first dielectric layer extending directly on the lower electrode and the second dielectric layer extending directly on the first dielectric layer opposite to the lower electrode,
wherein the second dielectric layer has a higher crystallization temperature than that of the first dielectric layer and is thinner than the first dielectric layer;
wherein the first dielectric layer is a nitrogen-doped ZrO2 layer and the second dielectric layer is an Al2O3 layer or an AlN layer.
4. The integrated circuit capacitor of claim 3, wherein the first dielectric layer and the second dielectric layer are alternately stacked two and more times.
5. The integrated circuit capacitor of claim 3, wherein the higher crystallization temperature of the second dielectric layer raises the crystallization temperature of the first dielectric layer and the second dielectric layer during a back-end processing of the integrated circuit capacitor.
6. The integrated circuit capacitor of claim 3, wherein the second dielectric layer has a thickness of the range between 0.1 nm and 2 nm.
7. An integrated circuit capacitor, comprising:
lower and upper capacitor electrodes on a substrate; and
a capacitor dielectric layer extending between said lower and upper capacitor electrodes, said capacitor dielectric layer comprising a composite of a first dielectric layer extending directly on said lower capacitor electrode, a second dielectric layer extending directly on said upper capacitor electrode and a third dielectric layer extending between the first and second dielectric layers, said first and second dielectric layers comprising ZrO2 and said third dielectric layer comprising at least one of Al2O3 and AlN and having a thickness less than respective thicknesses of said first and second dielectric layers.
8. The capacitor of claim 7, further comprising a capping layer on said upper capacitor electrode, said capping layer comprising a material selected from a group consisting of silicon germanium, polysilicon and tungsten.
9. An integrated circuit capacitor, comprising:
a lower electrode and an upper electrode on a substrate; and
at least one first dielectric layer and at least one second dielectric layer extending between said lower and upper electrodes, said first dielectric layer extending directly on said lower electrode and said second dielectric layer extending between said first dielectric layer and said upper electrode and contacting said first dielectric layer;
wherein said second dielectric layer is thinner than said first dielectric layer; and
wherein said first dielectric layer is a ZrO2 layer and said second dielectric layer is an Al2O3 layer or an AlN layer having a higher crystallization temperature relative to said first dielectric layer.
10. The capacitor of claim 9, wherein said at least one first dielectric layer comprises two first dielectric layers and said at least one second dielectric layer comprises two second dielectric layers; and wherein said first and second dielectric layers are stacked in an alternating arrangement.
11. The capacitor of claim 9, wherein said second dielectric layer has a thickness in a range from about 0.1 nm to about 2 nm.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A photolithography system comprising:
an illumination source configured to produce electromagnetic radiation; and
a reticle having reduced thermal load, said reticle comprising:
a transparent flat substrate;
dielectric lands placed on said transparent flat substrate; and
electromagnetic radiation blocking lands placed on said dielectric lands;
wherein said dielectric lands have a reflectance greater than about sixty percent,
whereby electromagnetic radiation passing through said transparent flat substrate is reflected from said dielectric lands prior to reaching said electromagnetic radiation blocking lands resulting in less energy being absorbed in the reticle and the thermal load being reduced.
2. The photolithography system of claim 1, wherein said dielectric lands of said reticle comprise alternating layers of quarter-wave film of a higher refractive index and a lower refractive index than a refractive index of the transparent flat substrate.
3. The photolithography system of claim 1, wherein said dielectric lands of said reticle are reflective for any predetermined wavelength of electromagnetic radiation from 157 to 365 nanometers.
4. The photolithography system of claim 1, wherein said electromagnetic radiation blocking lands of said reticle are made of chrome.
5. The photolithography system of claim 1, wherein said electromagnetic radiation blocking lands of said reticle are made of aluminum.
6. The photolithography system of claim 1, wherein said transparent flat substrate of said reticle is selected from the group consisting of quartz, fluoride doped quartz, and calcium fluoride.