What is claimed is:
1. A method of inputoutput (IO) within a data processing system, said method comprising:
receiving an IO command from a processor core at an IO communication adapter, said IO command referencing an effective address within an effective address space of said processor core that identifies a storage location;
in response to receipt of the IO command, said IO communication adapter translating the effective address into a real address by reference to a translation data structure; and
said IO communication adapter accessing said storage location utilizing said real address to perform an IO data transfer specified by said IO command.
2. The method of claim 1, wherein said translation data structure comprises a translation lookaside buffer that caches copies of page table entries from an operating system page table, wherein said translating step comprises accessing a cached copy of a page table entry within the translation lookaside buffer.
3. The method of claim 2, and further comprising:
in response to a miss in said translation lookaside buffer, accessing a page table entry containing a translation for said effective address from a page table in system memory.
4. The method of claim 3, and further comprising:
while accessing said page table entry within said page table in system memory, said IO communication adapter buffering incoming IO read data.
5. The method of claim 1, wherein said step of accessing said storage location utilizing a real address comprises accessing a control block specifying parameters for said IO data transfer utilizing said real address.
6. The method of claim 1, and further comprising:
said IO communication adapter obtaining said effective address directly from the processor core without performing a memory access.
7. The method of claim 1, wherein said IO command indirectly references said effective address by specifying a storage location of a control block containing said effective address, said method further comprising:
said IO communication adapter obtaining said effective address from the control block.
8. An inputoutput (IO) communication adapter, comprising:
means for receiving an IO command from a processor core, said IO command referencing an effective address within an effective address space of said processor core that identifies a storage location;
means, responsive to receipt of the IO command, for translating the effective address into a real address by reference to a translation data structure; and
means for accessing said storage location utilizing said real address to perform an IO data transfer specified by said IO command.
9. The IO communication adapter of claim 8, wherein said translation data structure comprises a translation lookaside buffer that caches copies of page table entries from an operating system page table, wherein said means for translating step comprises means for accessing a cached copy of a page table entry within the translation lookaside buffer.
10. The IO communication adapter of claim 9, and further comprising:
means, responsive to a miss in said translation lookaside buffer, for accessing a page table entry containing a translation for said effective address from a page table in system memory.
11. The IO communication adapter of claim 10, and further comprising:
means for buffering incoming IO read data while accessing said page table entry within said page table in system memory.
12. The IO communication adapter of claim 8, wherein said means for accessing said storage location utilizing a real address comprises accessing a control block specifying parameters for said IO data transfer utilizing said real address.
13. The IO communication adapter of claim 8, and further comprising:
means for obtaining said effective address directly from the processor core without performing a memory access.
14. The IO communication adapter of claim 8, wherein said IO command indirectly references said effective address by specifying a storage location of a control block containing said effective address, said IO communication adapter further comprising:
means for obtaining said effective address from the control block.
15. A data processing system, comprising:
the IO communication adapter of claim 8;
a processor core coupled to the IO communication adapter; and
a lower level memory coupled to the processor core.
16. The data processing system of claim 15, wherein at least a portion of the IO communication adapter and processor core are integrated within the same integrated circuit chip.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method for checking the degree of soiling of bank notes, comprising:
transporting the bank notes along a transport path,
illuminating the bank notes with visible light in the blue spectral range,
detecting the light reflected andor emitted by the bank notes andor the light passing through the bank notes by reason of transmission, and
evaluating the light detected.
2. The method according to claim 1, wherein the bank notes are illuminated with light in a wavelength between 420 nm and 480 nm.
3. The method according to claim 1, wherein the optical density is determined during the evaluation of the detected light.
4. The method according to claim 1, wherein the bank notes are illuminated using pulsed light.
5. The method according to claim 1, wherein the bank notes are additionally illuminated using pulsed light from other wavelength ranges, wherein the light pulses are emitted from different light sources timed to be offset to each other in a chronological sequence.
6. The method according to claim 4, wherein the sequence of light pulses is irregular in its order.
7. The method according to claim 1, wherein only the light reflected andor emitted from unprinted areas of a bank note andor the light passing through unprinted areas of a bank note by reason of transmission is evaluated following detection.
8. A device for checking banknotes for their degree of soiling comprising, according to claim 1, wherein at least one light source that illuminates the bank notes with light in the blue spectral range, at least one sensor that detects the light reflected andor transmitted andor emitted by the bank note, and an evaluation apparatus that evaluates the light detected by the sensor.
9. The device according to claim 8, Device from claim 8, wherein the light source has at least one light-emitting diode.
10. The device according to claim 8, or 9, wherein the light from the light source has a wavelength between 380 and 460 nm.
11. The device according to claim 10, wherein the light from the light source has a wavelength between 420 and 460 nm.
12. The device according to claim 8, wherein the sensor is a transmitted light sensor.
13. The device according to claim 8, wherein the sensor is an incident light sensor.
14. The device according to claim 8, wherein the sensor is a trace sensor.
15. The device according to claim 8, wherein the sensor is a line sensor.