What is claimed is:
1. A semiconductor device comprising:
a single-crystal silicon substrate; and
a single-crystal oxide thin film having a perovskite structure formed through epitaxial growth on the single-crystal silicon substrate, said single-crystal oxide thin film being directly in contact with a surface of the single-crystal silicon substrate, and containing a bivalent metal that is reactive to silicon.
2. The semiconductor device as claimed in claim 1, wherein the bivalent metal is any bivalent metal but Sr.
3. The semiconductor device as claimed in claim 1, wherein the single-crystal oxide thin film is selected from the group consisting of PbTiO3, PbZrO3, Pb(Zr, Ti)O3, (Pb, La) (Zr, Ti)O3, BaTiO3, and (Ba, Sr)TiO3.
4. A semiconductor device comprising:
a single-crystal silicon substrate;
a single-crystal oxide thin film having a perovskite structure formed through epitaxial growth on the single-crystal silicon substrate; and
an amorphous silicon layer interposed between the single-crystal silicon substrate and the single-crystal oxide thin film.
5. A semiconductor device comprising:
a single-crystal silicon substrate;
a first single-crystal oxide thin film having a sodium chloride structure formed through epitaxial growth on the single-crystal silicon substrate; and
a second single-crystal oxide thin film having a perovskite structure formed through epitaxial growth on the first single-crystal oxide thin film,
said first single-crystal oxide thin film being selected from the group consisting of CaO, SrO, and BaO.
6. The semiconductor device as claimed in claim 4, wherein the single-crystal oxide thin film contains a bivalent metal selected from the group consisting of Sr, Ba, Pb, and La.
7. The semiconductor device as claimed in claim 4, wherein the single-crystal oxide thin film is selected from the group consisting of PbTiO3, PbZrO3, Pb(Zr, Ti)O3, (Pb, La) (Zr, Ti)O3, BaTiO3, (Ba, Sr)TiO3, and SrTiO3.
8. A semiconductor device comprising:
a single-crystal silicon substrate;
a first single-crystal oxide thin film having a sodium chloride structure formed through epitaxial growth on the single-crystal silicon substrate;
a second single-crystal oxide thin film having a perovskite structure formed through epitaxial growth on the first single-crystal oxide thin film; and
an amorphous layer formed between the single-crystal silicon substrate and the first single-crystal oxide thin film.
9. The semiconductor device as claimed in claim B, wherein the first single-crystal oxide thin film is selected from the group consisting of MgO, CaO, SrO, and BaO.
10. The semiconductor device as claimed in claim 8, wherein the second single-crystal oxide thin film is selected from the group consisting of PbTiO3, PbZrO3, Pb(Zr, Ti)O3, (Pb, La) (Zr, Ti)O3, BaTiO3, (Ba, Sr)TiO3, and SrTiO3.
11. A method of forming an epitaxial film, comprising the steps of:
forming a plume by irradiating a target containing a bivalent metal carbonate with a laser beam;
developing a bivalent metal oxide film from the bivalent metal carbonate through epitaxial growth on a single-crystal silicon substrate set in a passage of the plume; and
heating a surface of the target with an independent heat source different from the laser beam, thereby producing a single-crystal oxide epitaxial film.
12. The method as claimed in claim 11, wherein the step of heating the surface of the target is performed at the same time as the irradiation with the laser beam.
13. The method as claimed in claim 11, further comprising the step of heating the plume.
14. The method as claimed in claim 11, wherein the step of heating the surface of the target is performed prior to the irradiation with the laser beam.
15. The method as claimed in claim 11, wherein the step of heating the surface of the target is performed at such a temperature that the carbonate decomposes on the surface of the target.
16. The method as claimed in claim 11, further comprising the step of forming an oxide film having a perovskite structure through epitaxial growth on the single-crystal oxide epitaxial film by irradiating another target with a laser beam.
17. A laser ablation device comprising:
a processing chamber that is exhausted by an exhausting system;
a processed substrate that is held within the processing chamber;
a target that is provided in the processing chamber and faces the processed substrate;
an optical window that is provided in the processing chamber and corresponds to an optical path of the laser beam irradiating the target; and
a heat source that is provided in the processing chamber and covers a space between the processed substrate and the target.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A semiconductor memory device comprising:
a memory array having a plurality of memory cells arranged in rows and columns;
first and second ports receiving and transmitting inputoutput signals independent of each other; and
a selection circuit capable of simultaneously accessing said memory array according to addresses respectively input to said first and second ports,
said memory array including
a plurality of first and second word lines provided respectively corresponding to memory cell rows, and
a plurality of first and second bit lines provided respectively corresponding to memory cell columns,
each of said memory cells including a flip-flop circuit for setting first and second storage nodes to one and the other of first and second potential levels, respectively, according to data to be stored,
a first gate transistor having its gate electrically coupled to a corresponding first word line for electrically coupling a corresponding first bit line to said flip-flop circuit, and
a second gate transistor having its gate electrically coupled to a corresponding second word line for electrically coupling a corresponding second bit line to said flip-flop circuit,
said semiconductor memory device further comprising power supply lines provided respectively corresponding to memory cell rows, each supplying an operating voltage to said flip-flop circuit of each memory cell included in a corresponding memory cell row,
said selection circuit including
first and second row decoders provided respectively corresponding to said first and second ports for outputting respective row selection instructions according to input addresses, and
a plurality of word drivers provided respectively corresponding to memory cell rows, each driving corresponding first and second word lines according to row selection results from said first and second row decoders and also driving a corresponding power supply line, wherein
each of said word drivers sets a voltage level of a corresponding power supply line to a first voltage level when receiving an input of a row selection instruction from one of said first and second row decoders, and sets a voltage level of said corresponding power supply line to a second voltage level higher than said first voltage level when receiving inputs of row selection instructions from both of said first and second row decoders.
2. The semiconductor memory device according to claim 1, wherein
each of said word drivers includes
first and second word driver units provided respectively corresponding to corresponding first and second word lines for setting a voltage level of said corresponding first and second word lines to said first voltage level in response to row selection instructions respectively input from said first and second row decoders, and
a voltage switching circuit provided corresponding to a corresponding power supply line for detecting inputs of row selection instructions from both of said first and second row decoders to switch a voltage level of said corresponding power supply line from said first voltage level to said second voltage level.