1. A method of forming an integrated CMOS pressure sensor comprising:
forming a semiconductor substrate of a first conductivity type having a sensor area and a CMOS area;
forming a sensor diaphragm overlying a fixed electrode of the sensor;
subsequently forming source and drain areas of CMOS transistors in a surface of the semiconductor substrate and within the CMOS area of the semiconductor substrate prior to annealing the sensor diaphragm; and
annealing the sensor diaphragm and the source and drain areas.
2. The method of claim 1 wherein forming the sensor diaphragm includes forming the sensor diaphragm overlying a sensor isolation formed on the surface of the semiconductor substrate in the sensor area.
3. The method of claim 2 wherein forming the sensor diaphragm includes forming the sensor diaphragm from doped polysilicon that is overlying the fixed electrode and the sensor isolation.
4. The method of claim 2 wherein forming the sensor diaphragm includes forming the fixed electrode on the sensor isolation.
5. The method of claim 2 wherein forming the sensor diaphragm includes forming a tunneling oxide layer having a first portion on the sensor isolation and a second portion on the surface of semiconductor substrate in the CMOS area; and
forming the fixed electrode on the first portion of the tunneling oxide layer and a floating gate electrode on the second portion of the tunneling oxide layer prior to forming the diaphragm from doped polysilicon.
6. A method of forming a semiconductor pressure sensor comprising:
forming a semiconductor substrate of a first conductivity type having a sensor area and a CMOS area;
forming a sensor isolation in the sensor area and a field oxide area on a surface of the semiconductor substrate in the CMOS area wherein the sensor isolation is spaced apart from the field oxide area;
forming a first doped polysilicon area overlying the sensor isolation as an electrode area while forming a second doped polysilicon area as a floating gate area in the CMOS area;
forming a sensor diaphragm of doped polysilicon overlying the first doped polysilicon area and a sealing layer overlying the sensor diaphragm, wherein the second doped polysilicon area is protected while forming the sensor diaphragm and the sealing layer; and
subsequently implanting and annealing source and drain areas in the surface of the CMOS area of the semiconductor substrate.
7. The method of claim 6 further including forming a first tunneling oxide layer on a portion of the first field oxide area and a second tunneling oxide layer on the surface of the semiconductor substrate adjacent the second field oxide area.
8. The method of claim 6 wherein forming the semiconductor substrate includes forming the semiconductor substrate having a first well area of a second conductivity type, a second well area of the second conductivity type, and a third well area of the first conductivity type wherein the first, second and third well areas are formed on a surface of the semiconductor substrate.
9. The method of claim 8 wherein forming a first field oxide area includes forming the first field oxide area overlying a portion of the first well area and the second well area, and a second field oxide area adjacent the second and third well areas.
10. The method of claim 9 further including forming a doped area in the third well area adjacent the floating gate portion of the tunneling oxide layer;
forming a protective layer having a sensor area on a portion of the first field oxide area and having a CMOS area on the second well area, on the second field oxide layer, on the third well area, and on the floating gate portion of the doped polysilicon layer;
forming a low stress nitride layer having a sensor area on a portion of the first field oxide area and overlapping onto the electrode portion of the doped polysilicon, and having a CMOS area on the second well area, on the second field oxide layer, on the third well area, and on the second floating gate portion of the doped polysilicon layer; and
forming a sacrificial layer having a first portion on the electrode portion of the doped polysilicon layer and a second portion on the second well area, on the second field oxide layer, on the third well area, and on the second floating gate portion of the doped polysilicon layer.
11. The method of claim 10 wherein forming the pressure sensor diaphragm includes forming a polysilicon layer on the low stress nitride layer and covering the first portion of the sacrificial layer;
removing the sacrificial layer;
applying a sealing layer on the diaphragm polysilicon layer; and
removing the CMOS area of the low stress nitride layer.
12. The method of claim 10 wherein implanting and annealing source and drain areas includes implanting source and drain areas in the third well area for forming a floating gate of a memory cell in the third well area and overlying the second portion of the tunneling oxide layer, and implanting source and drain areas in the second well area for forming a CMOS transistors in the second well area.
13. A method of forming a semiconductor pressure sensor comprising:
forming a substrate of a semiconductor material of a first conductivity type, the substrate having a first well area of a second conductivity type, a second well area of the second conductivity type, and a third well area of the first conductivity type wherein the first, second and third well areas are formed on a surface of the substrate;
forming a first field oxide area overlying a portion of the first well area and the second well area, and a second field oxide area adjacent the second and third well areas;
forming a doped polysilicon layer having an electrode portion overlying the first field oxide area and having a floating gate portion overlying the third well area;
forming a doped area in the third well area adjacent the floating gate portion of the tunneling oxide layer;
forming an etch stop layer having a sensor area on a portion of the first field oxide area and having a CMOS area on the second well area, on the second field oxide layer, on the third well area, and on the floating gate portion of the doped polysilicon layer;
forming a low stress nitride layer having a sensor area on a portion of the first field oxide area and overlapping onto the electrode portion of the doped polysilicon, and having a CMOS area on the second well area, on the second field oxide layer, on the third well area, and on the second floating gate portion of the doped polysilicon layer;
forming a sacrificial layer having a first portion on the electrode portion of the doped polysilicon layer and a second portion on the second well area, on the second field oxide layer, on the third well area, and on the second floating gate portion of the doped polysilicon layer;
forming a diaphragm polysilicon layer on the low stress nitride layer and covering the first portion of the sacrificial layer;
removing the sacrificial layer;
applying a sealing layer on the diaphragm polysilicon layer;
removing the CMOS area of the low stress nitride layer;
implanting source and drain areas in the third well area for forming a floating gate CMOS in the third well area and overlying the second portion of the tunneling oxide layer, and implanting source and drain areas in the second well area for forming a CMOS in the second well area; and
annealing the source and drain areas.
14. The method of claim 14 wherein forming the doped polysilicon area includes forming a tunneling oxide layer having a first portion on a portion of the first field oxide area and a second portion of the tunneling oxide layer on a portion of the third well area.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A process for producing cyclohexylbenzene, the process comprising:
(a) feeding benzene and hydrogen to at least one reaction zone comprising a catalyst system, said catalyst system comprising a MCM-22 family molecular sieve and at least one hydrogenation metal, said MCM-22 family molecular sieve having an X-ray diffraction pattern including d-spacing maxima at 12.4\xb10.25, 6.9\xb10.15, 3.57\xb10.07 and 3.42\xb10.07 Angstrom;
(b) adjusting hydroalkylation conditions for said at least one reaction zone to produce a hydroalkylation conversion in a range of from about 15% to about 75% wherein said hydroalkylation conditions include a hydroalkylation temperature within the range of from about 125\xb0 C. to about 175\xb0 C. and a hydroalkylation pressure within the range of from about 125 psig (862 kPag) to about 175 psig (1227 kPag), such that the selectivity to cyclohexylbenzene is in a range from about 45% to about 85%; and
(c) contacting said benzene and said hydrogen in said reaction zone wherein the ratio of the total number of moles of hydrogen fed to the at least one reaction zone to the total number of moles of benzene fed to the at least one reaction zone is from about 0.45 to about 0.95.
2. The process of claim 1, wherein said hydroalkylation conditions of temperature is in the range of from about 135\xb0 C. to about 165\xb0 C.
3. The process of claim 1, wherein said hydroalkylation conditions of pressure is in the range of from about 931 kPag to about 1138 kPa-a.
4. The process of claim 1, wherein said hydroalkylation conditions include a weight hourly space velocity in the range of from about 0.26 hr\u22121 to less than about 1.35 hr\u22121.
5. The process of claim 1, wherein said MCM-22 family molecular sieve is selected from the group consisting of MCM-22, PSH-3, SSZ-25, ERB-1, ITQ-1, ITQ-2, MCM-36, MCM-49, MCM-56, UZM-8 and combinations of any two or more thereof.
6. The process of claim 1, wherein said at least one hydrogenation metal is selected from the group consisting of palladium, ruthenium, nickel, zinc, tin, cobalt, and combinations of any two or more thereof.
7. The process of claim 1, wherein said molecular sieve is MCM-49 and said at least one hydrogenation metal is palladium.
8. The process of claim 1, wherein said at least one hydrogenation metal is present in an amount from about 0.05% to about 10% by weight of the catalyst system.
9. The process of claim 1, wherein said benzene is passed through a reactive guard bed to remove at least a portion of reactive impurities, said reactive impurities comprising nitrogen compounds.
10. The process of claim 1, wherein said portion of the hydrogenation metal is supported on an inorganic oxide different from the molecular sieve.
11. The process of claim 10, wherein said inorganic oxide comprises an oxide of at least one element of Groups 2, 4, 13 and 14 of the Periodic Table of Elements.
12. The process of claim 10, wherein said inorganic oxide is selected from the group consisting of alumina, titania, zirconia and combinations of two or more thereof.
13. The process of claim 1, wherein said effluent further comprises dicyclohexylbenzene and at least part of the dicyclohexylbenzene is contacted with additional benzene under transalkylation conditions to produce addition cyclohexylbenzene.
14. The process of claim 1, wherein the benzene conversion is in the range of from about 30% to about 60%.
15. The process of claim 1, further comprising the step of selecting a ratio of the total number of moles of hydrogen fed to the at least one reaction zone to the total number of moles of benzene fed to the at least one reaction zone in a range of from about 0.55 to about 0.75, to produce said hydroalkylation conversion.
16. The process of claim 1, wherein said hydroalkylation conditions of temperature is in the range of from about 145\xb0 C. to about 155\xb0 C., said hydroalkylation conditions of pressure is in the range of from about 931 kPag to about 1138 kPag.
17. The process of claim 1, wherein said MCM-22 family molecular sieve is selected from the group consisting of MCM-22, PSH-3, SSZ-25, ERB-1, ITQ-1, ITQ-2, MCM-36, MCM-49, MCM-56, UZM-8 and combinations of any two or more thereof, and said at least one hydrogenation metal is selected from the group consisting of palladium, ruthenium, nickel, zinc, tin, cobalt, and combinations of any two or more thereof.
18. The process of claim 1, wherein said at least one reaction zone is a fixed bed reactor.
19. A method for coproducing phenol and cyclohexanone, the method comprising the steps of producing cyclohexylbenzene by the process of claim 1, oxidizing the cyclohexylbenzene to produce cyclohexylbenzene hydroperoxide and cleaving the cyclohexylbenzene hydroperoxide to produce phenol and cyclohexanone.
20. A process of claim 1, wherein the step (b) comprises adjusting hydroalkylation conditions for said at least one reaction zone to produce a hydroalkylation conversion in a range of from about 20% to about 30%.