1. A scaffold for promoting restoration of a tissue when implanted at an anatomical site in a patient, comprising:
at least a portion of a liver-derived devitalized mammalian parenchymatous tissue combined with a target mammalian cell population, wherein the combined tissue and cell population is sized and shaped for implantation in the patient at the anatomical site remote from the tissue requiring restoration.
2. The scaffold of claim 1 wherein the devitalized mammalian liver tissue further comprises a basement membrane.
3-5. (canceled)
6. The scaffold of claim 1 wherein the cell population is a population of stem cells introduced into the tissue.
7. The scaffold of claim 6 wherein the stem cells comprise autogeneic stem cells.
8. The scaffold of claim 6 wherein the stem cells comprise allogeneic stem cells.
9. The scaffold of claim 6 wherein the stem cells comprise xenogeneic stem cells.
10. The scaffold according to claim 1 wherein the tissue undergoing restoration comprises an endocrine tissue.
11. The scaffold of claim 1 wherein the target cell population comprises mammalian endocrine cells.
12. The scaffold of claim 11 wherein the mammalian endocrine cells comprise pancreatic islet cells.
13. The scaffold of claim 11 wherein the mammalian endocrine cells comprise pituitary cells.
14. The scaffold of claim 11 wherein the mammalian endocrine cells comprise thyroid cells.
15. The scaffold of claim 11 wherein the mammalian endocrine cells comprise cells from the adrenal gland.
16-18. (canceled)
19. The scaffold of claim 10 wherein the mammalian endocrine cells are autogeneic.
20. The scaffold of claim 10 wherein the mammalian endocrine cells are allogeneic.
21. The scaffold of claim 10 wherein the mammalian endocrine cells are xenogeneic.
22. A method for promoting restoration of a tissue when implanted at an anatomical site in a patient, comprising:
providing at least a portion of a liver-derived devitalized mammalian parenchymatous tissue combined with a target mammalian cell population, wherein the combined tissue and cell population is sized and shaped for implantation at the anatomical site in the patient; and
implanting the combined tissue and cell population into a site remote from the tissue requiring restoration.
23. The method of claim 22, wherein the scaffold is implanted subcutaneously.
24. The method of claim 22, wherein the scaffold is implanted into the abdominal cavity.
25. The method of claim 22, wherein the scaffold is implanted into the thoracic cavity.
26. The method of claim 22, wherein the scaffold is implanted subcutaneously.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A flip-flop circuit having an input to receive an input signal and having an output to provide an output signal, comprising:
a flip-flop having a data input, a clock input, and a data output;
a first pass gate having an input to receive the input signal, an output coupled to the data input of the flip-flop, and a control terminal to receive a first control signal;
a second pass gate having a first data terminal coupled to the data input of the flip-flop, a second data terminal coupled to the output of the flip-flop circuit, and a control terminal to receive a second control signal; and
a third pass gate having an input coupled to the data output of the flip-flop, an output coupled to the output of the flip-flop circuit, and a control terminal to receive a third control signal,
wherein the first, second, and third control signals are unique signals that are generated in response to a clock enable signal and a bypass signal.
2. The flip-flop circuit of claim 1, wherein the flip-flop circuit further includes a control circuit comprising:
a first OR gate having inputs to receive the clock enable signal and the bypass signal, and having an output to generate the first control signal;
a second OR gate having inputs to receive the bypass signal and a logical complement of the clock enable signal, and having an output to generate the second control signal; and
an inverter having an input to receive the bypass signal and having an output to generate the third control signal.
3. The flip-flop circuit of claim 1, wherein the first control signal comprises the clock enable signal, the second control signal comprises a logical combination of the clock enable signal and the bypass signal, and the third control signal comprises a logical complement of the bypass signal.
4. The flip-flop circuit of claim 3, wherein the second pass gate is conductive if either the clock enable signal is de-asserted or the bypass signal is asserted.
5. The flip-flop circuit of claim 1, further comprising:
a pull-down transistor coupled between the data input of the flip-flop and ground potential and having a gate to receive a reset signal.
6. The flip-flop circuit of claim 5, wherein assertion of the reset signal forces the output of the flip-flop to a logic low state.
7. The flip-flop circuit of claim 1, further comprising:
a fourth pass gate having an input to receive a scan chain signal, a control terminal to receive a fourth control signal, and an output;
a fifth pass gate having an input coupled to the output of the fourth pass gate, a control terminal to receive a fifth control signal, and an output coupled to the data input of the flip-flop; and
a pull-down transistor coupled between the input of the fifth pass gate and ground potential and having a gate responsive to the fourth control signal.
8. The flip-flop circuit of claim 7, wherein the fourth control signal comprises a reset signal.
9. The flip-flop circuit of claim 8, wherein the fifth control signal comprises a logical combination of the reset signal and a test signal.
10. The flip-flop circuit of claim 1, wherein the second pass gate is configured to selectively route either the output signal to the data input of the flip-flop or the input signal to the output of the flip-flop circuit.