1. A molecular storage device, comprising
a micron or sub-micron size electrochemical cell that includes:
a working electrode electrically coupled to a layer of chemisorbed storage molecules;
a counter electrode;
an auxiliary counter electrode electrically coupled to a layer of chemisorbed redox-active molecules; and
an electrolyte that contacts the working electrode, the counter electrode, and the auxiliary counter electrode.
2. A molecular storage device, comprising
a micron or sub-micron size electrochemical cell that includes:
a working electrode;
a counter electrode;
an auxiliary counter electrode;
an electrolyte that contacts the working electrode, the counter electrode, and the auxiliary counter electrode; and
redox-active molecules electrically coupled to at least one of the electrodes.
3. The device of claim 2, wherein at least some of the redox-active molecules are in one or more chemisorbed layers.
4. The device of claim 2, wherein the redox-active molecules are covalently bonded to at least one of the electrodes.
5. The device of claim 2, wherein the redox-active molecules are electrically coupled to the working electrode and the auxiliary counter electrode.
6. The device of claim 2, wherein the storage molecules are monomeric porphyrins, ferrocene-derivatized porphyrins, dimeric porphyrins, trimeric porphyrins, porphyrin derivatives, porphyrin polymers, or combinations thereof.
7. The device of claim 2, wherein the working electrode comprises gold, aluminum, silver, carbon, tungsten, copper, platinum, titanium, tantalum, tungsten, polysilicon, nanocrystalline silicon, titanium nitride, tantalum nitride, titanium tungsten, IrO, RuO, OsO, RhO, ITO, or combinations thereof.
8. The device of claim 2, wherein the auxiliary counter electrode comprises gold, aluminum, silver, carbon, tungsten, copper, platinum, titanium, tantalum, tungsten, polysilicon, nanocrystalline silicon, titanium nitride, tantalum nitride, titanium tungsten, IrO, RuO, OsO, RhO, ITO, or combinations thereof.
9. The device of claim 2, wherein the electrolyte comprises a polymer matrix and an ionic liquid; an ion-conducting glass or ceramic; an ion-conducting transition metal oxide, or a solid electrolyte.
10. A memory element, comprising
a switching device coupled to a micron or sub-micron size electrochemical cell, wherein the electrochemical cell includes:
a working electrode;
a counter electrode;
an auxiliary counter electrode;
an electrolyte that contacts the working electrode, the counter electrode, and the auxiliary counter electrode; and
redox-active molecules electrically coupled to at least one of the electrodes.
11. A memory element, comprising:
a switching device;
a bit line and a word line coupled to the switching device; and
a micron or sub-micron size electrochemical cell coupled to the switching device, wherein the electrochemical cell includes:
a working electrode electrically coupled to a layer of chemisorbed storage molecules;
a counter electrode;
an auxiliary counter electrode electrically coupled to a layer of chemisorbed redox-active molecules; and
an electrolyte that contacts the working electrode, the counter electrode, and the auxiliary counter electrode.
12. A memory array, comprising
an array of memory elements, wherein at least some of the memory elements comprise
a switching device coupled to a micron or sub-micron size electrochemical cell, wherein the electrochemical cell includes:
a working electrode;
a counter electrode;
an auxiliary counter electrode;
an electrolyte that contacts the working electrode, the counter electrode, and the auxiliary counter electrode; and
redox-active molecules electrically coupled to at least one of the electrodes.
13. The memory array of claim 12, wherein the array comprises at least 250,000 memory elements with a switching device coupled to a micron or sub-micron size electrochemical cell.
14. A computing device, comprising
a central processing unit coupled to a molecular memory that includes an array of memory elements, wherein at least some of the memory elements comprise
a switching device coupled to a micron or sub-micron size electrochemical cell, wherein the electrochemical cell includes:
a working electrode;
a counter electrode;
an auxiliary counter electrode;
an electrolyte that contacts the working electrode, the counter electrode, and the auxiliary counter electrode; and
redox-active molecules electrically coupled to at least one of the electrodes.
15. The computing device of claim 14, wherein the computing device is a laptop computer, personal digital assistant, cell phone, digital camera, digital camcorder, or embedded computer.
16. The computing device of claim 14, wherein the switching device is a transistor.
17. A method of reading a molecular memory device, comprising:
coupling a bit line to an electrochemical cell, wherein the electrochemical cell includes:
a working electrode electrically coupled to storage molecules;
a counter electrode;
an auxiliary counter electrode; and
an electrolyte that contacts the working electrode, the counter electrode, and the auxiliary counter electrode; and
monitoring the bit line for changes in potential indicative of the oxidation state of the storage molecules.
18. The method of claim 17, wherein the auxiliary counter electrode is electrically coupled to redox-active molecules.
19. The method of claim 17, wherein the electrochemical cell is micron or sub-micron in size.
20. A method of reading a molecular memory device, comprising:
precharging a bit line to a predetermined potential;
coupling the bit line to an electrochemical cell, wherein the electrochemical cell includes:
a working electrode electrically coupled to storage molecules;
a counter electrode;
an auxiliary counter electrode; and
an electrolyte that contacts the working electrode, the counter electrode, and the auxiliary counter electrode; and
monitoring the bit line for changes in potential indicative of the oxidation state of the storage molecules.
21. A method of writing to a molecular memory device, comprising:
coupling a bit line to an electrochemical cell, wherein the electrochemical cell includes:
a working electrode electrically coupled to storage molecules;
a counter electrode;
an auxiliary counter electrode; and
an electrolyte that contacts the working electrode, the counter electrode, and the auxiliary counter electrode; and
applying a voltage to the bit line to set the oxidation state of the storage molecules.
22. The method of claim 21, wherein the auxiliary counter electrode is electrically coupled to redox-active molecules.
23. The method of claim 21, wherein the electrochemical cell is micron or sub-micron in size.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method of run-to-run control of a manufacturing process, comprising:
performing a plurality of runs of said manufacturing process, each of said runs comprising:
applying a value of a process input to said manufacturing process;
determining a measured value of a process output of the respective run; and
calculating a process input quantity based on said measured value, said applied value of said process input, a target value of said process output, at least one value of a bias parameter, and at least one value of a sensitivity parameter, wherein said sensitivity parameter describes a variation of said process output caused by a variation of said process input and wherein the value of the process input applied in a subsequent one of said plurality of runs is based on said process input quantity;
wherein said bias parameter is modified between each pair of sequential runs of said manufacturing process and said sensitivity parameter is modified between at least one pair of said runs of said manufacturing process.
2. The method of claim 1, wherein said calculation of said process input quantity comprises adding a correction value to said value of said process input.
3. The method of claim 2, wherein said correction value comprises a ratio between a difference between said target value and said measured value and a value of said sensitivity parameter.
4. The method of claim 1, wherein said process input applied in said subsequent one of said plurality of runs comprises a weighted average of said process input quantity and said process input.
5. The method of claim 1, wherein said sensitivity parameter is modified based on results of at least one test run of said manufacturing process.
6. The method of claim 1, wherein said process input comprises an amount of light applied in an exposure of a layer of a photoresist formed on a semiconductor structure.
7. The method of claim 6, wherein said process output comprises a critical dimension of portions of said layer of photoresist remaining on said semiconductor structure after a development of said photoresist.
8. The method of claim 7, wherein said determination of said measured value of said process output comprises an inspection of said semiconductor structure after said development of said photoresist.
9. The method of claim 8, wherein said inspection of said semiconductor structure comprises at least one of optical microscopy, electron microscopy and laser scanning.
10. A method, comprising performing a plurality of runs of a manufacturing process, each of said runs comprising:
providing a semiconductor structure comprising a layer of a photoresist;
exposing said semiconductor structure with an amount of light;
developing said photoresist to define a plurality of photoresist features;
measuring a critical dimension of at least one of said photoresist features remaining on said semiconductor structure after said development of said photoresist; and
calculating an exposure value based on said critical dimension, said amount of light, a target value of said critical dimension, at least one value of a bias parameter, and at least one value of a sensitivity parameter, wherein said sensitivity parameter describes a variation of said critical dimension caused by a variation of said amount of light and wherein the amount of light applied in the exposure of the semiconductor structure in a subsequent one of said plurality of runs is based on said exposure value;
wherein said bias parameter is modified between each pair of sequential runs of said manufacturing process and said sensitivity parameter is modified between at least one pair of said runs of said manufacturing process.
11. The method of claim 10, wherein said calculation of said exposure value comprises adding a correction value to said amount of light.
12. The method of claim 11, wherein said correction value comprises a ratio between a difference between said target value and said critical dimension and said sensitivity parameter.
13. The method of claim 10, wherein said amount of light applied in the exposure of the semiconductor structure in the subsequent one of the plurality of runs comprises a weighted average of said exposure value and said amount of light.
14. The method of claim 10, wherein said sensitivity parameter is modified based on results of at least one test run of said manufacturing process.
15. The method of claim 10, wherein said measurement of said critical dimension comprises an inspection of said semiconductor structure.
16. The method of claim 15, wherein said inspection of said semiconductor structure comprises at least one of optical microscopy, electron microscopy and laser scanning.