What is claimed is:
1. A semiconductor sensor device comprising a plurality of sensor elements, a signal read circuit for reading levels of output signals from said sensor elements to output pixel data for said sensor elements, said signal read circuit having a bias circuit for supplying a bias signal to said output signals, a first comparator for comparing said pixel data against a specified threshold level to output result signals having 1 or 0, a counter for counting a number of said result signals for said pixel data, a second comparator for comparing sad number of said result signals against a specified number, and a bias controller for controlling said bias signal so that said number of said result signals becomes substantially equal to said specified number.
2. The semiconductor sensor device as defined in claim 1, wherein said bias controller determines bits of said bias signal from a most significant bit to a least significant bit.
3. The semiconductor sensor device as defined in claim 1, further comprising a fixed pattern noise (FPN) correction circuit for correcting said pixel data by using FPN correction data, wherein said controller calculates first and second desired values for said bias signal based on said number of said result signals having 1 and said number of said result signals having 0, respectively, and said FPN correction circuit determines said FPN correction data based on said first and second desired values.
4. The semiconductor sensor device as defined in claim 4, further comprising a fixed pattern noise (FPN) correction circuit for correcting said pixel data by using FPN correction data, wherein said second comparator compares said number of said result signals against a first specified number and a second specified number, and said controller calculates first and second desired values for said bias signal based on said first specified number and said second specified number, respectively, and said FPN correction circuit determines said FPN correction data based on said first and second desired values.
5. A semiconductor sensor device comprising a plurality of sensor elements, a signal read circuit for reading levels of output signals from said sensor elements to output pixel data for said sensor elements, said signal read circuit having a bias circuit for supplying a bias signal to said output signals, a fixed pattern noise (FPN) correction circuit for correcting said pixel data by using FPN correction data, a first comparator for comparing said pixel data against a specified threshold level to output result signals having 1 or 0, a counter for counting a number of said result signals for said pixel data, and a bias controller for determining said bias signal at a first value so that first said number of said results signals counted based on said first value becomes substantially equal to second said number of said result signals counted based on a second value which is obtained based on said first value and a full scale of said FPN correction data.
6. A method for controlling a semiconductor sensor device having a plurality of sensor elements, a signal read circuit for reading levels of output signals from said sensor elements to output pixel data for said sensor elements, said signal read circuit having a bias circuit for supplying a bias signal to said output signals, said method comprising the steps of:
comparing said pixel data against a specified threshold level to output result signals having 1 or 0;
counting a number of said result signals for said pixel data;
comparing said number of said result signals against a specified number; and
controlling said bias signal so that said number of said result signals becomes substantially equal to said specified number.
7. The method as defined in claim 6, wherein said controlling step includes determining bits of said bias signal from a most significant bit to a least significant bit.
8. The method as defined in claim 6, wherein said controlling steps includes calculating first and second desired values for said bias signal based on said number of said result signals having 1 and said number of said result signals having 0, respectively, and determining a FPN correction data based on said first and second desired values.
9. The method as defined in claim 6, wherein said number comparing step includes comparing said number of said result signals against a first specified number and a second specified number, calculating first and second desired values for said bias signal based on said first specified number and said second specified number, respectively, and determining, a FPN correction data based on said first and second desired values.
10. A method for controlling a semiconductor sensor device having a plurality of sensor elements, a signal read circuit for reading levels of output signals from said sensor elements to output pixel data for said sensor elements, said signal read circuit having a bias circuit for supplying a bias signal to said output signals, and a fixed pattern noise (FPN) correction circuit for correcting said pixel data by using FPN correction data, said method comprising the steps of:
comparing said pixel data against a specified threshold level to output result signals having 1 or 0;
counting a number of said result signals for said pixel data; and
determining said bias signal at a first value so that first said number of said results signals counted based on said first value becomes substantially equal to second said number of said result signals counted based on a second value which is obtained based on said first value and a full scale of said FPN correction data.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method of assembling a modular floor tile, comprising:
providing a modular floor tile having a top surface layer and a plurality of rigid support members extending from the top surface layer;
providing at least one resilient support assembly comprising first and second resilient support portions;
mounting the first resilient support portion to the modular floor tile;
mounting the second resilient support portion to the modular floor tile.
2. The method of claim 1, wherein providing the at least one resilient support assembly includes forming the first and second resilient support portions as a single, unitary piece.
3. The method of claim 1, wherein providing the at least one resilient support assembly includes forming the first and second resilient support portions as separate pieces.
4. The method of claim 1, wherein mounting the first and second resilient support portions includes concurrently mounting the first and second resilient support portions to the modular floor tile.
5. The method of claim 1, wherein mounting the first resilient support portion includes creating an interference fit between the plurality of rigid support members and the first resilient support portion.
6. The method of claim 1, wherein mounting the second resilient support portion includes positioning at least one of the plurality of rigid support members between the first and second resilient support portions.