1. A door handle for refrigerators and kitchen units comprising:
a) a base plate having a front surface, a rear surface, and an edge connecting the front and rear surfaces; and
b) a lip plate having a top surface, a bottom surface, an edge connecting the top and bottom surfaces, and a coated portion fixed on the top surface of the lip plate,
wherein a part of the edge of the base plate is adjacent to a part of the edge of the lip plate, wherein a gap is provided between the front surface of the base plate and the bottom surface of the lip plate.
2. The door handle of claim 1, wherein the lip plate partly covers the base plate allowing a hand to access the gap provided between the front surface of the base plate and the bottom surface of the lip plate.
3. The door handle of claim 1, wherein the front surface of the base plate is concave.
4. The door handle of claim 3, wherein the bottom surface of the lip plate is concave or flat.
5. The door handle of claim 3, wherein the top surface of lip plate is convex or flat.
6. The door handle of claim 1, wherein the base plate is integrated with the door of the refrigerators or the kitchen units.
7. The door handle of claim 1, wherein the base plate is positioned at a location on the door far from the rotational axis of the door to generate a predetermined torque.
8. The door handle of claim 7, wherein the door handle is substantially right triangular.
9. The door handle of claim 8, wherein the base plate is positioned at a upper and far corner of the door, wherein the base part of the door handle is aligned in parallel along the top edge of the door, and the upright part of the door handle is aligned in parallel along the side edge of the door.
10. The door handle of claim 7, wherein the rim of the lip plate is closed, wherein the gap between the front surface of the base plate and the bottom surface of the lip plate opens in the middle of the lip plate.
11. The door handle of claim 10, wherein the lip plate is substantially L-shaped strip, covering the base and upright parts of the triangular shape.
12. The door handle of claim 11, wherein the length of the base part is about ten (10) to thirteen (13) inches, wherein the length of the upright part is about six (6) to ten (10) inches, wherein the width of the lip plate strip is about one (1) to three (3) inches.
13. The door handle of claim 12, wherein the length of the base part is eleven and a half (11\xbd) inches, wherein the length of the upright part is eight (8) inches, wherein the width of the lip plate strip is one and five eighths (1\u215d) inches.
14. The door handle of claim 1, wherein the base plate is made of plastic.
15. The door handle of claim 1, wherein the lip plate is made of plastic.
16. The door handle of claim 1, wherein the coated portion comprises a metal plated film.
17. The door handle of claim 16, wherein the coated portion comprises a silver plated film.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A system for protecting data, comprising:
a memory in which encrypted data is stored; and
a processor coupled to the memory, the processor comprising a decryptor that decrypts the encrypted data, the decryptor being adapted to variably bit roll the encrypted data, to fixedly bit shuffle the bit-rolled data, to add a first key to the bit-shuffled data and to process the added data with a second key.
2. The system according to claim 1, wherein the decryptor is adapted to perform a single pipeline stage decryption.
3. The system according to claim 1, wherein the decryptor comprises a bit roller that rotates data in one or more roll regions of the incoming data based on an address related to the received encrypted data and a key related to the first key.
4. The system according to claim 3, wherein the key comprises a shifted version of the first key.
5. The system according to claim 3, wherein the bit roller comprises a plurality of multiplexers.
6. The system according to claim 5,
wherein each multiplexer comprises a multiplexer selection input,
wherein multiplexer selection bits are input at the multiplexer selection input, and
wherein the multiplexer selection bits are generated based on the address related to the received encrypted data and the key related to the first key.
7. The system according to claim 1, wherein the decryptor comprises a fixed bit shuffler.
8. The system according to claim 7, wherein the fixed bit shuffler comprises a fixed, hard-coded bit shuffler.
9. The system according to claim 7, wherein the fixed bit shuffler does not add a gate delay to the decryptor.
10. The system according to claim 1, wherein the decryptor comprises one or more two-bit adders.
11. The system according to claim 10, wherein each two-bit adder comprises three exclusive OR (XOR) gates and an AND gate.
12. The system according to claim 1, wherein the decryptor comprises an XOR block.
13. The system according to claim 12, wherein the XOR block comprises one or more XOR gates.
14. The system according to claim 13, wherein each XOR gate comprises a first input and a second input, the first input receiving a bit of the second key, the second input receiving a bit of the added data.
15. The system according to claim 1, wherein the first key is a shifted version of a key.
16. The system according to claim 15, wherein an amount of shift in the first key is based on an address related to the received encrypted data.
17. The system according to claim 15, wherein the first key is generated substantially in parallel with the decrypting of the encrypted data.
18. The system according to claim 1, wherein the decryptor does not add a latency to a processor pipeline.
19. The system according to claim 1, wherein the decryptor does not add enough gate delays to exceed a clock cycle budget of the processor.
20. The system according to claim 1, wherein the decryptor decrypts a word of the encrypted data in a single cycle.
21. The system according to claim 1, wherein the word comprises a 64-bit word.
22. The system according to claim 1, wherein the decryptor is adapted to receive encrypted data from the memory.
23. A system for protecting data, comprising:
a memory in which encrypted data is stored; and
a processor coupled to the memory, the processor comprising a decryptor that decrypts the encrypted data without adding a latency to a processor pipeline.
24. A system for protecting data, comprising:
a memory in which encrypted data is stored; and
a processor coupled to the memory, the processor comprising a decryptor that decrypts the encrypted data without adding enough gate delays to exceed a clock cycle budget of the processor.
25. A system for protecting data, comprising:
a memory in which encrypted data is stored; and
a processor coupled to the memory, the processor comprising a decryptor that decrypts the encrypted data and decrypts a word of the encrypted data in a single cycle.
26. A system for securing data, comprising:
a processor that decrypts encrypted data, the processor being adapted to variably bit roll encrypted data and to fixedly bit shuffle the bit-rolled data.
27. The system according to claim 26, wherein the processor is adapted to perform a single pipeline stage decryption.
28. A system according to claim 26, wherein the processor is adapted to add a first key to the bit-shuffled data and to process the added data with a second key.
29. The system according to claim 26, wherein the processor is adapted to decrypt the encrypted data without adding a latency to a processor pipeline.
30. A method for securing processor instructions, comprising:
variably rolling data information based on a first key and an address related to the data information; and
hard-coded shuffling of the rolled data information;
using one or more keys to process the data information.
31. The method according to claim 30, wherein the rolling, the shuffling and the using are part of a single pipeline stage decryption.
32. The method according to claim 30, wherein using one or more keys to process the data information comprises adding the hard-coded data information and a shifted version of the first key.
33. The method according to claim 32, wherein using one or more keys to process the data information comprises processing the added data information with a second key using exclusive OR (XOR) gates.
34. The method according to claim 33, wherein the first key is unrelated to the second key.
35. The method according to claim 30, wherein the data information comprises encrypted data information.
36. The method according to claim 30,
wherein the encrypted data information is stored in a memory, and
wherein the stored data information is accessed by a processor.
37. The method according to claim 30, wherein the rolling comprises rotating bits within one or more rolling regions of the data information.