1. A software-based switching system for controlling the routing of calls through a telecommunications network, comprising:
a network services processor, comprising means for determining call routing;
a packet manager, where the packet manager comprises means for providing connection information to the network; and
a pair of media control platforms, each comprising:
means, responsive to call setup request signaling from a calling party, for providing an indication of a call setup request to the network services processor;
means for requesting routing information from the network services processor;
means for providing connection information to the packet manager;
means for sharing the load;
means for handling the load of both media control platforms; and
a database of call states for both of the media control platforms in the pair.
2. A system as set forth in claim 1, where the means for determining call routing comprises a network and switch configuration database and the network services processor comprises means for providing information from the database to the media control platform in response to the request for routing information.
3. A system as set forth in claim 1, where the means for determining call routing comprises
a call state database; and
means for updating the database in response to messages from the media control platform.
4. A system as set forth in claim 1, further comprising additional media control platforms.
5. A system as set forth in claim 1, where
the system comprises means for utilizing an internal protocol; and
the packet manager comprises means for translating the communications to and from the network to the internal protocol.
6. A system as set forth in claim 1, further comprising a local area network interconnecting the network services processor, the packet manager, and the media control platform.
7. A software-based switching system for controlling the routing of calls through a telecommunications network, comprising:
a network services processor, comprising means for determining call routing;
a packet manager, where the packet manager comprises means for providing connection information to the network; and
a pair of media control platforms, each comprising:
means for providing an indication of a call setup request to the network services processor;
means for providing connection information to the packet manager;
means for sharing the load;
means for handling the load of both media control platforms; and
a database of call states for both of the media control platforms in the pair.
8. A method for controlling the routing of calls through a telecommunications network with a software-based switching system comprising a network services processor, a packet manager, and at least a pair of media control platforms, comprising:
in response to call setup request signaling from a calling party, providing an indication of a call setup request received at a media control platform to the network services processor;
sending a request from the media control platform for routing information to the network services processor;
forwarding connection information from the media control platform to the packet manager;
forwarding the connection information from the packet manager to the network;
sharing a load between the media control platforms; and
handling the load of both media control platforms in one of the media control platforms of the pair if the other media control platform fails; and
storing call states of both media control platforms in a database of call states.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method for analyzing a functional deviation of one or more transistor device products, the method including:
manufacturing a first transistor product of a first polarity type and a second transistor product of a second polarity type by using similar manufacturing steps;
collecting first measurements associated with the manufactured first polarity type transistor product;
collecting second measurements associated with the manufactured second polarity type transistor product;
detecting a deviation in functionality in the manufactured first polarity type transistor product, the manufactured second polarity type transistor product or both the manufactured first polarity type transistor and second polarity type transistor products, based on the first collected measurements and the second collected measurements;
determining a cause of the detected deviation;
identifying at least one manufacturing tool associated with the determined cause of the detected deviation; and
wherein a processor coupled to a memory device performs the collecting the first measurements, the collecting the second measurements, the detecting, the determining, and the identifying.
2. The method according to claim 1, wherein the manufactured first polarity type transistor product is a n-type transistor, and the manufactured second polarity type transistor product is a p-type transistor.
3. The method according to claim 2, wherein the first collected measurements and the second collected measurements include an operating frequency measurement, an electric current measurement and an electric capacitance measurement.
4. The method according to claim 3, further comprising:
collecting the electric capacitance measurement of the n-type transistor;
collecting the electric capacitance measurement of the p-type transistor;
determining whether both the electric capacitance measurement of the n-type transistor and the electric capacitance measurement of the p-type transistor are higher than an electric capacitance specified in a corresponding transistor specification;
in response to determining that both the electric capacitance measurement of the n-type transistor and the electric capacitance measurement of the p-type transistor are higher than the electric capacitance specified in said corresponding transistor specification, determining that the cause of the higher capacitance is one or more of: gate sizes of the n-type transistor and the p-type transistor, gate thickness of the n-type transistor and the p-type transistor, and gate ionization injection of the n-type transistor and the p-type transistor; and
identifying one or more manufacturing tools that affect the gate sizes, the gate thickness, and the gate ionization.
5. The method according to claim 3, further comprising:
collecting the electric current measurement of the n-type transistor;
collecting the electric current measurement of the p-type transistor;
determining whether the electric current measurement of the n-type transistor deviates an electric current specified in a corresponding transistor specification and whether the electric current measurement of the p-type transistor complies with the specification; and
in response to determining that the electric current measurement of the n-type transistor deviates the electric current specified in the corresponding transistor specification but the electric current measurement of the p-type transistor complies with the specification, determining that the cause of the deviation lies in one or more manufacturing tools that are common to both the n-type transistor and the p-type transistor.
6. The method according to claim 3, further comprising:
collecting the electric current measurement of the n-type transistor;
collecting the electric current measurement of the p-type transistor;
determining whether the electric current measurement of the n-type transistor is less than an electric current specified in a corresponding transistor specification and whether the electric current measurement of the p-type transistor is higher than the electric current specified in the specification; and
in response to determining that the electric current measurement of the n-type transistor is less than the electric current specified in the corresponding transistor specification but the electric current measurement of the p-type transistor is higher than the electric current specified in the specification, determining that the cause of the deviation lies in one or more manufacturing tools that are common to both the n-type transistor and the p-type transistor but have opposite physical effects to both transistors.
7. The method according to claim 3, further comprising:
determining whether the first collected measurements of the first product correlates with the second collected measurements of the second product; and
in response to determining that the first collected measurements of the first product does not correlate with the second collected measurements of the second product, determining that the cause of the deviation lies in one or more manufacturing tools that exist for the first manufactured product but does not exist for the second manufactured product.
8. The method according to claim 1, further comprising:
identifying one or more manufacturing tools that neither affects nor influences the determined cause of the detected deviation.
9. A system for analyzing a functional deviation of one or more transistor device products, the system including:
manufacturing tools manufacturing a first transistor product of a first polarity type and a second transistor product of a second polarity type by using similar manufacturing steps;
a memory device; and
a processor coupled to the memory device, wherein the processor is configured to perform steps of:
collecting first measurements associated with the manufactured first polarity type transistor product;
collecting second measurements associated with the manufactured second polarity type transistor product;
detecting a deviation in functionality in the manufactured first polarity type transistor product, the manufactured second polarity type transistor product or both the manufactured first polarity type transistor and second polarity type transistor products, based on the first collected measurements and the second collected measurements;
determining a cause of the detected deviation; and
identifying at least one manufacturing tool associated with the determined cause of the detected deviation.
10. The system according to claim 9, wherein the manufactured first polarity type transistor product is a n-type transistor, and the manufactured second polarity type transistor product is a p-type transistor.
11. The system according to claim 10, wherein the first collected measurements and the second collected measurements include an operating frequency measurement, an electric current measurement and an electric capacitance measurement.
12. The system according to claim 11, wherein the processor is further configured to perform steps of:
collecting the electric capacitance measurement of the n-type transistor;
collecting the electric capacitance measurement of the p-type transistor;
determining whether both the electric capacitance measurement of the n-type transistor and the electric capacitance measurement of the p-type transistor are higher than an electric capacitance specified in a corresponding transistor specification;
in response to determining that both the electric capacitance measurement of the n-type transistor and the electric capacitance measurement of the p-type transistor are higher than the electric capacitance specified in said corresponding transistor specification, determining that the cause of the higher capacitance is one or more of: gate sizes of the n-type transistor and the p-type transistor, gate thickness of the n-type transistor and the p-type transistor, and gate ionization injection of the n-type transistor and the p-type transistor; and
identifying one or more manufacturing tools that affect the gate sizes, the gate thickness, and the gate ionization.
13. The system according to claim 11, wherein the processor is further configured to perform steps of:
collecting the electric current measurement of the n-type transistor;
collecting the electric current measurement of the p-type transistor;
determining whether the electric current measurement of the n-type transistor deviates an electric current specified in a corresponding transistor specification and whether the electric current measurement of the p-type transistor complies with the specification; and
in response to determining that the electric current measurement of the n-type transistor deviates the electric current specified in the corresponding transistor specification but the electric current measurement of the p-type transistor complies with the specification, determining that the cause of the deviation lies in one or more manufacturing tools that are common to both the n-type transistor and the p-type transistor.
14. The system according to claim 11, wherein the processor is further configured to perform steps of:
collecting the electric current measurement of the n-type transistor;
collecting the electric current measurement of the p-type transistor;
determining whether the electric current measurement of the n-type transistor is less than an electric current specified in a corresponding transistor specification and whether the electric current measurement of the p-type transistor is higher than the electric current specified in the specification; and
in response to determining that the electric current measurement of the n-type transistor is less than the electric current specified in the corresponding transistor specification but the electric current measurement of the p-type transistor is higher than the electric current specified in the specification, determining that the cause of the deviation lies in one or more manufacturing tools that are common to both the n-type transistor and the p-type transistor but have opposite physical effects to both transistors.
15. The system according to claim 11, wherein the processor is further configured to perform steps of:
determining whether the first collected measurements of the first product correlates with the second collected measurements of the second product; and
in response to determining that the first collected measurements of the first product does not correlate with the second collected measurements of the second product, determining that the cause of the deviation lies in one or more manufacturing tools that exist for the first manufactured product but does not exist for the second manufactured product.
16. The system according to claim 9, wherein the processor is further configured to perform steps of:
identifying one or more manufacturing tools that neither affects nor influences the determined cause of the detected deviation.
17. A computer program product for analyzing a functional deviation of one or more transistor device products, the computer program product comprising a non-transitory storage medium readable by a processing circuit and storing instructions run by the processing circuit for performing method steps, the method steps comprising:
initiating of manufacturing a first transistor product of a first polarity type and a second transistor product of a second polarity type by using similar manufacturing steps;
collecting first measurements associated with the manufactured first polarity type transistor product;
collecting second measurements associated with the manufactured second polarity type transistor product;
detecting a deviation in functionality in the manufactured first polarity type transistor product, the manufactured second polarity type transistor product or both the manufactured first polarity type transistor and second polarity type transistor products, based on the first collected measurements and the second collected measurements;
determining a cause of the detected deviation; and
identifying at least one manufacturing tool associated with the determined cause of the detected deviation,
wherein a processor coupled to a memory device performs the collecting the first measurements, the collecting the second measurements, the detecting, the determining, and the identifying.
18. The computer program product according to claim 17, wherein the manufactured first polarity type transistor product is a n-type transistor, and the manufactured second polarity type transistor product is a p-type transistor.
19. The computer program product according to claim 18, wherein the first collected measurements and the second collected measurements include an operating frequency measurement, an electric current measurement and an electric capacitance measurement.