1. A recording medium comprising on an ink-recording surface side an ink-receiving layer that contains at least a pigment for retaining a coloring material of ink and a binder for the pigment,
wherein the ink-receiving layer includes a first layer region where the binder is cross-linked by a first crosslinking agent to become uniform relative to the pigment; and a second layer region where the binder is cross-linked by a second crosslinking agent such that the degree of crosslinking of the second layer region is larger than that of the first layer region, and
wherein the first layer region is located closer to the ink-recording surface side than the second layer region.
2-26. (canceled)
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A computer program product for providing a yield prediction, the computer program product having a non-transitory computer readable medium with a computer program embodied thereon, the computer program comprising:
computer program code for obtaining a representation of a circuit, the circuit comprising a common path and a critical path, the critical path representing multiple parallel paths;
computer program code for obtaining a first information parameter representing the common path and a second information parameter representing the multiple parallel paths;
computer program code for performing a variable based simulation based on the representation of the circuit, the first information parameter, and the second information parameter; and
computer program code for determining a result indication of each of the multiple parallel paths based on the variable based simulation compared with a predetermined specification.
2. The computer program product of claim 1, wherein the computer program further comprises computer program code for determining a yield prediction, wherein the yield prediction is based on a number of runs receiving a pass indication.
3. The computer program product of claim 1, wherein the computer program code for performing the variable based simulation includes computer program code for performing the variable based simulation for a predetermined number of events and for a predetermined number of runs within each of the events.
4. The computer program product of claim 3, wherein the computer program code for performing the variable based simulation uses a same first information parameter during the predetermined number of runs within a single event and uses a different second information parameter during each of the predetermined number of runs within the single event.
5. The computer program product of claim 3, wherein the computer program further comprises:
computer program code for determining a result indication of each of the predetermined number of runs based on the result indication of the multiple parallel paths for each respective run; and
computer program code for determining a result indication of each of the predetermined number of events based on the result indication of each of the predetermined number of runs within each event.
6. The computer program product of claim 1, wherein the computer program further comprises computer program code for reducing an original representation of a first circuit to the representation of the circuit, the first circuit comprising the common path and the multiple parallel paths.
7. A method for predicting yield, the method comprising:
obtaining a representation of a reduced circuit, the reduced circuit comprising a common path and a critical path, the critical path being representative of multiple parallel paths;
using at least one processor, performing a variable based simulation of the reduced circuit using a first table of the common path and a second table of the multiple parallel paths, the variable based simulation including a predetermined number of events and a predetermined number of runs within each event; and
determining a result indication based on the variable based simulation.
8. The method of claim 7 further comprising:
obtaining a representation of an original circuit, the original circuit comprising the common path and the multiple parallel paths; and
reducing the representation of the original circuit to the representation of the reduced circuit.
9. The method of claim 7, wherein the variable based simulation includes using a same first table for each run within one of the predetermined number of events.
10. The method of claim 7, wherein the variable based simulation includes using a different second table for different runs within one of the predetermined number of events.
11. The method of claim 7, wherein the performing the variable based simulation is performed by multiple processors.
12. The method of claim 7 further comprising predicting a yield based on the determining the result indication.
13. The method of claim 7 further comprising optimizing a representation of an original circuit comprising the common path and the multiple parallel paths.
14. The method of claim 7 further comprising:
sweeping a minimum power supply voltage during the performing the variable based simulation and the determining the result indication;
obtaining a minimum power supply voltage probability-chart of an original circuit comprising the common path and the multiple parallel paths based on the sweeping the minimum power supply voltage; and
predicting a minimum power supply voltage target yield.
15. A system for yield prediction using multi-computing, the system comprising:
a storage node storing common data, the common data comprising a representation of a circuit including a common path and a critical path representative of multiple parallel paths, and the common data further comprising a first table representative of local variation in the common path and a second table representative of local variation in each of the multiple paths;
a first processor configured to simulate a first predetermined number of events using a variable based simulation based on the common data;
a second processor configured to simulate a second predetermined number of events using the variable based simulation based on the common data; and
a communication node between the storage node and the first processor and between the storage node and the second processor enabling access of the common data by the first processor and the second processor.
16. The system of claim 15, wherein the first processor and the second processor each are configured to simulate a predetermined number of runs within each of first predetermined number of events and each of the second predetermined number of events, respectively.
17. The system of claim 16, wherein the first processor and the second processor each are configured to use the variable based simulation based on a same first table for each run of a respective event.
18. The system of claim 16, wherein the first processor and the second processor each are configured to use the variable based simulation based on a different second table for each run of a respective event.
19. The system of claim 15, wherein the first processor and the second processor are each configured to provide a result indication for each of the first predetermined number of events and each of the second predetermined number of events, respectively.
20. The system of claim 19 further comprising a third processor configured to calculate a predicted yield based on the result indication of each of the first predetermined number of events and the second predetermined number of events.