1. A method for testing and correcting a memory system comprising:
selecting a target memory unit of the memory system in response to a trigger to start a timing margin measurement;
moving data stored in the target memory unit to a spare memory unit;
steering reads from and writes of data to the spare memory unit instead of the target memory while performing two or more timing measurements of the target memory unit, wherein the two or more timing measurements of the target memory unit include a measurement of a setup margin and a measurement of a hold margin; and
determining whether a timing measurement has degraded beyond a threshold value by comparing the timing margin measurements of the target memory unit with a timing margin profile measurement.
2. The method of claim 1, further comprising, in response to determining that the timing measurement has not degraded beyond the threshold value:
moving data stored in the spare memory unit to the target memory unit; and
performing reads from and writes of data to the target memory unit.
3. The method of claim 1, further comprising, in response to determining that the timing measurement has degraded beyond the threshold value:
adjusting a voltage of the memory system when the degradation is correctable;
moving data stored in the spare memory unit to the target memory unit; and
performing reads from and writes of data to the target memory unit.
4. The method of claim 1, further comprising, in response to determining that the timing measurement has degraded beyond the threshold value:
using the spare memory unit in place of the target memory unit when the timing margin degradation is uncorrectable.
5. The method of claim 1, further comprising, in response to determining that the timing measurement has degraded beyond the threshold value:
adjusting a delay register setting of the memory system when the degradation is correctable;
moving data stored in the spare memory unit to the target memory unit; and
performing reads from and writes of data to the target memory unit.
6. The method of claim 1, further comprising, in response to determining that the timing measurement has degraded beyond the threshold value:
generating a warning regarding the target memory unit when the degradation is correctable.
7. The method of claim 1, wherein the target memory unit and the spare memory unit are a target rank and a spare rank respectively.
8. The method of claim 1, wherein the target memory unit and the spare memory unit are a target dynamic random access memory (DRAM) and a spare DRAM respectively.
9. The method of claim 1, wherein the trigger to start a timing margin measurement is a detection of an error by an error correction code module.
10. The method of claim 1, wherein the trigger to start a timing margin measurement is a user initiated trigger.
11. The method of claim 1, wherein the trigger to start a timing margin measurement is a periodic trigger initiated after a particular number of calibration operations.
12. The method of claim 1, wherein the target memory unit is a double data rate dynamic random access memory (DRAM) and the spare memory unit is a double data rate DRAM respectively.
13. A system comprising:
a volatile memory;
firmware configured to select a target memory unit of the memory system in response to a trigger to start a timing margin measurement; and
a memory buffer configured to:
move data stored in the target memory unit to a spare memory unit;
steer reads from and writes of data to the spare memory unit instead of the target memory while performing two or more timing measurements of the target memory unit, wherein the two or more timing measurements of the target memory unit include a measurement of a setup margin and a measurement of a hold margin; and
wherein the firmware further is configured to determine whether a timing measurement has degraded beyond a threshold value by comparing the timing margin measurements of the target memory unit with a timing margin profile measurement.
14. The system of claim 13, wherein the memory buffer is further configured to:
move data stored in the spare memory unit to the target memory unit when the timing measurement has not degraded beyond the threshold value, and
adjust the memory system to perform reads and writes of user data from the target memory unit.
15. The system of claim 13, wherein the firmware is further configured to:
adjust a voltage of the memory system when a timing measurement has degraded beyond a threshold value and the degradation is correctable.
16. The system of claim 13, wherein the firmware is further configured to, in response to determining that the timing measurement has degraded beyond the threshold value:
adjust a delay register setting of the memory system when the degradation is correctable.
17. The system of claim 16, wherein the target memory unit and the spare memory unit are a target rank and a spare rank respectively.
18. The system of claim 16, wherein the target memory unit and the spare memory unit are a target dynamic random access memory (DRAM) and a spare DRAM respectively.
19. The system of claim 13 wherein the firmware is further configured to, in response to determining that the timing measurement has degraded beyond the threshold value, generate a warning regarding the target memory unit.
20. The system of claim 13 wherein the trigger to start a timing margin measurement is a detection of an error by an error correction code module.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A developing device, comprising:
a developing container in which developer containing carrier and toner is stored;
a stir-transport member which stirs and transports the developer inside the developing container;
a developer carrier which carries the developer fed from the stir-transport member; and
a restricting member arranged to face the developer carrier and which restricts layer thickness of the developer on a surface of the developer carrier, wherein
the restricting member includes:
a restricting base formed of resin, and
a metal foil arranged at a tip part of the restricting base, and the metal foil includes:
a downstream face portion which is fixed to a downstream-side face of the restricting base with respect to a rotation direction of the developer carrier at a part thereof facing the restricting member,
a restricting face portion which is formed by bending a tip of the downstream face portion to an upstream side with respect to the rotation direction of the developer carrier at a part thereof facing the restricting member and which is arranged to face the developer carrier,
an upstream face portion which is formed by bending, away from the developer carrier, an upstream-side part of the restricting face portion with respect to the rotation direction of the developer carrier at the part thereof facing the restricting member, a part of the upstream face portion being fixed to an upstream-side face of the restricting base with respect to the rotation direction of the developer carrier at the part thereof facing the restricting member, and
a stagnation suppressing face portion which is formed by bending, to an upstream side with respect to the rotation direction of the developer carrier at the part thereof facing the restricting member, a part of the upstream face portion on a side thereof opposite from the developer carrier and which suppresses stagnation of the developer.
2. The developing device according to claim 1, further comprising a magnetic member or a magnet arranged between the restricting face portion and the restricting base.
3. The developing device according to claim 1,
wherein the metal foil is formed with a thickness of 0.05 mm or more but 0.3 mm or less.
4. The developing device according to claim 3,
wherein the metal foil is formed with a thickness of 0.08 mm or more but 0.1 mm or less.
5. An image forming apparatus, comprising the developing device according to claim 1.